linux/arch/x86/kernel/acpi/cstate.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2005 Intel Corporation
 * 	Venkatesh Pallipadi <[email protected]>
 * 	- Added _PDC for SMP C-states on Intel CPUs
 */

#include <linux/kernel.h>
#include <linux/export.h>
#include <linux/init.h>
#include <linux/acpi.h>
#include <linux/cpu.h>
#include <linux/sched.h>

#include <acpi/processor.h>
#include <asm/mwait.h>
#include <asm/special_insns.h>

/*
 * Initialize bm_flags based on the CPU cache properties
 * On SMP it depends on cache configuration
 * - When cache is not shared among all CPUs, we flush cache
 *   before entering C3.
 * - When cache is shared among all CPUs, we use bm_check
 *   mechanism as in UP case
 *
 * This routine is called only after all the CPUs are online
 */
void acpi_processor_power_init_bm_check(struct acpi_processor_flags *flags,
					unsigned int cpu)
{ … }
EXPORT_SYMBOL(…);

/* The code below handles cstate entry with monitor-mwait pair on Intel*/

struct cstate_entry { … };
static struct cstate_entry __percpu *cpu_cstate_entry;	/* per CPU ptr */

static short mwait_supported[ACPI_PROCESSOR_MAX_POWER];

#define NATIVE_CSTATE_BEYOND_HALT …

static long acpi_processor_ffh_cstate_probe_cpu(void *_cx)
{ … }

int acpi_processor_ffh_cstate_probe(unsigned int cpu,
		struct acpi_processor_cx *cx, struct acpi_power_register *reg)
{ … }
EXPORT_SYMBOL_GPL(…);

void __cpuidle acpi_processor_ffh_cstate_enter(struct acpi_processor_cx *cx)
{ … }
EXPORT_SYMBOL_GPL(…);

static int __init ffh_cstate_init(void)
{ … }

static void __exit ffh_cstate_exit(void)
{ … }

arch_initcall(ffh_cstate_init);
__exitcall(…);