linux/arch/x86/include/asm/gart.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_X86_GART_H
#define _ASM_X86_GART_H

#include <asm/e820/api.h>

extern void set_up_gart_resume(u32, u32);

extern int fallback_aper_order;
extern int fallback_aper_force;
extern int fix_aperture;

/* PTE bits. */
#define GPTE_VALID …
#define GPTE_COHERENT …

/* Aperture control register bits. */
#define GARTEN …
#define DISGARTCPU …
#define DISGARTIO …
#define DISTLBWALKPRB …

/* GART cache control register bits. */
#define INVGART …
#define GARTPTEERR …

/* K8 On-cpu GART registers */
#define AMD64_GARTAPERTURECTL …
#define AMD64_GARTAPERTUREBASE …
#define AMD64_GARTTABLEBASE …
#define AMD64_GARTCACHECTL …

#ifdef CONFIG_GART_IOMMU
extern int gart_iommu_aperture;
extern int gart_iommu_aperture_allowed;
extern int gart_iommu_aperture_disabled;

extern void early_gart_iommu_check(void);
extern int gart_iommu_init(void);
extern void __init gart_parse_options(char *);
void gart_iommu_hole_init(void);

#else
#define gart_iommu_aperture …
#define gart_iommu_aperture_allowed …
#define gart_iommu_aperture_disabled …

static inline void early_gart_iommu_check(void)
{
}
static inline void gart_parse_options(char *options)
{
}
static inline void gart_iommu_hole_init(void)
{
}
#endif

extern int agp_amd64_init(void);

static inline void gart_set_size_and_enable(struct pci_dev *dev, u32 order)
{ … }

static inline void enable_gart_translation(struct pci_dev *dev, u64 addr)
{ … }

static inline int aperture_valid(u64 aper_base, u32 aper_size, u32 min_size)
{ … }

#endif /* _ASM_X86_GART_H */