/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __WCD939X_H__ #define __WCD939X_H__ #include <linux/soundwire/sdw.h> #include <linux/soundwire/sdw_type.h> #define WCD939X_BASE … #define WCD939X_ANA_PAGE … #define WCD939X_ANA_BIAS … #define WCD939X_BIAS_ANALOG_BIAS_EN … #define WCD939X_BIAS_PRECHRG_EN … #define WCD939X_BIAS_PRECHRG_CTL_MODE … #define WCD939X_ANA_RX_SUPPLIES … #define WCD939X_RX_SUPPLIES_VPOS_EN … #define WCD939X_RX_SUPPLIES_VNEG_EN … #define WCD939X_RX_SUPPLIES_VPOS_PWR_LVL … #define WCD939X_RX_SUPPLIES_VNEG_PWR_LVL … #define WCD939X_RX_SUPPLIES_REGULATOR_MODE … #define WCD939X_RX_SUPPLIES_RX_BIAS_ENABLE … #define WCD939X_ANA_HPH … #define WCD939X_HPH_HPHL_ENABLE … #define WCD939X_HPH_HPHR_ENABLE … #define WCD939X_HPH_HPHL_REF_ENABLE … #define WCD939X_HPH_HPHR_REF_ENABLE … #define WCD939X_HPH_PWR_LEVEL … #define WCD939X_ANA_EAR … #define WCD939X_ANA_EAR_COMPANDER_CTL … #define WCD939X_EAR_COMPANDER_CTL_GAIN_OVRD_REG … #define WCD939X_EAR_COMPANDER_CTL_EAR_GAIN … #define WCD939X_EAR_COMPANDER_CTL_COMP_DFF_BYP … #define WCD939X_EAR_COMPANDER_CTL_COMP_DFF_CLK_EDGE … #define WCD939X_ANA_TX_CH1 … #define WCD939X_ANA_TX_CH2 … #define WCD939X_TX_CH2_ENABLE … #define WCD939X_TX_CH2_HPF1_INIT … #define WCD939X_TX_CH2_HPF2_INIT … #define WCD939X_TX_CH2_GAIN … #define WCD939X_ANA_TX_CH3 … #define WCD939X_ANA_TX_CH4 … #define WCD939X_TX_CH4_ENABLE … #define WCD939X_TX_CH4_HPF3_INIT … #define WCD939X_TX_CH4_HPF4_INIT … #define WCD939X_TX_CH4_GAIN … #define WCD939X_ANA_MICB1_MICB2_DSP_EN_LOGIC … #define WCD939X_ANA_MICB3_DSP_EN_LOGIC … #define WCD939X_ANA_MBHC_MECH … #define WCD939X_MBHC_MECH_L_DET_EN … #define WCD939X_MBHC_MECH_GND_DET_EN … #define WCD939X_MBHC_MECH_MECH_DETECT_TYPE … #define WCD939X_MBHC_MECH_HPHL_PLUG_TYPE … #define WCD939X_MBHC_MECH_GND_PLUG_TYPE … #define WCD939X_MBHC_MECH_MECH_HS_L_PULLUP_COMP_EN … #define WCD939X_MBHC_MECH_MECH_HS_G_PULLUP_COMP_EN … #define WCD939X_MBHC_MECH_SW_HPH_L_P_100K_TO_GND … #define WCD939X_ANA_MBHC_ELECT … #define WCD939X_MBHC_ELECT_FSM_EN … #define WCD939X_MBHC_ELECT_BTNDET_ISRC_CTL … #define WCD939X_MBHC_ELECT_ELECT_DET_TYPE … #define WCD939X_MBHC_ELECT_ELECT_SCHMT_ISRC_CTL … #define WCD939X_MBHC_ELECT_BIAS_EN … #define WCD939X_ANA_MBHC_ZDET … #define WCD939X_MBHC_ZDET_ZDET_L_MEAS_EN … #define WCD939X_MBHC_ZDET_ZDET_R_MEAS_EN … #define WCD939X_MBHC_ZDET_ZDET_CHG_EN … #define WCD939X_MBHC_ZDET_ZDET_ILEAK_COMP_EN … #define WCD939X_MBHC_ZDET_ELECT_ISRC_EN … #define WCD939X_ANA_MBHC_RESULT_1 … #define WCD939X_MBHC_RESULT_1_Z_RESULT_LSB … #define WCD939X_ANA_MBHC_RESULT_2 … #define WCD939X_MBHC_RESULT_2_Z_RESULT_MSB … #define WCD939X_ANA_MBHC_RESULT_3 … #define WCD939X_ANA_MBHC_BTN0 … #define WCD939X_MBHC_BTN0_VTH … #define WCD939X_ANA_MBHC_BTN1 … #define WCD939X_MBHC_BTN1_VTH … #define WCD939X_ANA_MBHC_BTN2 … #define WCD939X_MBHC_BTN2_VTH … #define WCD939X_ANA_MBHC_BTN3 … #define WCD939X_MBHC_BTN3_VTH … #define WCD939X_ANA_MBHC_BTN4 … #define WCD939X_MBHC_BTN4_VTH … #define WCD939X_ANA_MBHC_BTN5 … #define WCD939X_MBHC_BTN5_VTH … #define WCD939X_ANA_MBHC_BTN6 … #define WCD939X_MBHC_BTN6_VTH … #define WCD939X_ANA_MBHC_BTN7 … #define WCD939X_MBHC_BTN7_VTH … #define WCD939X_ANA_MICB1 … #define WCD939X_MICB_ENABLE … #define WCD939X_MICB_VOUT_CTL … #define WCD939X_ANA_MICB2 … #define WCD939X_ANA_MICB2_RAMP … #define WCD939X_MICB2_RAMP_RAMP_ENABLE … #define WCD939X_MICB2_RAMP_MB2_IN2P_SHORT_ENABLE … #define WCD939X_MICB2_RAMP_ALLSW_OVRD_ENABLE … #define WCD939X_MICB2_RAMP_SHIFT_CTL … #define WCD939X_MICB2_RAMP_USB_MGDET_MICB2_RAMP … #define WCD939X_ANA_MICB3 … #define WCD939X_ANA_MICB4 … #define WCD939X_BIAS_CTL … #define WCD939X_BIAS_VBG_FINE_ADJ … #define WCD939X_LDOL_VDDCX_ADJUST … #define WCD939X_LDOL_DISABLE_LDOL … #define WCD939X_MBHC_CTL_CLK … #define WCD939X_MBHC_CTL_ANA … #define WCD939X_MBHC_ZDET_VNEG_CTL … #define WCD939X_MBHC_ZDET_BIAS_CTL … #define WCD939X_MBHC_CTL_BCS … #define WCD939X_MBHC_MOISTURE_DET_FSM_STATUS … #define WCD939X_MBHC_TEST_CTL … #define WCD939X_LDOH_MODE … #define WCD939X_MODE_LDOH_EN … #define WCD939X_MODE_PWRDN_STATE … #define WCD939X_MODE_SLOWRAMP_EN … #define WCD939X_MODE_VOUT_ADJUST … #define WCD939X_MODE_VOUT_COARSE_ADJ … #define WCD939X_LDOH_BIAS … #define WCD939X_LDOH_STB_LOADS … #define WCD939X_LDOH_SLOWRAMP … #define WCD939X_MICB1_TEST_CTL_1 … #define WCD939X_TEST_CTL_1_NOISE_FILT_RES_VAL … #define WCD939X_TEST_CTL_1_EN_VREFGEN … #define WCD939X_TEST_CTL_1_EN_LDO … #define WCD939X_TEST_CTL_1_LDO_BLEEDER_I_CTRL … #define WCD939X_MICB1_TEST_CTL_2 … #define WCD939X_TEST_CTL_2_IBIAS_VREFGEN … #define WCD939X_TEST_CTL_2_INRUSH_CURRENT_FIX_DIS … #define WCD939X_TEST_CTL_2_IBIAS_LDO_DRIVER … #define WCD939X_MICB1_TEST_CTL_3 … #define WCD939X_TEST_CTL_3_CFILT_REF_EN … #define WCD939X_TEST_CTL_3_RZ_LDO_VAL … #define WCD939X_TEST_CTL_3_IBIAS_LDO_STG3 … #define WCD939X_TEST_CTL_3_ATEST_CTRL … #define WCD939X_MICB2_TEST_CTL_1 … #define WCD939X_MICB2_TEST_CTL_2 … #define WCD939X_MICB2_TEST_CTL_3 … #define WCD939X_MICB3_TEST_CTL_1 … #define WCD939X_MICB3_TEST_CTL_2 … #define WCD939X_MICB3_TEST_CTL_3 … #define WCD939X_MICB4_TEST_CTL_1 … #define WCD939X_MICB4_TEST_CTL_2 … #define WCD939X_MICB4_TEST_CTL_3 … #define WCD939X_TX_COM_ADC_VCM … #define WCD939X_TX_COM_BIAS_ATEST … #define WCD939X_TX_COM_SPARE1 … #define WCD939X_TX_COM_SPARE2 … #define WCD939X_TX_COM_TXFE_DIV_CTL … #define WCD939X_TX_COM_TXFE_DIV_START … #define WCD939X_TX_COM_SPARE3 … #define WCD939X_TX_COM_SPARE4 … #define WCD939X_TX_1_2_TEST_EN … #define WCD939X_TX_1_2_ADC_IB … #define WCD939X_TX_1_2_ATEST_REFCTL … #define WCD939X_TX_1_2_TEST_CTL … #define WCD939X_TX_1_2_TEST_BLK_EN1 … #define WCD939X_TX_1_2_TXFE1_CLKDIV … #define WCD939X_TX_1_2_SAR2_ERR … #define WCD939X_TX_1_2_SAR1_ERR … #define WCD939X_TX_3_4_TEST_EN … #define WCD939X_TX_3_4_ADC_IB … #define WCD939X_TX_3_4_ATEST_REFCTL … #define WCD939X_TX_3_4_TEST_CTL … #define WCD939X_TX_3_4_TEST_BLK_EN3 … #define WCD939X_TX_3_4_TXFE3_CLKDIV … #define WCD939X_TX_3_4_SAR4_ERR … #define WCD939X_TX_3_4_SAR3_ERR … #define WCD939X_TX_3_4_TEST_BLK_EN2 … #define WCD939X_TEST_BLK_EN2_ADC2_INT1_EN … #define WCD939X_TEST_BLK_EN2_ADC2_INT2_EN … #define WCD939X_TEST_BLK_EN2_ADC2_SAR_EN … #define WCD939X_TEST_BLK_EN2_ADC2_CMGEN_EN … #define WCD939X_TEST_BLK_EN2_ADC2_CLKGEN_EN … #define WCD939X_TEST_BLK_EN2_ADC12_VREF_NONL2 … #define WCD939X_TEST_BLK_EN2_TXFE2_MBHC_CLKRST_EN … #define WCD939X_TX_3_4_TXFE2_CLKDIV … #define WCD939X_TX_3_4_SPARE1 … #define WCD939X_TX_3_4_TEST_BLK_EN4 … #define WCD939X_TX_3_4_TXFE4_CLKDIV … #define WCD939X_TX_3_4_SPARE2 … #define WCD939X_CLASSH_MODE_1 … #define WCD939X_CLASSH_MODE_2 … #define WCD939X_CLASSH_MODE_3 … #define WCD939X_CLASSH_CTRL_VCL_1 … #define WCD939X_CLASSH_CTRL_VCL_2 … #define WCD939X_CLASSH_CTRL_CCL_1 … #define WCD939X_CLASSH_CTRL_CCL_2 … #define WCD939X_CLASSH_CTRL_CCL_3 … #define WCD939X_CLASSH_CTRL_CCL_4 … #define WCD939X_CLASSH_CTRL_CCL_5 … #define WCD939X_CLASSH_BUCK_TMUX_A_D … #define WCD939X_CLASSH_BUCK_SW_DRV_CNTL … #define WCD939X_CLASSH_SPARE … #define WCD939X_FLYBACK_EN … #define WCD939X_FLYBACK_VNEG_CTRL_1 … #define WCD939X_FLYBACK_VNEG_CTRL_2 … #define WCD939X_FLYBACK_VNEG_CTRL_3 … #define WCD939X_FLYBACK_VNEG_CTRL_4 … #define WCD939X_VNEG_CTRL_4_ILIM_SEL … #define WCD939X_VNEG_CTRL_4_PW_BUF_POS … #define WCD939X_VNEG_CTRL_4_PW_BUF_NEG … #define WCD939X_FLYBACK_VNEG_CTRL_5 … #define WCD939X_FLYBACK_VNEG_CTRL_6 … #define WCD939X_FLYBACK_VNEG_CTRL_7 … #define WCD939X_FLYBACK_VNEG_CTRL_8 … #define WCD939X_FLYBACK_VNEG_CTRL_9 … #define WCD939X_FLYBACK_VNEGDAC_CTRL_1 … #define WCD939X_FLYBACK_VNEGDAC_CTRL_2 … #define WCD939X_FLYBACK_VNEGDAC_CTRL_3 … #define WCD939X_FLYBACK_CTRL_1 … #define WCD939X_FLYBACK_TEST_CTL … #define WCD939X_RX_AUX_SW_CTL … #define WCD939X_RX_PA_AUX_IN_CONN … #define WCD939X_RX_TIMER_DIV … #define WCD939X_RX_OCP_CTL … #define WCD939X_RX_OCP_COUNT … #define WCD939X_RX_BIAS_EAR_DAC … #define WCD939X_RX_BIAS_EAR_AMP … #define WCD939X_RX_BIAS_HPH_LDO … #define WCD939X_RX_BIAS_HPH_PA … #define WCD939X_RX_BIAS_HPH_RDACBUFF_CNP2 … #define WCD939X_RX_BIAS_HPH_RDAC_LDO … #define WCD939X_RX_BIAS_HPH_CNP1 … #define WCD939X_RX_BIAS_HPH_LOWPOWER … #define WCD939X_RX_BIAS_AUX_DAC … #define WCD939X_RX_BIAS_AUX_AMP … #define WCD939X_RX_BIAS_VNEGDAC_BLEEDER … #define WCD939X_RX_BIAS_MISC … #define WCD939X_RX_BIAS_BUCK_RST … #define WCD939X_RX_BIAS_BUCK_VREF_ERRAMP … #define WCD939X_RX_BIAS_FLYB_ERRAMP … #define WCD939X_RX_BIAS_FLYB_BUFF … #define WCD939X_RX_BIAS_FLYB_MID_RST … #define WCD939X_HPH_L_STATUS … #define WCD939X_HPH_R_STATUS … #define WCD939X_HPH_CNP_EN … #define WCD939X_HPH_CNP_WG_CTL … #define WCD939X_HPH_CNP_WG_TIME … #define WCD939X_HPH_OCP_CTL … #define WCD939X_OCP_CTL_OCP_CURR_LIMIT … #define WCD939X_OCP_CTL_OCP_FSM_EN … #define WCD939X_OCP_CTL_SPARE_BITS … #define WCD939X_OCP_CTL_SCD_OP_EN … #define WCD939X_HPH_AUTO_CHOP … #define WCD939X_HPH_CHOP_CTL … #define WCD939X_HPH_PA_CTL1 … #define WCD939X_HPH_PA_CTL2 … #define WCD939X_PA_CTL2_HPHPA_GND_R … #define WCD939X_PA_CTL2_HPHPA_GND_L … #define WCD939X_PA_CTL2_GM3_CASCODE_CTL_NORMAL … #define WCD939X_HPH_L_EN … #define WCD939X_L_EN_CONST_SEL_L … #define WCD939X_L_EN_GAIN_SOURCE_SEL … #define WCD939X_L_EN_SPARE_BITS … #define WCD939X_HPH_L_TEST … #define WCD939X_HPH_L_ATEST … #define WCD939X_HPH_R_EN … #define WCD939X_R_EN_CONST_SEL_R … #define WCD939X_R_EN_GAIN_SOURCE_SEL … #define WCD939X_R_EN_SPARE_BITS … #define WCD939X_HPH_R_TEST … #define WCD939X_HPH_R_ATEST … #define WCD939X_R_ATEST_DACR_REF_ATEST1_CONN … #define WCD939X_R_ATEST_LDO1_R_ATEST2_CONN … #define WCD939X_R_ATEST_LDO_R_ATEST2_CAL … #define WCD939X_R_ATEST_LDO2_R_ATEST2_CONN … #define WCD939X_R_ATEST_LDO_1P65V_ATEST1_CONN … #define WCD939X_R_ATEST_HPH_GND_OVR … #define WCD939X_HPH_RDAC_CLK_CTL1 … #define WCD939X_RDAC_CLK_CTL1_OPAMP_CHOP_CLK_EN … #define WCD939X_RDAC_CLK_CTL1_OPAMP_CHOP_CLK_DIV_CTRL … #define WCD939X_RDAC_CLK_CTL1_SPARE_BITS … #define WCD939X_HPH_RDAC_CLK_CTL2 … #define WCD939X_HPH_RDAC_LDO_CTL … #define WCD939X_HPH_RDAC_CHOP_CLK_LP_CTL … #define WCD939X_HPH_REFBUFF_UHQA_CTL … #define WCD939X_REFBUFF_UHQA_CTL_SPARE_BITS … #define WCD939X_REFBUFF_UHQA_CTL_HPH_VNEGREG2_COMP_CTL_OV … #define WCD939X_REFBUFF_UHQA_CTL_REFBUFN_RBIAS_ADJUST … #define WCD939X_REFBUFF_UHQA_CTL_REFBUFP_IOUT_CTL … #define WCD939X_REFBUFF_UHQA_CTL_REFBUFN_IOUT_CTL … #define WCD939X_HPH_REFBUFF_LP_CTL … #define WCD939X_REFBUFF_LP_CTL_HPH_VNEGREG2_CURR_COMP … #define WCD939X_REFBUFF_LP_CTL_SPARE_BITS … #define WCD939X_REFBUFF_LP_CTL_EN_PREREF_FILT_STARTUP_CLKDIV … #define WCD939X_REFBUFF_LP_CTL_PREREF_FILT_STARTUP_CLKDIV_CTL … #define WCD939X_REFBUFF_LP_CTL_PREREF_FILT_BYPASS … #define WCD939X_HPH_L_DAC_CTL … #define WCD939X_HPH_R_DAC_CTL … #define WCD939X_HPH_SURGE_COMP_SEL … #define WCD939X_HPH_SURGE_EN … #define WCD939X_EN_EN_SURGE_PROTECTION_HPHL … #define WCD939X_EN_EN_SURGE_PROTECTION_HPHR … #define WCD939X_EN_SEL_SURGE_COMP_IQ … #define WCD939X_EN_SURGE_VOLT_MODE_SHUTOFF_EN … #define WCD939X_EN_LATCH_INTR_OP_STG_HIZ_EN … #define WCD939X_EN_SURGE_LATCH_REG_RESET … #define WCD939X_EN_SWTICH_VN_VNDAC_NSURGE_EN … #define WCD939X_HPH_SURGE_MISC1 … #define WCD939X_HPH_SURGE_STATUS … #define WCD939X_EAR_EN … #define WCD939X_EAR_PA_CON … #define WCD939X_EAR_SP_CON … #define WCD939X_EAR_DAC_CON … #define WCD939X_DAC_CON_DAC_SAMPLE_EDGE_SEL … #define WCD939X_DAC_CON_REF_DBG_EN … #define WCD939X_DAC_CON_REF_DBG_GAIN … #define WCD939X_DAC_CON_GAIN_DAC … #define WCD939X_DAC_CON_INV_DATA … #define WCD939X_EAR_CNP_FSM_CON … #define WCD939X_EAR_TEST_CTL … #define WCD939X_EAR_STATUS_REG_1 … #define WCD939X_EAR_STATUS_REG_2 … #define WCD939X_FLYBACK_NEW_CTRL_2 … #define WCD939X_FLYBACK_NEW_CTRL_3 … #define WCD939X_FLYBACK_NEW_CTRL_4 … #define WCD939X_ANA_NEW_PAGE … #define WCD939X_HPH_NEW_ANA_HPH2 … #define WCD939X_HPH_NEW_ANA_HPH3 … #define WCD939X_SLEEP_CTL … #define WCD939X_SLEEP_WATCHDOG_CTL … #define WCD939X_MBHC_NEW_ELECT_REM_CLAMP_CTL … #define WCD939X_MBHC_NEW_CTL_1 … #define WCD939X_CTL_1_RCO_EN … #define WCD939X_CTL_1_ADC_MODE … #define WCD939X_CTL_1_ADC_ENABLE … #define WCD939X_CTL_1_DETECTION_DONE … #define WCD939X_CTL_1_BTN_DBNC_CTL … #define WCD939X_MBHC_NEW_CTL_2 … #define WCD939X_CTL_2_MUX_CTL … #define WCD939X_CTL_2_M_RTH_CTL … #define WCD939X_CTL_2_HS_VREF_CTL … #define WCD939X_MBHC_NEW_PLUG_DETECT_CTL … #define WCD939X_MBHC_NEW_ZDET_ANA_CTL … #define WCD939X_ZDET_ANA_CTL_AVERAGING_EN … #define WCD939X_ZDET_ANA_CTL_MAXV_CTL … #define WCD939X_ZDET_ANA_CTL_RANGE_CTL … #define WCD939X_MBHC_NEW_ZDET_RAMP_CTL … #define WCD939X_ZDET_RAMP_CTL_ACC1_MIN_CTL … #define WCD939X_ZDET_RAMP_CTL_TIME_CTL … #define WCD939X_MBHC_NEW_FSM_STATUS … #define WCD939X_FSM_STATUS_ADC_TIMEOUT … #define WCD939X_FSM_STATUS_ADC_COMPLETE … #define WCD939X_FSM_STATUS_HS_M_COMP_STATUS … #define WCD939X_FSM_STATUS_FAST_PRESS_FLAG_STATUS … #define WCD939X_FSM_STATUS_FAST_REMOVAL_FLAG_STATUS … #define WCD939X_FSM_STATUS_REMOVAL_FLAG_STATUS … #define WCD939X_FSM_STATUS_ELECT_REM_RT_STATUS … #define WCD939X_FSM_STATUS_BTN_STATUS … #define WCD939X_MBHC_NEW_ADC_RESULT … #define WCD939X_ADC_RESULT_VALUE … #define WCD939X_TX_NEW_CH12_MUX … #define WCD939X_TX_NEW_CH34_MUX … #define WCD939X_DIE_CRACK_DET_EN … #define WCD939X_DIE_CRACK_DET_OUT … #define WCD939X_HPH_NEW_INT_RDAC_GAIN_CTL … #define WCD939X_HPH_NEW_INT_PA_GAIN_CTL_L … #define WCD939X_PA_GAIN_CTL_L_EN_HPHPA_2VPK … #define WCD939X_PA_GAIN_CTL_L_RX_SUPPLY_LEVEL … #define WCD939X_PA_GAIN_CTL_L_DAC_DR_BOOST … #define WCD939X_PA_GAIN_CTL_L_VALUE … #define WCD939X_HPH_NEW_INT_RDAC_VREF_CTL … #define WCD939X_HPH_NEW_INT_RDAC_OVERRIDE_CTL … #define WCD939X_HPH_NEW_INT_PA_GAIN_CTL_R … #define WCD939X_PA_GAIN_CTL_R_D_RCO_CLK_EN … #define WCD939X_PA_GAIN_CTL_R_SPARE_BITS … #define WCD939X_PA_GAIN_CTL_R_VALUE … #define WCD939X_HPH_NEW_INT_PA_MISC1 … #define WCD939X_HPH_NEW_INT_PA_MISC2 … #define WCD939X_HPH_NEW_INT_PA_RDAC_MISC … #define WCD939X_HPH_NEW_INT_TIMER1 … #define WCD939X_TIMER1_CURR_IDIV_CTL_CMPDR_OFF … #define WCD939X_TIMER1_CURR_IDIV_CTL_AUTOCHOP … #define WCD939X_TIMER1_AUTOCHOP_TIMER_CTL_EN … #define WCD939X_HPH_NEW_INT_TIMER2 … #define WCD939X_HPH_NEW_INT_TIMER3 … #define WCD939X_HPH_NEW_INT_TIMER4 … #define WCD939X_HPH_NEW_INT_PA_RDAC_MISC2 … #define WCD939X_HPH_NEW_INT_PA_RDAC_MISC3 … #define WCD939X_HPH_NEW_INT_RDAC_HD2_CTL_L … #define WCD939X_RDAC_HD2_CTL_L_EN_HD2_RES_DIV_L … #define WCD939X_RDAC_HD2_CTL_L_HD2_RES_DIV_PULLGND_L … #define WCD939X_RDAC_HD2_CTL_L_HD2_RES_DIV_CTL_L … #define WCD939X_HPH_NEW_INT_RDAC_HD2_CTL_R … #define WCD939X_RDAC_HD2_CTL_R_EN_HD2_RES_DIV_R … #define WCD939X_RDAC_HD2_CTL_R_HD2_RES_DIV_PULLGND_L … #define WCD939X_RDAC_HD2_CTL_R_HD2_RES_DIV_CTL_R … #define WCD939X_RX_NEW_INT_HPH_RDAC_BIAS_LOHIFI … #define WCD939X_RX_NEW_INT_HPH_RDAC_BIAS_ULP … #define WCD939X_RX_NEW_INT_HPH_RDAC_LDO_LP … #define WCD939X_MBHC_NEW_INT_MOISTURE_DET_DC_CTRL … #define WCD939X_MOISTURE_DET_DC_CTRL_ONCOUNT … #define WCD939X_MOISTURE_DET_DC_CTRL_OFFCOUNT … #define WCD939X_MBHC_NEW_INT_MOISTURE_DET_POLLING_CTRL … #define WCD939X_MOISTURE_DET_POLLING_CTRL_HPHL_PA_EN … #define WCD939X_MOISTURE_DET_POLLING_CTRL_DTEST_EN … #define WCD939X_MOISTURE_DET_POLLING_CTRL_MOIST_OVRD_POLLING … #define WCD939X_MOISTURE_DET_POLLING_CTRL_MOIST_EN_POLLING … #define WCD939X_MOISTURE_DET_POLLING_CTRL_MOIST_DBNC_TIME … #define WCD939X_MBHC_NEW_INT_MECH_DET_CURRENT … #define WCD939X_MECH_DET_CURRENT_HSDET_PULLUP_CTL … #define WCD939X_MBHC_NEW_INT_ZDET_CLK_AND_MOISTURE_CTL_NEW … #define WCD939X_EAR_INT_NEW_CHOPPER_CON … #define WCD939X_EAR_INT_NEW_CNP_VCM_CON1 … #define WCD939X_EAR_INT_NEW_CNP_VCM_CON2 … #define WCD939X_EAR_INT_NEW_DYNAMIC_BIAS … #define WCD939X_SLEEP_INT_WATCHDOG_CTL_1 … #define WCD939X_SLEEP_INT_WATCHDOG_CTL_2 … #define WCD939X_DIE_CRACK_INT_DET_INT1 … #define WCD939X_DIE_CRACK_INT_DET_INT2 … #define WCD939X_TX_COM_NEW_INT_FE_DIVSTOP_L2 … #define WCD939X_TX_COM_NEW_INT_FE_DIVSTOP_L1 … #define WCD939X_TX_COM_NEW_INT_FE_DIVSTOP_L0 … #define WCD939X_TX_COM_NEW_INT_FE_DIVSTOP_ULP1P2M … #define WCD939X_TX_COM_NEW_INT_FE_DIVSTOP_ULP0P6M … #define WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG1_L2L1 … #define WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG1_L0 … #define WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG1_ULP … #define WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG2MAIN_L2L1 … #define WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG2MAIN_L0 … #define WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG2MAIN_ULP … #define WCD939X_FE_ICTRL_STG2MAIN_ULP_VALUE … #define WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG2CASC_L2L1L0 … #define WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG2CASC_ULP … #define WCD939X_FE_ICTRL_STG2CASC_ULP_ICTRL_SCBIAS_ULP0P6M … #define WCD939X_FE_ICTRL_STG2CASC_ULP_VALUE … #define WCD939X_TX_COM_NEW_INT_ADC_SCBIAS_L2L1 … #define WCD939X_TX_COM_NEW_INT_ADC_SCBIAS_L0ULP … #define WCD939X_TX_COM_NEW_INT_ADC_INT_L2 … #define WCD939X_TX_COM_NEW_INT_ADC_INT_L1 … #define WCD939X_TX_COM_NEW_INT_ADC_INT_L0 … #define WCD939X_TX_COM_NEW_INT_ADC_INT_ULP … #define WCD939X_DIGITAL_PAGE … #define WCD939X_DIGITAL_CHIP_ID0 … #define WCD939X_DIGITAL_CHIP_ID1 … #define WCD939X_DIGITAL_CHIP_ID2 … #define WCD939X_DIGITAL_CHIP_ID3 … #define WCD939X_DIGITAL_SWR_TX_CLK_RATE … #define WCD939X_DIGITAL_CDC_RST_CTL … #define WCD939X_DIGITAL_TOP_CLK_CFG … #define WCD939X_DIGITAL_CDC_ANA_CLK_CTL … #define WCD939X_CDC_ANA_CLK_CTL_ANA_TX_DIV4_CLK_EN … #define WCD939X_CDC_ANA_CLK_CTL_ANA_TX_DIV2_CLK_EN … #define WCD939X_CDC_ANA_CLK_CTL_ANA_TX_CLK_EN … #define WCD939X_CDC_ANA_CLK_CTL_ANA_RX_DIV4_CLK_EN … #define WCD939X_CDC_ANA_CLK_CTL_ANA_RX_DIV2_CLK_EN … #define WCD939X_CDC_ANA_CLK_CTL_ANA_RX_CLK_EN … #define WCD939X_CDC_ANA_CLK_CTL_ANA_TX_DIV2_CLK_EN … #define WCD939X_DIGITAL_CDC_DIG_CLK_CTL … #define WCD939X_CDC_DIG_CLK_CTL_TXD3_CLK_EN … #define WCD939X_CDC_DIG_CLK_CTL_TXD2_CLK_EN … #define WCD939X_CDC_DIG_CLK_CTL_TXD1_CLK_EN … #define WCD939X_CDC_DIG_CLK_CTL_TXD0_CLK_EN … #define WCD939X_CDC_DIG_CLK_CTL_RXD2_CLK_EN … #define WCD939X_CDC_DIG_CLK_CTL_RXD1_CLK_EN … #define WCD939X_CDC_DIG_CLK_CTL_RXD0_CLK_EN … #define WCD939X_DIGITAL_SWR_RST_EN … #define WCD939X_DIGITAL_CDC_PATH_MODE … #define WCD939X_DIGITAL_CDC_RX_RST … #define WCD939X_DIGITAL_CDC_RX0_CTL … #define WCD939X_DIGITAL_CDC_RX1_CTL … #define WCD939X_DIGITAL_CDC_RX2_CTL … #define WCD939X_DIGITAL_CDC_TX_ANA_MODE_0_1 … #define WCD939X_CDC_TX_ANA_MODE_0_1_TXD1_MODE … #define WCD939X_CDC_TX_ANA_MODE_0_1_TXD0_MODE … #define WCD939X_DIGITAL_CDC_TX_ANA_MODE_2_3 … #define WCD939X_CDC_TX_ANA_MODE_2_3_TXD3_MODE … #define WCD939X_CDC_TX_ANA_MODE_2_3_TXD2_MODE … #define WCD939X_DIGITAL_CDC_COMP_CTL_0 … #define WCD939X_CDC_COMP_CTL_0_HPHL_COMP_EN … #define WCD939X_CDC_COMP_CTL_0_HPHR_COMP_EN … #define WCD939X_DIGITAL_CDC_ANA_TX_CLK_CTL … #define WCD939X_CDC_ANA_TX_CLK_CTL_ANA_MBHC_1P2M_CLK_EN … #define WCD939X_CDC_ANA_TX_CLK_CTL_ANA_TX3_ADC_CLK_EN … #define WCD939X_CDC_ANA_TX_CLK_CTL_ANA_TX2_ADC_CLK_EN … #define WCD939X_CDC_ANA_TX_CLK_CTL_ANA_TX1_ADC_CLK_EN … #define WCD939X_CDC_ANA_TX_CLK_CTL_ANA_TX0_ADC_CLK_EN … #define WCD939X_CDC_ANA_TX_CLK_CTL_ANA_TXSCBIAS_CLK_EN … #define WCD939X_DIGITAL_CDC_HPH_DSM_A1_0 … #define WCD939X_DIGITAL_CDC_HPH_DSM_A1_1 … #define WCD939X_DIGITAL_CDC_HPH_DSM_A2_0 … #define WCD939X_DIGITAL_CDC_HPH_DSM_A2_1 … #define WCD939X_DIGITAL_CDC_HPH_DSM_A3_0 … #define WCD939X_DIGITAL_CDC_HPH_DSM_A3_1 … #define WCD939X_DIGITAL_CDC_HPH_DSM_A4_0 … #define WCD939X_DIGITAL_CDC_HPH_DSM_A4_1 … #define WCD939X_DIGITAL_CDC_HPH_DSM_A5_0 … #define WCD939X_DIGITAL_CDC_HPH_DSM_A5_1 … #define WCD939X_DIGITAL_CDC_HPH_DSM_A6_0 … #define WCD939X_DIGITAL_CDC_HPH_DSM_A7_0 … #define WCD939X_DIGITAL_CDC_HPH_DSM_C_0 … #define WCD939X_DIGITAL_CDC_HPH_DSM_C_1 … #define WCD939X_DIGITAL_CDC_HPH_DSM_C_2 … #define WCD939X_DIGITAL_CDC_HPH_DSM_C_3 … #define WCD939X_DIGITAL_CDC_HPH_DSM_R1 … #define WCD939X_DIGITAL_CDC_HPH_DSM_R2 … #define WCD939X_DIGITAL_CDC_HPH_DSM_R3 … #define WCD939X_DIGITAL_CDC_HPH_DSM_R4 … #define WCD939X_DIGITAL_CDC_HPH_DSM_R5 … #define WCD939X_DIGITAL_CDC_HPH_DSM_R6 … #define WCD939X_DIGITAL_CDC_HPH_DSM_R7 … #define WCD939X_DIGITAL_CDC_EAR_DSM_A1_0 … #define WCD939X_DIGITAL_CDC_EAR_DSM_A1_1 … #define WCD939X_DIGITAL_CDC_EAR_DSM_A2_0 … #define WCD939X_DIGITAL_CDC_EAR_DSM_A2_1 … #define WCD939X_DIGITAL_CDC_EAR_DSM_A3_0 … #define WCD939X_DIGITAL_CDC_EAR_DSM_A3_1 … #define WCD939X_DIGITAL_CDC_EAR_DSM_A4_0 … #define WCD939X_DIGITAL_CDC_EAR_DSM_A4_1 … #define WCD939X_DIGITAL_CDC_EAR_DSM_A5_0 … #define WCD939X_DIGITAL_CDC_EAR_DSM_A5_1 … #define WCD939X_DIGITAL_CDC_EAR_DSM_A6_0 … #define WCD939X_DIGITAL_CDC_EAR_DSM_A7_0 … #define WCD939X_DIGITAL_CDC_EAR_DSM_C_0 … #define WCD939X_DIGITAL_CDC_EAR_DSM_C_1 … #define WCD939X_DIGITAL_CDC_EAR_DSM_C_2 … #define WCD939X_DIGITAL_CDC_EAR_DSM_C_3 … #define WCD939X_DIGITAL_CDC_EAR_DSM_R1 … #define WCD939X_DIGITAL_CDC_EAR_DSM_R2 … #define WCD939X_DIGITAL_CDC_EAR_DSM_R3 … #define WCD939X_DIGITAL_CDC_EAR_DSM_R4 … #define WCD939X_DIGITAL_CDC_EAR_DSM_R5 … #define WCD939X_DIGITAL_CDC_EAR_DSM_R6 … #define WCD939X_DIGITAL_CDC_EAR_DSM_R7 … #define WCD939X_DIGITAL_CDC_HPH_GAIN_RX_0 … #define WCD939X_DIGITAL_CDC_HPH_GAIN_RX_1 … #define WCD939X_DIGITAL_CDC_HPH_GAIN_DSD_0 … #define WCD939X_DIGITAL_CDC_HPH_GAIN_DSD_1 … #define WCD939X_DIGITAL_CDC_HPH_GAIN_DSD_2 … #define WCD939X_DIGITAL_CDC_EAR_GAIN_DSD_0 … #define WCD939X_DIGITAL_CDC_EAR_GAIN_DSD_1 … #define WCD939X_DIGITAL_CDC_EAR_GAIN_DSD_2 … #define WCD939X_DIGITAL_CDC_HPH_GAIN_CTL … #define WCD939X_CDC_HPH_GAIN_CTL_HPH_STEREO_EN … #define WCD939X_CDC_HPH_GAIN_CTL_HPHR_RX_EN … #define WCD939X_CDC_HPH_GAIN_CTL_HPHL_RX_EN … #define WCD939X_CDC_HPH_GAIN_CTL_HPHR_DSD_EN … #define WCD939X_CDC_HPH_GAIN_CTL_HPHL_DSD_EN … #define WCD939X_DIGITAL_CDC_EAR_GAIN_CTL … #define WCD939X_CDC_EAR_GAIN_CTL_EAR_EN … #define WCD939X_DIGITAL_CDC_EAR_PATH_CTL … #define WCD939X_DIGITAL_CDC_SWR_CLH … #define WCD939X_CDC_SWR_CLH_CLH_CTL … #define WCD939X_DIGITAL_SWR_CLH_BYP … #define WCD939X_DIGITAL_CDC_TX0_CTL … #define WCD939X_DIGITAL_CDC_TX1_CTL … #define WCD939X_DIGITAL_CDC_TX2_CTL … #define WCD939X_DIGITAL_CDC_TX_RST … #define WCD939X_DIGITAL_CDC_REQ_CTL … #define WCD939X_CDC_REQ_CTL_TX3_WIDE_BAND … #define WCD939X_CDC_REQ_CTL_TX2_WIDE_BAND … #define WCD939X_CDC_REQ_CTL_TX1_WIDE_BAND … #define WCD939X_CDC_REQ_CTL_TX0_WIDE_BAND … #define WCD939X_CDC_REQ_CTL_FS_RATE_4P8 … #define WCD939X_CDC_REQ_CTL_NO_NOTCH … #define WCD939X_DIGITAL_CDC_RST … #define WCD939X_DIGITAL_CDC_AMIC_CTL … #define WCD939X_CDC_AMIC_CTL_AMIC5_IN_SEL … #define WCD939X_CDC_AMIC_CTL_AMIC4_IN_SEL … #define WCD939X_CDC_AMIC_CTL_AMIC3_IN_SEL … #define WCD939X_CDC_AMIC_CTL_AMIC1_IN_SEL … #define WCD939X_DIGITAL_CDC_DMIC_CTL … #define WCD939X_CDC_DMIC_CTL_DMIC_LEGACY_SW_MODE … #define WCD939X_CDC_DMIC_CTL_DMIC_DIV_BAK_EN … #define WCD939X_CDC_DMIC_CTL_CLK_SCALE_EN … #define WCD939X_CDC_DMIC_CTL_SOFT_RESET … #define WCD939X_DIGITAL_CDC_DMIC1_CTL … #define WCD939X_CDC_DMIC1_CTL_DMIC_CLK_SCALE_SEL … #define WCD939X_CDC_DMIC1_CTL_DMIC_CLK_EN … #define WCD939X_CDC_DMIC1_CTL_DMIC_CLK_SEL … #define WCD939X_DIGITAL_CDC_DMIC2_CTL … #define WCD939X_CDC_DMIC2_CTL_DMIC_LEFT_EN … #define WCD939X_CDC_DMIC2_CTL_DMIC_CLK_SCALE_SEL … #define WCD939X_CDC_DMIC2_CTL_DMIC_CLK_EN … #define WCD939X_CDC_DMIC2_CTL_DMIC_CLK_SEL … #define WCD939X_DIGITAL_CDC_DMIC3_CTL … #define WCD939X_CDC_DMIC3_CTL_DMIC_CLK_SCALE_SEL … #define WCD939X_CDC_DMIC3_CTL_DMIC_CLK_EN … #define WCD939X_CDC_DMIC3_CTL_DMIC_CLK_SEL … #define WCD939X_DIGITAL_CDC_DMIC4_CTL … #define WCD939X_CDC_DMIC4_CTL_DMIC_CLK_SCALE_SEL … #define WCD939X_CDC_DMIC4_CTL_DMIC_CLK_EN … #define WCD939X_CDC_DMIC4_CTL_DMIC_CLK_SEL … #define WCD939X_DIGITAL_EFUSE_PRG_CTL … #define WCD939X_DIGITAL_EFUSE_CTL … #define WCD939X_DIGITAL_CDC_DMIC_RATE_1_2 … #define WCD939X_CDC_DMIC_RATE_1_2_DMIC2_RATE … #define WCD939X_CDC_DMIC_RATE_1_2_DMIC1_RATE … #define WCD939X_DIGITAL_CDC_DMIC_RATE_3_4 … #define WCD939X_CDC_DMIC_RATE_3_4_DMIC4_RATE … #define WCD939X_CDC_DMIC_RATE_3_4_DMIC3_RATE … #define WCD939X_DIGITAL_PDM_WD_CTL0 … #define WCD939X_PDM_WD_CTL0_HOLD_OFF … #define WCD939X_PDM_WD_CTL0_TIME_OUT_SEL … #define WCD939X_PDM_WD_CTL0_PDM_WD_EN … #define WCD939X_DIGITAL_PDM_WD_CTL1 … #define WCD939X_PDM_WD_CTL1_HOLD_OFF … #define WCD939X_PDM_WD_CTL1_TIME_OUT_SEL … #define WCD939X_PDM_WD_CTL1_PDM_WD_EN … #define WCD939X_DIGITAL_PDM_WD_CTL2 … #define WCD939X_DIGITAL_INTR_MODE … #define WCD939X_DIGITAL_INTR_MASK_0 … #define WCD939X_DIGITAL_INTR_MASK_1 … #define WCD939X_DIGITAL_INTR_MASK_2 … #define WCD939X_DIGITAL_INTR_STATUS_0 … #define WCD939X_DIGITAL_INTR_STATUS_1 … #define WCD939X_DIGITAL_INTR_STATUS_2 … #define WCD939X_DIGITAL_INTR_CLEAR_0 … #define WCD939X_DIGITAL_INTR_CLEAR_1 … #define WCD939X_DIGITAL_INTR_CLEAR_2 … #define WCD939X_DIGITAL_INTR_LEVEL_0 … #define WCD939X_DIGITAL_INTR_LEVEL_1 … #define WCD939X_DIGITAL_INTR_LEVEL_2 … #define WCD939X_DIGITAL_INTR_SET_0 … #define WCD939X_DIGITAL_INTR_SET_1 … #define WCD939X_DIGITAL_INTR_SET_2 … #define WCD939X_DIGITAL_INTR_TEST_0 … #define WCD939X_DIGITAL_INTR_TEST_1 … #define WCD939X_DIGITAL_INTR_TEST_2 … #define WCD939X_DIGITAL_TX_MODE_DBG_EN … #define WCD939X_DIGITAL_TX_MODE_DBG_0_1 … #define WCD939X_DIGITAL_TX_MODE_DBG_2_3 … #define WCD939X_DIGITAL_LB_IN_SEL_CTL … #define WCD939X_DIGITAL_LOOP_BACK_MODE … #define WCD939X_DIGITAL_SWR_DAC_TEST … #define WCD939X_DIGITAL_SWR_HM_TEST_RX_0 … #define WCD939X_DIGITAL_SWR_HM_TEST_TX_0 … #define WCD939X_DIGITAL_SWR_HM_TEST_RX_1 … #define WCD939X_DIGITAL_SWR_HM_TEST_TX_1 … #define WCD939X_DIGITAL_SWR_HM_TEST_TX_2 … #define WCD939X_DIGITAL_SWR_HM_TEST_0 … #define WCD939X_DIGITAL_SWR_HM_TEST_1 … #define WCD939X_DIGITAL_PAD_CTL_SWR_0 … #define WCD939X_DIGITAL_PAD_CTL_SWR_1 … #define WCD939X_DIGITAL_I2C_CTL … #define WCD939X_DIGITAL_CDC_TX_TANGGU_SW_MODE … #define WCD939X_DIGITAL_EFUSE_TEST_CTL_0 … #define WCD939X_DIGITAL_EFUSE_TEST_CTL_1 … #define WCD939X_DIGITAL_EFUSE_T_DATA_0 … #define WCD939X_DIGITAL_EFUSE_T_DATA_1 … #define WCD939X_DIGITAL_PAD_CTL_PDM_RX0 … #define WCD939X_DIGITAL_PAD_CTL_PDM_RX1 … #define WCD939X_DIGITAL_PAD_CTL_PDM_TX0 … #define WCD939X_DIGITAL_PAD_CTL_PDM_TX1 … #define WCD939X_DIGITAL_PAD_CTL_PDM_TX2 … #define WCD939X_DIGITAL_PAD_INP_DIS_0 … #define WCD939X_DIGITAL_PAD_INP_DIS_1 … #define WCD939X_DIGITAL_DRIVE_STRENGTH_0 … #define WCD939X_DIGITAL_DRIVE_STRENGTH_1 … #define WCD939X_DIGITAL_DRIVE_STRENGTH_2 … #define WCD939X_DIGITAL_RX_DATA_EDGE_CTL … #define WCD939X_DIGITAL_TX_DATA_EDGE_CTL … #define WCD939X_DIGITAL_GPIO_MODE … #define WCD939X_DIGITAL_PIN_CTL_OE … #define WCD939X_DIGITAL_PIN_CTL_DATA_0 … #define WCD939X_DIGITAL_PIN_CTL_DATA_1 … #define WCD939X_DIGITAL_PIN_STATUS_0 … #define WCD939X_DIGITAL_PIN_STATUS_1 … #define WCD939X_DIGITAL_DIG_DEBUG_CTL … #define WCD939X_DIGITAL_DIG_DEBUG_EN … #define WCD939X_DIGITAL_ANA_CSR_DBG_ADD … #define WCD939X_DIGITAL_ANA_CSR_DBG_CTL … #define WCD939X_DIGITAL_SSP_DBG … #define WCD939X_DIGITAL_MODE_STATUS_0 … #define WCD939X_DIGITAL_MODE_STATUS_1 … #define WCD939X_DIGITAL_SPARE_0 … #define WCD939X_DIGITAL_SPARE_1 … #define WCD939X_DIGITAL_SPARE_2 … #define WCD939X_DIGITAL_EFUSE_REG_0 … #define WCD939X_EFUSE_REG_0_WCD939X_ID … #define WCD939X_EFUSE_REG_0_EFUSE_BLOWN … #define WCD939X_DIGITAL_EFUSE_REG_1 … #define WCD939X_DIGITAL_EFUSE_REG_2 … #define WCD939X_DIGITAL_EFUSE_REG_3 … #define WCD939X_DIGITAL_EFUSE_REG_4 … #define WCD939X_DIGITAL_EFUSE_REG_5 … #define WCD939X_DIGITAL_EFUSE_REG_6 … #define WCD939X_DIGITAL_EFUSE_REG_7 … #define WCD939X_DIGITAL_EFUSE_REG_8 … #define WCD939X_DIGITAL_EFUSE_REG_9 … #define WCD939X_DIGITAL_EFUSE_REG_10 … #define WCD939X_DIGITAL_EFUSE_REG_11 … #define WCD939X_DIGITAL_EFUSE_REG_12 … #define WCD939X_DIGITAL_EFUSE_REG_13 … #define WCD939X_DIGITAL_EFUSE_REG_14 … #define WCD939X_DIGITAL_EFUSE_REG_15 … #define WCD939X_DIGITAL_EFUSE_REG_16 … #define WCD939X_DIGITAL_EFUSE_REG_17 … #define WCD939X_DIGITAL_EFUSE_REG_18 … #define WCD939X_DIGITAL_EFUSE_REG_19 … #define WCD939X_DIGITAL_EFUSE_REG_20 … #define WCD939X_DIGITAL_EFUSE_REG_21 … #define WCD939X_DIGITAL_EFUSE_REG_22 … #define WCD939X_DIGITAL_EFUSE_REG_23 … #define WCD939X_DIGITAL_EFUSE_REG_24 … #define WCD939X_DIGITAL_EFUSE_REG_25 … #define WCD939X_DIGITAL_EFUSE_REG_26 … #define WCD939X_DIGITAL_EFUSE_REG_27 … #define WCD939X_DIGITAL_EFUSE_REG_28 … #define WCD939X_DIGITAL_EFUSE_REG_29 … #define WCD939X_DIGITAL_EFUSE_REG_30 … #define WCD939X_DIGITAL_EFUSE_REG_31 … #define WCD939X_DIGITAL_TX_REQ_FB_CTL_0 … #define WCD939X_DIGITAL_TX_REQ_FB_CTL_1 … #define WCD939X_DIGITAL_TX_REQ_FB_CTL_2 … #define WCD939X_DIGITAL_TX_REQ_FB_CTL_3 … #define WCD939X_DIGITAL_TX_REQ_FB_CTL_4 … #define WCD939X_DIGITAL_DEM_BYPASS_DATA0 … #define WCD939X_DIGITAL_DEM_BYPASS_DATA1 … #define WCD939X_DIGITAL_DEM_BYPASS_DATA2 … #define WCD939X_DIGITAL_DEM_BYPASS_DATA3 … #define WCD939X_DIGITAL_DEM_SECOND_ORDER … #define WCD939X_DIGITAL_DSM_CTRL … #define WCD939X_DIGITAL_DSM_0_STATIC_DATA_0 … #define WCD939X_DIGITAL_DSM_0_STATIC_DATA_1 … #define WCD939X_DIGITAL_DSM_0_STATIC_DATA_2 … #define WCD939X_DIGITAL_DSM_0_STATIC_DATA_3 … #define WCD939X_DIGITAL_DSM_1_STATIC_DATA_0 … #define WCD939X_DIGITAL_DSM_1_STATIC_DATA_1 … #define WCD939X_DIGITAL_DSM_1_STATIC_DATA_2 … #define WCD939X_DIGITAL_DSM_1_STATIC_DATA_3 … #define WCD939X_RX_TOP_PAGE … #define WCD939X_RX_TOP_TOP_CFG0 … #define WCD939X_TOP_CFG0_HPH_DAC_RATE_SEL … #define WCD939X_TOP_CFG0_PGA_UPDATE … #define WCD939X_RX_TOP_HPHL_COMP_WR_LSB … #define WCD939X_RX_TOP_HPHL_COMP_WR_MSB … #define WCD939X_RX_TOP_HPHL_COMP_LUT … #define WCD939X_RX_TOP_HPHL_COMP_RD_LSB … #define WCD939X_RX_TOP_HPHL_COMP_RD_MSB … #define WCD939X_RX_TOP_HPHR_COMP_WR_LSB … #define WCD939X_RX_TOP_HPHR_COMP_WR_MSB … #define WCD939X_RX_TOP_HPHR_COMP_LUT … #define WCD939X_RX_TOP_HPHR_COMP_RD_LSB … #define WCD939X_RX_TOP_HPHR_COMP_RD_MSB … #define WCD939X_RX_TOP_DSD0_DEBUG_CFG1 … #define WCD939X_RX_TOP_DSD0_DEBUG_CFG2 … #define WCD939X_RX_TOP_DSD0_DEBUG_CFG3 … #define WCD939X_RX_TOP_DSD0_DEBUG_CFG4 … #define WCD939X_RX_TOP_DSD0_DEBUG_CFG5 … #define WCD939X_RX_TOP_DSD0_DEBUG_CFG6 … #define WCD939X_RX_TOP_DSD1_DEBUG_CFG1 … #define WCD939X_RX_TOP_DSD1_DEBUG_CFG2 … #define WCD939X_RX_TOP_DSD1_DEBUG_CFG3 … #define WCD939X_RX_TOP_DSD1_DEBUG_CFG4 … #define WCD939X_RX_TOP_DSD1_DEBUG_CFG5 … #define WCD939X_RX_TOP_DSD1_DEBUG_CFG6 … #define WCD939X_RX_TOP_HPHL_PATH_CFG0 … #define WCD939X_HPHL_PATH_CFG0_INT_EN … #define WCD939X_HPHL_PATH_CFG0_DLY_ZN_EN … #define WCD939X_RX_TOP_HPHL_PATH_CFG1 … #define WCD939X_HPHL_PATH_CFG1_DSM_SOFT_RST … #define WCD939X_HPHL_PATH_CFG1_INT_SOFT_RST … #define WCD939X_HPHL_PATH_CFG1_FMT_CONV … #define WCD939X_HPHL_PATH_CFG1_IDLE_OVRD_EN … #define WCD939X_HPHL_PATH_CFG1_RX_DC_DROOP_COEFF_SEL … #define WCD939X_RX_TOP_HPHR_PATH_CFG0 … #define WCD939X_HPHR_PATH_CFG0_INT_EN … #define WCD939X_HPHR_PATH_CFG0_DLY_ZN_EN … #define WCD939X_RX_TOP_HPHR_PATH_CFG1 … #define WCD939X_HPHR_PATH_CFG1_DSM_SOFT_RST … #define WCD939X_HPHR_PATH_CFG1_INT_SOFT_RST … #define WCD939X_HPHR_PATH_CFG1_FMT_CONV … #define WCD939X_HPHR_PATH_CFG1_IDLE_OVRD_EN … #define WCD939X_HPHR_PATH_CFG1_RX_DC_DROOP_COEFF_SEL … #define WCD939X_RX_TOP_PATH_CFG2 … #define WCD939X_RX_TOP_HPHL_PATH_SEC0 … #define WCD939X_RX_TOP_HPHL_PATH_SEC1 … #define WCD939X_RX_TOP_HPHL_PATH_SEC2 … #define WCD939X_RX_TOP_HPHL_PATH_SEC3 … #define WCD939X_RX_TOP_HPHR_PATH_SEC0 … #define WCD939X_RX_TOP_HPHR_PATH_SEC1 … #define WCD939X_RX_TOP_HPHR_PATH_SEC2 … #define WCD939X_RX_TOP_HPHR_PATH_SEC3 … #define WCD939X_RX_TOP_PATH_SEC4 … #define WCD939X_RX_TOP_PATH_SEC5 … #define WCD939X_COMPANDER_HPHL_CTL0 … #define WCD939X_COMPANDER_HPHL_CTL1 … #define WCD939X_COMPANDER_HPHL_CTL2 … #define WCD939X_COMPANDER_HPHL_CTL3 … #define WCD939X_COMPANDER_HPHL_CTL4 … #define WCD939X_COMPANDER_HPHL_CTL5 … #define WCD939X_COMPANDER_HPHL_CTL6 … #define WCD939X_COMPANDER_HPHL_CTL7 … #define WCD939X_COMPANDER_HPHL_CTL8 … #define WCD939X_COMPANDER_HPHL_CTL9 … #define WCD939X_COMPANDER_HPHL_CTL10 … #define WCD939X_COMPANDER_HPHL_CTL11 … #define WCD939X_COMPANDER_HPHL_CTL12 … #define WCD939X_COMPANDER_HPHL_CTL13 … #define WCD939X_COMPANDER_HPHL_CTL14 … #define WCD939X_COMPANDER_HPHL_CTL15 … #define WCD939X_COMPANDER_HPHL_CTL16 … #define WCD939X_COMPANDER_HPHL_CTL17 … #define WCD939X_COMPANDER_HPHL_CTL18 … #define WCD939X_COMPANDER_HPHL_CTL19 … #define WCD939X_R_CTL0 … #define WCD939X_R_CTL1 … #define WCD939X_R_CTL2 … #define WCD939X_R_CTL3 … #define WCD939X_R_CTL4 … #define WCD939X_R_CTL5 … #define WCD939X_R_CTL6 … #define WCD939X_R_CTL7 … #define WCD939X_R_CTL8 … #define WCD939X_R_CTL9 … #define WCD939X_R_CTL10 … #define WCD939X_R_CTL11 … #define WCD939X_R_CTL12 … #define WCD939X_R_CTL13 … #define WCD939X_R_CTL14 … #define WCD939X_R_CTL15 … #define WCD939X_R_CTL16 … #define WCD939X_R_CTL17 … #define WCD939X_R_CTL18 … #define WCD939X_R_CTL19 … #define WCD939X_E_PATH_CTL … #define WCD939X_E_CFG0 … #define WCD939X_CFG0_AUTO_DISABLE_ANC … #define WCD939X_CFG0_AUTO_DISABLE_DSD … #define WCD939X_CFG0_IDLE_STEREO … #define WCD939X_E_CFG1 … #define WCD939X_E_CFG2 … #define WCD939X_E_CFG3 … #define WCD939X_DSD_HPHL_PATH_CTL … #define WCD939X_DSD_HPHL_CFG0 … #define WCD939X_DSD_HPHL_CFG1 … #define WCD939X_DSD_HPHL_CFG2 … #define WCD939X_DSD_HPHL_CFG3 … #define WCD939X_DSD_HPHL_CFG4 … #define WCD939X_DSD_HPHL_CFG5 … #define WCD939X_DSD_HPHR_PATH_CTL … #define WCD939X_DSD_HPHR_CFG0 … #define WCD939X_DSD_HPHR_CFG1 … #define WCD939X_DSD_HPHR_CFG2 … #define WCD939X_DSD_HPHR_CFG3 … #define WCD939X_DSD_HPHR_CFG4 … #define WCD939X_DSD_HPHR_CFG5 … #define WCD939X_MAX_REGISTER … #define WCD939X_MAX_SWR_PORTS … #define WCD939X_MAX_RX_SWR_PORTS … #define WCD939X_MAX_TX_SWR_PORTS … #define WCD939X_MAX_SWR_CH_IDS … struct wcd939x_sdw_ch_info { … }; #define WCD_SDW_CH(id, pn, cmask) … enum wcd939x_tx_sdw_ports { … }; enum wcd939x_tx_sdw_channels { … }; enum wcd939x_rx_sdw_ports { … }; enum wcd939x_rx_sdw_channels { … }; struct wcd939x_priv; struct wcd939x_sdw_priv { … }; #if IS_ENABLED(CONFIG_SND_SOC_WCD939X_SDW) int wcd939x_sdw_free(struct wcd939x_sdw_priv *wcd, struct snd_pcm_substream *substream, struct snd_soc_dai *dai); int wcd939x_sdw_set_sdw_stream(struct wcd939x_sdw_priv *wcd, struct snd_soc_dai *dai, void *stream, int direction); int wcd939x_sdw_hw_params(struct wcd939x_sdw_priv *wcd, struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai); struct device *wcd939x_sdw_device_get(struct device_node *np); unsigned int wcd939x_swr_get_current_bank(struct sdw_slave *sdev); struct regmap *wcd939x_swr_get_regmap(struct wcd939x_sdw_priv *wcd); #else static inline int wcd939x_sdw_free(struct wcd939x_sdw_priv *wcd, struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { return -EOPNOTSUPP; } static inline int wcd939x_sdw_set_sdw_stream(struct wcd939x_sdw_priv *wcd, struct snd_soc_dai *dai, void *stream, int direction) { return -EOPNOTSUPP; } static inline int wcd939x_sdw_hw_params(struct wcd939x_sdw_priv *wcd, struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) { return -EOPNOTSUPP; } static inline struct device *wcd939x_sdw_device_get(struct device_node *np) { return NULL; } static inline unsigned int wcd939x_swr_get_current_bank(struct sdw_slave *sdev) { return 0; } struct regmap *wcd939x_swr_get_regmap(struct wcd939x_sdw_priv *wcd) { return PTR_ERR(-EINVAL); } #endif /* CONFIG_SND_SOC_WCD939X_SDW */ #endif /* __WCD939X_H__ */
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