linux/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

/*
 * Copyright 2019 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */

#include "amdgpu.h"
#include "mmhub_v2_0.h"

#include "mmhub/mmhub_2_0_0_offset.h"
#include "mmhub/mmhub_2_0_0_sh_mask.h"
#include "mmhub/mmhub_2_0_0_default.h"
#include "navi10_enum.h"

#include "gc/gc_10_1_0_offset.h"
#include "soc15_common.h"

#define mmDAGB0_CNTL_MISC2_Sienna_Cichlid …
#define mmDAGB0_CNTL_MISC2_Sienna_Cichlid_BASE_IDX …

static const char *mmhub_client_ids_navi1x[][2] = …;

static const char *mmhub_client_ids_sienna_cichlid[][2] = …;

static const char *mmhub_client_ids_beige_goby[][2] = …;

static uint32_t mmhub_v2_0_get_invalidate_req(unsigned int vmid,
					      uint32_t flush_type)
{ … }

static void
mmhub_v2_0_print_l2_protection_fault_status(struct amdgpu_device *adev,
					     uint32_t status)
{ … }

static void mmhub_v2_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
				uint64_t page_table_base)
{ … }

static void mmhub_v2_0_init_gart_aperture_regs(struct amdgpu_device *adev)
{ … }

static void mmhub_v2_0_init_system_aperture_regs(struct amdgpu_device *adev)
{ … }

static void mmhub_v2_0_init_tlb_regs(struct amdgpu_device *adev)
{ … }

static void mmhub_v2_0_init_cache_regs(struct amdgpu_device *adev)
{ … }

static void mmhub_v2_0_enable_system_domain(struct amdgpu_device *adev)
{ … }

static void mmhub_v2_0_disable_identity_aperture(struct amdgpu_device *adev)
{ … }

static void mmhub_v2_0_setup_vmid_config(struct amdgpu_device *adev)
{ … }

static void mmhub_v2_0_program_invalidation(struct amdgpu_device *adev)
{ … }

static int mmhub_v2_0_gart_enable(struct amdgpu_device *adev)
{ … }

static void mmhub_v2_0_gart_disable(struct amdgpu_device *adev)
{ … }

/**
 * mmhub_v2_0_set_fault_enable_default - update GART/VM fault handling
 *
 * @adev: amdgpu_device pointer
 * @value: true redirects VM faults to the default page
 */
static void mmhub_v2_0_set_fault_enable_default(struct amdgpu_device *adev, bool value)
{ … }

static const struct amdgpu_vmhub_funcs mmhub_v2_0_vmhub_funcs = …;

static void mmhub_v2_0_init(struct amdgpu_device *adev)
{ … }

static void mmhub_v2_0_update_medium_grain_clock_gating(struct amdgpu_device *adev,
							bool enable)
{ … }

static void mmhub_v2_0_update_medium_grain_light_sleep(struct amdgpu_device *adev,
						       bool enable)
{ … }

static int mmhub_v2_0_set_clockgating(struct amdgpu_device *adev,
			       enum amd_clockgating_state state)
{ … }

static void mmhub_v2_0_get_clockgating(struct amdgpu_device *adev, u64 *flags)
{ … }

const struct amdgpu_mmhub_funcs mmhub_v2_0_funcs = …;