/* * Copyright (C) 2020 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included * in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ #ifndef _mmhub_2_3_0_DEFAULT_HEADER #define _mmhub_2_3_0_DEFAULT_HEADER // addressBlock: mmhub_dagbdec #define mmDAGB0_RDCLI0_DEFAULT … #define mmDAGB0_RDCLI1_DEFAULT … #define mmDAGB0_RDCLI2_DEFAULT … #define mmDAGB0_RDCLI3_DEFAULT … #define mmDAGB0_RDCLI4_DEFAULT … #define mmDAGB0_RDCLI5_DEFAULT … #define mmDAGB0_RDCLI6_DEFAULT … #define mmDAGB0_RDCLI7_DEFAULT … #define mmDAGB0_RDCLI8_DEFAULT … #define mmDAGB0_RDCLI9_DEFAULT … #define mmDAGB0_RDCLI10_DEFAULT … #define mmDAGB0_RDCLI11_DEFAULT … #define mmDAGB0_RDCLI12_DEFAULT … #define mmDAGB0_RDCLI13_DEFAULT … #define mmDAGB0_RDCLI14_DEFAULT … #define mmDAGB0_RDCLI15_DEFAULT … #define mmDAGB0_RDCLI16_DEFAULT … #define mmDAGB0_RDCLI17_DEFAULT … #define mmDAGB0_RDCLI18_DEFAULT … #define mmDAGB0_RDCLI19_DEFAULT … #define mmDAGB0_RDCLI20_DEFAULT … #define mmDAGB0_RDCLI21_DEFAULT … #define mmDAGB0_RDCLI22_DEFAULT … #define mmDAGB0_RDCLI23_DEFAULT … #define mmDAGB0_RDCLI24_DEFAULT … #define mmDAGB0_RDCLI25_DEFAULT … #define mmDAGB0_RDCLI26_DEFAULT … #define mmDAGB0_RDCLI27_DEFAULT … #define mmDAGB0_RDCLI28_DEFAULT … #define mmDAGB0_RDCLI29_DEFAULT … #define mmDAGB0_RDCLI30_DEFAULT … #define mmDAGB0_RD_CNTL_DEFAULT … #define mmDAGB0_RD_GMI_CNTL_DEFAULT … #define mmDAGB0_RD_ADDR_DAGB_DEFAULT … #define mmDAGB0_RD_OUTPUT_DAGB_MAX_BURST_DEFAULT … #define mmDAGB0_RD_OUTPUT_DAGB_LAZY_TIMER_DEFAULT … #define mmDAGB0_RD_CGTT_CLK_CTRL_DEFAULT … #define mmDAGB0_L1TLB_RD_CGTT_CLK_CTRL_DEFAULT … #define mmDAGB0_ATCVM_RD_CGTT_CLK_CTRL_DEFAULT … #define mmDAGB0_RD_ADDR_DAGB_MAX_BURST0_DEFAULT … #define mmDAGB0_RD_ADDR_DAGB_LAZY_TIMER0_DEFAULT … #define mmDAGB0_RD_ADDR_DAGB_MAX_BURST1_DEFAULT … #define mmDAGB0_RD_ADDR_DAGB_LAZY_TIMER1_DEFAULT … #define mmDAGB0_RD_ADDR_DAGB_MAX_BURST2_DEFAULT … #define mmDAGB0_RD_ADDR_DAGB_LAZY_TIMER2_DEFAULT … #define mmDAGB0_RD_ADDR_DAGB_MAX_BURST3_DEFAULT … #define mmDAGB0_RD_ADDR_DAGB_LAZY_TIMER3_DEFAULT … #define mmDAGB0_RD_VC0_CNTL_DEFAULT … #define mmDAGB0_RD_VC1_CNTL_DEFAULT … #define mmDAGB0_RD_VC2_CNTL_DEFAULT … #define mmDAGB0_RD_VC3_CNTL_DEFAULT … #define mmDAGB0_RD_VC4_CNTL_DEFAULT … #define mmDAGB0_RD_VC5_CNTL_DEFAULT … #define mmDAGB0_RD_VC6_CNTL_DEFAULT … #define mmDAGB0_RD_VC7_CNTL_DEFAULT … #define mmDAGB0_RD_CNTL_MISC_DEFAULT … #define mmDAGB0_RD_TLB_CREDIT_DEFAULT … #define mmDAGB0_RD_RDRET_CREDIT_CNTL_DEFAULT … #define mmDAGB0_RD_RDRET_CREDIT_CNTL2_DEFAULT … #define mmDAGB0_RDCLI_ASK_PENDING_DEFAULT … #define mmDAGB0_RDCLI_GO_PENDING_DEFAULT … #define mmDAGB0_RDCLI_GBLSEND_PENDING_DEFAULT … #define mmDAGB0_RDCLI_TLB_PENDING_DEFAULT … #define mmDAGB0_RDCLI_OARB_PENDING_DEFAULT … #define mmDAGB0_RDCLI_OSD_PENDING_DEFAULT … #define mmDAGB0_WRCLI0_DEFAULT … #define mmDAGB0_WRCLI1_DEFAULT … #define mmDAGB0_WRCLI2_DEFAULT … #define mmDAGB0_WRCLI3_DEFAULT … #define mmDAGB0_WRCLI4_DEFAULT … #define mmDAGB0_WRCLI5_DEFAULT … #define mmDAGB0_WRCLI6_DEFAULT … #define mmDAGB0_WRCLI7_DEFAULT … #define mmDAGB0_WRCLI8_DEFAULT … #define mmDAGB0_WRCLI9_DEFAULT … #define mmDAGB0_WRCLI10_DEFAULT … #define mmDAGB0_WRCLI11_DEFAULT … #define mmDAGB0_WRCLI12_DEFAULT … #define mmDAGB0_WRCLI13_DEFAULT … #define mmDAGB0_WRCLI14_DEFAULT … #define mmDAGB0_WRCLI15_DEFAULT … #define mmDAGB0_WRCLI16_DEFAULT … #define mmDAGB0_WRCLI17_DEFAULT … #define mmDAGB0_WRCLI18_DEFAULT … #define mmDAGB0_WRCLI19_DEFAULT … #define mmDAGB0_WRCLI20_DEFAULT … #define mmDAGB0_WRCLI21_DEFAULT … #define mmDAGB0_WRCLI22_DEFAULT … #define mmDAGB0_WRCLI23_DEFAULT … #define mmDAGB0_WRCLI24_DEFAULT … #define mmDAGB0_WRCLI25_DEFAULT … #define mmDAGB0_WRCLI26_DEFAULT … #define mmDAGB0_WRCLI27_DEFAULT … #define mmDAGB0_WRCLI28_DEFAULT … #define mmDAGB0_WRCLI29_DEFAULT … #define mmDAGB0_WRCLI30_DEFAULT … #define mmDAGB0_WR_CNTL_DEFAULT … #define mmDAGB0_WR_GMI_CNTL_DEFAULT … #define mmDAGB0_WR_ADDR_DAGB_DEFAULT … #define mmDAGB0_WR_OUTPUT_DAGB_MAX_BURST_DEFAULT … #define mmDAGB0_WR_OUTPUT_DAGB_LAZY_TIMER_DEFAULT … #define mmDAGB0_WR_CGTT_CLK_CTRL_DEFAULT … #define mmDAGB0_L1TLB_WR_CGTT_CLK_CTRL_DEFAULT … #define mmDAGB0_ATCVM_WR_CGTT_CLK_CTRL_DEFAULT … #define mmDAGB0_WR_ADDR_DAGB_MAX_BURST0_DEFAULT … #define mmDAGB0_WR_ADDR_DAGB_LAZY_TIMER0_DEFAULT … #define mmDAGB0_WR_ADDR_DAGB_MAX_BURST1_DEFAULT … #define mmDAGB0_WR_ADDR_DAGB_LAZY_TIMER1_DEFAULT … #define mmDAGB0_WR_ADDR_DAGB_MAX_BURST2_DEFAULT … #define mmDAGB0_WR_ADDR_DAGB_LAZY_TIMER2_DEFAULT … #define mmDAGB0_WR_ADDR_DAGB_MAX_BURST3_DEFAULT … #define mmDAGB0_WR_ADDR_DAGB_LAZY_TIMER3_DEFAULT … #define mmDAGB0_WR_DATA_DAGB_DEFAULT … #define mmDAGB0_WR_DATA_DAGB_MAX_BURST0_DEFAULT … #define mmDAGB0_WR_DATA_DAGB_LAZY_TIMER0_DEFAULT … #define mmDAGB0_WR_DATA_DAGB_MAX_BURST1_DEFAULT … #define mmDAGB0_WR_DATA_DAGB_LAZY_TIMER1_DEFAULT … #define mmDAGB0_WR_DATA_DAGB_MAX_BURST2_DEFAULT … #define mmDAGB0_WR_DATA_DAGB_LAZY_TIMER2_DEFAULT … #define mmDAGB0_WR_DATA_DAGB_MAX_BURST3_DEFAULT … #define mmDAGB0_WR_DATA_DAGB_LAZY_TIMER3_DEFAULT … #define mmDAGB0_WR_VC0_CNTL_DEFAULT … #define mmDAGB0_WR_VC1_CNTL_DEFAULT … #define mmDAGB0_WR_VC2_CNTL_DEFAULT … #define mmDAGB0_WR_VC3_CNTL_DEFAULT … #define mmDAGB0_WR_VC4_CNTL_DEFAULT … #define mmDAGB0_WR_VC5_CNTL_DEFAULT … #define mmDAGB0_WR_VC6_CNTL_DEFAULT … #define mmDAGB0_WR_VC7_CNTL_DEFAULT … #define mmDAGB0_WR_CNTL_MISC_DEFAULT … #define mmDAGB0_WR_TLB_CREDIT_DEFAULT … #define mmDAGB0_WR_DATA_CREDIT_DEFAULT … #define mmDAGB0_WR_MISC_CREDIT_DEFAULT … #define mmDAGB0_WR_OSD_CREDIT_CNTL1_DEFAULT … #define mmDAGB0_WR_OSD_CREDIT_CNTL2_DEFAULT … #define mmDAGB0_WR_DATA_FIFO_CREDIT_CNTL1_DEFAULT … #define mmDAGB0_WR_DATA_FIFO_CREDIT_CNTL2_DEFAULT … #define mmDAGB0_WR_ATOMIC_FIFO_CREDIT_CNTL1_DEFAULT … #define mmDAGB0_WRCLI_ASK_PENDING_DEFAULT … #define mmDAGB0_WRCLI_GO_PENDING_DEFAULT … #define mmDAGB0_WRCLI_GBLSEND_PENDING_DEFAULT … #define mmDAGB0_WRCLI_TLB_PENDING_DEFAULT … #define mmDAGB0_WRCLI_OARB_PENDING_DEFAULT … #define mmDAGB0_WRCLI_OSD_PENDING_DEFAULT … #define mmDAGB0_WRCLI_DBUS_ASK_PENDING_DEFAULT … #define mmDAGB0_WRCLI_DBUS_GO_PENDING_DEFAULT … #define mmDAGB0_WRCLI_GPU_SNOOP_OVERRIDE_DEFAULT … #define mmDAGB0_WRCLI_GPU_SNOOP_OVERRIDE_VALUE_DEFAULT … #define mmDAGB0_DAGB_DLY_DEFAULT … #define mmDAGB0_CNTL_MISC_DEFAULT … #define mmDAGB0_CNTL_MISC2_DEFAULT … #define mmDAGB0_FIFO_EMPTY_DEFAULT … #define mmDAGB0_FIFO_FULL_DEFAULT … #define mmDAGB0_WR_CREDITS_FULL_DEFAULT … #define mmDAGB0_RD_CREDITS_FULL_DEFAULT … #define mmDAGB0_PERFCOUNTER_LO_DEFAULT … #define mmDAGB0_PERFCOUNTER_HI_DEFAULT … #define mmDAGB0_PERFCOUNTER0_CFG_DEFAULT … #define mmDAGB0_PERFCOUNTER1_CFG_DEFAULT … #define mmDAGB0_PERFCOUNTER2_CFG_DEFAULT … #define mmDAGB0_PERFCOUNTER_RSLT_CNTL_DEFAULT … #define mmDAGB0_RESERVE0_DEFAULT … #define mmDAGB0_RESERVE1_DEFAULT … #define mmDAGB0_RESERVE2_DEFAULT … #define mmDAGB0_RESERVE3_DEFAULT … #define mmDAGB0_RESERVE4_DEFAULT … #define mmDAGB0_RESERVE5_DEFAULT … #define mmDAGB0_RESERVE6_DEFAULT … #define mmDAGB0_RESERVE7_DEFAULT … #define mmDAGB0_RESERVE8_DEFAULT … #define mmDAGB0_RESERVE9_DEFAULT … // addressBlock: mmhub_mmea_mmeadec0 #define mmMMEA0_DRAM_RD_CLI2GRP_MAP0_DEFAULT … #define mmMMEA0_DRAM_RD_CLI2GRP_MAP1_DEFAULT … #define mmMMEA0_DRAM_WR_CLI2GRP_MAP0_DEFAULT … #define mmMMEA0_DRAM_WR_CLI2GRP_MAP1_DEFAULT … #define mmMMEA0_DRAM_RD_GRP2VC_MAP_DEFAULT … #define mmMMEA0_DRAM_WR_GRP2VC_MAP_DEFAULT … #define mmMMEA0_DRAM_RD_LAZY_DEFAULT … #define mmMMEA0_DRAM_WR_LAZY_DEFAULT … #define mmMMEA0_DRAM_RD_CAM_CNTL_DEFAULT … #define mmMMEA0_DRAM_WR_CAM_CNTL_DEFAULT … #define mmMMEA0_DRAM_PAGE_BURST_DEFAULT … #define mmMMEA0_DRAM_RD_PRI_AGE_DEFAULT … #define mmMMEA0_DRAM_WR_PRI_AGE_DEFAULT … #define mmMMEA0_DRAM_RD_PRI_QUEUING_DEFAULT … #define mmMMEA0_DRAM_WR_PRI_QUEUING_DEFAULT … #define mmMMEA0_DRAM_RD_PRI_FIXED_DEFAULT … #define mmMMEA0_DRAM_WR_PRI_FIXED_DEFAULT … #define mmMMEA0_DRAM_RD_PRI_URGENCY_DEFAULT … #define mmMMEA0_DRAM_WR_PRI_URGENCY_DEFAULT … #define mmMMEA0_DRAM_RD_PRI_QUANT_PRI1_DEFAULT … #define mmMMEA0_DRAM_RD_PRI_QUANT_PRI2_DEFAULT … #define mmMMEA0_DRAM_RD_PRI_QUANT_PRI3_DEFAULT … #define mmMMEA0_DRAM_WR_PRI_QUANT_PRI1_DEFAULT … #define mmMMEA0_DRAM_WR_PRI_QUANT_PRI2_DEFAULT … #define mmMMEA0_DRAM_WR_PRI_QUANT_PRI3_DEFAULT … #define mmMMEA0_ADDRNORM_BASE_ADDR0_DEFAULT … #define mmMMEA0_ADDRNORM_LIMIT_ADDR0_DEFAULT … #define mmMMEA0_ADDRNORM_BASE_ADDR1_DEFAULT … #define mmMMEA0_ADDRNORM_LIMIT_ADDR1_DEFAULT … #define mmMMEA0_ADDRNORM_OFFSET_ADDR1_DEFAULT … #define mmMMEA0_ADDRNORMDRAM_HOLE_CNTL_DEFAULT … #define mmMMEA0_ADDRNORMDRAM_NP2_CHANNEL_CFG_DEFAULT … #define mmMMEA0_ADDRDEC_BANK_CFG_DEFAULT … #define mmMMEA0_ADDRDEC_MISC_CFG_DEFAULT … #define mmMMEA0_ADDRDECDRAM_ADDR_HASH_BANK0_DEFAULT … #define mmMMEA0_ADDRDECDRAM_ADDR_HASH_BANK1_DEFAULT … #define mmMMEA0_ADDRDECDRAM_ADDR_HASH_BANK2_DEFAULT … #define mmMMEA0_ADDRDECDRAM_ADDR_HASH_BANK3_DEFAULT … #define mmMMEA0_ADDRDECDRAM_ADDR_HASH_BANK4_DEFAULT … #define mmMMEA0_ADDRDECDRAM_ADDR_HASH_BANK5_DEFAULT … #define mmMMEA0_ADDRDECDRAM_ADDR_HASH_PC_DEFAULT … #define mmMMEA0_ADDRDECDRAM_ADDR_HASH_PC2_DEFAULT … #define mmMMEA0_ADDRDECDRAM_ADDR_HASH_CS0_DEFAULT … #define mmMMEA0_ADDRDECDRAM_ADDR_HASH_CS1_DEFAULT … #define mmMMEA0_ADDRDECDRAM_HARVEST_ENABLE_DEFAULT … #define mmMMEA0_ADDRDECDRAM_HARVNA_ADDR_START0_DEFAULT … #define mmMMEA0_ADDRDECDRAM_HARVNA_ADDR_END0_DEFAULT … #define mmMMEA0_ADDRDECDRAM_HARVNA_ADDR_START1_DEFAULT … #define mmMMEA0_ADDRDECDRAM_HARVNA_ADDR_END1_DEFAULT … #define mmMMEA0_ADDRDEC0_BASE_ADDR_CS0_DEFAULT … #define mmMMEA0_ADDRDEC0_BASE_ADDR_CS1_DEFAULT … #define mmMMEA0_ADDRDEC0_BASE_ADDR_CS2_DEFAULT … #define mmMMEA0_ADDRDEC0_BASE_ADDR_CS3_DEFAULT … #define mmMMEA0_ADDRDEC0_BASE_ADDR_SECCS0_DEFAULT … #define mmMMEA0_ADDRDEC0_BASE_ADDR_SECCS1_DEFAULT … #define mmMMEA0_ADDRDEC0_BASE_ADDR_SECCS2_DEFAULT … #define mmMMEA0_ADDRDEC0_BASE_ADDR_SECCS3_DEFAULT … #define mmMMEA0_ADDRDEC0_ADDR_MASK_CS01_DEFAULT … #define mmMMEA0_ADDRDEC0_ADDR_MASK_CS23_DEFAULT … #define mmMMEA0_ADDRDEC0_ADDR_MASK_SECCS01_DEFAULT … #define mmMMEA0_ADDRDEC0_ADDR_MASK_SECCS23_DEFAULT … #define mmMMEA0_ADDRDEC0_ADDR_CFG_CS01_DEFAULT … #define mmMMEA0_ADDRDEC0_ADDR_CFG_CS23_DEFAULT … #define mmMMEA0_ADDRDEC0_ADDR_SEL_CS01_DEFAULT … #define mmMMEA0_ADDRDEC0_ADDR_SEL_CS23_DEFAULT … #define mmMMEA0_ADDRDEC0_ADDR_SEL2_CS01_DEFAULT … #define mmMMEA0_ADDRDEC0_ADDR_SEL2_CS23_DEFAULT … #define mmMMEA0_ADDRDEC0_COL_SEL_LO_CS01_DEFAULT … #define mmMMEA0_ADDRDEC0_COL_SEL_LO_CS23_DEFAULT … #define mmMMEA0_ADDRDEC0_COL_SEL_HI_CS01_DEFAULT … #define mmMMEA0_ADDRDEC0_COL_SEL_HI_CS23_DEFAULT … #define mmMMEA0_ADDRDEC0_RM_SEL_CS01_DEFAULT … #define mmMMEA0_ADDRDEC0_RM_SEL_CS23_DEFAULT … #define mmMMEA0_ADDRDEC0_RM_SEL_CS1_DEFAULT … #define mmMMEA0_ADDRDEC0_RM_SEL_CS3_DEFAULT … #define mmMMEA0_ADDRDEC1_BASE_ADDR_CS0_DEFAULT … #define mmMMEA0_ADDRDEC1_BASE_ADDR_CS1_DEFAULT … #define mmMMEA0_ADDRDEC1_BASE_ADDR_CS2_DEFAULT … #define mmMMEA0_ADDRDEC1_BASE_ADDR_CS3_DEFAULT … #define mmMMEA0_ADDRDEC1_BASE_ADDR_SECCS0_DEFAULT … #define mmMMEA0_ADDRDEC1_BASE_ADDR_SECCS1_DEFAULT … #define mmMMEA0_ADDRDEC1_BASE_ADDR_SECCS2_DEFAULT … #define mmMMEA0_ADDRDEC1_BASE_ADDR_SECCS3_DEFAULT … #define mmMMEA0_ADDRDEC1_ADDR_MASK_CS01_DEFAULT … #define mmMMEA0_ADDRDEC1_ADDR_MASK_CS23_DEFAULT … #define mmMMEA0_ADDRDEC1_ADDR_MASK_SECCS01_DEFAULT … #define mmMMEA0_ADDRDEC1_ADDR_MASK_SECCS23_DEFAULT … #define mmMMEA0_ADDRDEC1_ADDR_CFG_CS01_DEFAULT … #define mmMMEA0_ADDRDEC1_ADDR_CFG_CS23_DEFAULT … #define mmMMEA0_ADDRDEC1_ADDR_SEL_CS01_DEFAULT … #define mmMMEA0_ADDRDEC1_ADDR_SEL_CS23_DEFAULT … #define mmMMEA0_ADDRDEC1_ADDR_SEL2_CS01_DEFAULT … #define mmMMEA0_ADDRDEC1_ADDR_SEL2_CS23_DEFAULT … #define mmMMEA0_ADDRDEC1_COL_SEL_LO_CS01_DEFAULT … #define mmMMEA0_ADDRDEC1_COL_SEL_LO_CS23_DEFAULT … #define mmMMEA0_ADDRDEC1_COL_SEL_HI_CS01_DEFAULT … #define mmMMEA0_ADDRDEC1_COL_SEL_HI_CS23_DEFAULT … #define mmMMEA0_ADDRDEC1_RM_SEL_CS01_DEFAULT … #define mmMMEA0_ADDRDEC1_RM_SEL_CS23_DEFAULT … #define mmMMEA0_ADDRDEC1_RM_SEL_CS1_DEFAULT … #define mmMMEA0_ADDRDEC1_RM_SEL_CS3_DEFAULT … #define mmMMEA0_ADDRNORMDRAM_GLOBAL_CNTL_DEFAULT … #define mmMMEA0_ADDRDECDRAM_GECC_HARV_ADJ0_DEFAULT … #define mmMMEA0_ADDRDECDRAM_GECC_HARV_ADJ1_DEFAULT … #define mmMMEA0_ADDRDECDRAM_GECC_HARV_ADJ2_DEFAULT … #define mmMMEA0_ADDRDECDRAM_GECC_HARV_ADJ3_DEFAULT … #define mmMMEA0_ADDRDECDRAM_GECC_HARV_ADJ4_DEFAULT … #define mmMMEA0_ADDRDECDRAM_GECC_HARV_ADJ5_DEFAULT … #define mmMMEA0_ADDRDEC0_ADDR_MASK_CS1_DEFAULT … #define mmMMEA0_ADDRDEC0_ADDR_MASK_CS3_DEFAULT … #define mmMMEA0_ADDRDEC0_ADDR_MASK_SECCS1_DEFAULT … #define mmMMEA0_ADDRDEC0_ADDR_MASK_SECCS3_DEFAULT … #define mmMMEA0_ADDRDEC0_ADDR_CFG_CS1_DEFAULT … #define mmMMEA0_ADDRDEC0_ADDR_CFG_CS3_DEFAULT … #define mmMMEA0_ADDRDEC0_ADDR_SEL_CS1_DEFAULT … #define mmMMEA0_ADDRDEC0_ADDR_SEL_CS3_DEFAULT … #define mmMMEA0_ADDRDEC0_COL_SEL_LO_CS1_DEFAULT … #define mmMMEA0_ADDRDEC0_COL_SEL_LO_CS3_DEFAULT … #define mmMMEA0_ADDRDEC0_COL_SEL_HI_CS1_DEFAULT … #define mmMMEA0_ADDRDEC0_COL_SEL_HI_CS3_DEFAULT … #define mmMMEA0_ADDRDEC1_ADDR_MASK_CS1_DEFAULT … #define mmMMEA0_ADDRDEC1_ADDR_MASK_CS3_DEFAULT … #define mmMMEA0_ADDRDEC1_ADDR_MASK_SECCS1_DEFAULT … #define mmMMEA0_ADDRDEC1_ADDR_MASK_SECCS3_DEFAULT … #define mmMMEA0_ADDRDEC1_ADDR_CFG_CS1_DEFAULT … #define mmMMEA0_ADDRDEC1_ADDR_CFG_CS3_DEFAULT … #define mmMMEA0_ADDRDEC1_ADDR_SEL_CS1_DEFAULT … #define mmMMEA0_ADDRDEC1_ADDR_SEL_CS3_DEFAULT … #define mmMMEA0_ADDRDEC1_COL_SEL_LO_CS1_DEFAULT … #define mmMMEA0_ADDRDEC1_COL_SEL_LO_CS3_DEFAULT … #define mmMMEA0_ADDRDEC1_COL_SEL_HI_CS1_DEFAULT … #define mmMMEA0_ADDRDEC1_COL_SEL_HI_CS3_DEFAULT … #define mmMMEA0_ADDRNORMDRAM_MASKING_DEFAULT … #define mmMMEA0_IO_RD_CLI2GRP_MAP0_DEFAULT … #define mmMMEA0_IO_RD_CLI2GRP_MAP1_DEFAULT … #define mmMMEA0_IO_WR_CLI2GRP_MAP0_DEFAULT … #define mmMMEA0_IO_WR_CLI2GRP_MAP1_DEFAULT … #define mmMMEA0_IO_RD_COMBINE_FLUSH_DEFAULT … #define mmMMEA0_IO_WR_COMBINE_FLUSH_DEFAULT … #define mmMMEA0_IO_GROUP_BURST_DEFAULT … #define mmMMEA0_IO_RD_PRI_AGE_DEFAULT … #define mmMMEA0_IO_WR_PRI_AGE_DEFAULT … #define mmMMEA0_IO_RD_PRI_QUEUING_DEFAULT … #define mmMMEA0_IO_WR_PRI_QUEUING_DEFAULT … #define mmMMEA0_IO_RD_PRI_FIXED_DEFAULT … #define mmMMEA0_IO_WR_PRI_FIXED_DEFAULT … #define mmMMEA0_IO_RD_PRI_URGENCY_DEFAULT … #define mmMMEA0_IO_WR_PRI_URGENCY_DEFAULT … #define mmMMEA0_IO_RD_PRI_URGENCY_MASKING_DEFAULT … #define mmMMEA0_IO_WR_PRI_URGENCY_MASKING_DEFAULT … #define mmMMEA0_IO_RD_PRI_QUANT_PRI1_DEFAULT … #define mmMMEA0_IO_RD_PRI_QUANT_PRI2_DEFAULT … #define mmMMEA0_IO_RD_PRI_QUANT_PRI3_DEFAULT … #define mmMMEA0_IO_WR_PRI_QUANT_PRI1_DEFAULT … #define mmMMEA0_IO_WR_PRI_QUANT_PRI2_DEFAULT … #define mmMMEA0_IO_WR_PRI_QUANT_PRI3_DEFAULT … #define mmMMEA0_SDP_ARB_DRAM_DEFAULT … #define mmMMEA0_SDP_ARB_FINAL_DEFAULT … #define mmMMEA0_SDP_DRAM_PRIORITY_DEFAULT … #define mmMMEA0_SDP_IO_PRIORITY_DEFAULT … #define mmMMEA0_SDP_CREDITS_DEFAULT … #define mmMMEA0_SDP_TAG_RESERVE0_DEFAULT … #define mmMMEA0_SDP_TAG_RESERVE1_DEFAULT … #define mmMMEA0_SDP_VCC_RESERVE0_DEFAULT … #define mmMMEA0_SDP_VCC_RESERVE1_DEFAULT … #define mmMMEA0_SDP_VCD_RESERVE0_DEFAULT … #define mmMMEA0_SDP_VCD_RESERVE1_DEFAULT … #define mmMMEA0_SDP_REQ_CNTL_DEFAULT … #define mmMMEA0_MISC_DEFAULT … #define mmMMEA0_LATENCY_SAMPLING_DEFAULT … #define mmMMEA0_PERFCOUNTER_LO_DEFAULT … #define mmMMEA0_PERFCOUNTER_HI_DEFAULT … #define mmMMEA0_PERFCOUNTER0_CFG_DEFAULT … #define mmMMEA0_PERFCOUNTER1_CFG_DEFAULT … #define mmMMEA0_PERFCOUNTER_RSLT_CNTL_DEFAULT … #define mmMMEA0_EDC_CNT_DEFAULT … #define mmMMEA0_EDC_CNT2_DEFAULT … #define mmMMEA0_DSM_CNTL_DEFAULT … #define mmMMEA0_DSM_CNTLA_DEFAULT … #define mmMMEA0_DSM_CNTLB_DEFAULT … #define mmMMEA0_DSM_CNTL2_DEFAULT … #define mmMMEA0_DSM_CNTL2A_DEFAULT … #define mmMMEA0_DSM_CNTL2B_DEFAULT … #define mmMMEA0_CGTT_CLK_CTRL_DEFAULT … #define mmMMEA0_EDC_MODE_DEFAULT … #define mmMMEA0_ERR_STATUS_DEFAULT … #define mmMMEA0_MISC2_DEFAULT … #define mmMMEA0_ADDRDEC_SELECT_DEFAULT … #define mmMMEA0_EDC_CNT3_DEFAULT … #define mmMMEA0_SDP_PRIORITY_OVERRIDE_DEFAULT … #define mmMMEA0_MISC_AON_DEFAULT … // addressBlock: mmhub_pctldec #define mmPCTL_CTRL_DEFAULT … #define mmPCTL_MMHUB_DEEPSLEEP_IB_DEFAULT … #define mmPCTL_MMHUB_DEEPSLEEP_OVERRIDE_DEFAULT … #define mmPCTL_MMHUB_DEEPSLEEP_OVERRIDE_IB_DEFAULT … #define mmPCTL_PG_IGNORE_DEEPSLEEP_DEFAULT … #define mmPCTL_PG_IGNORE_DEEPSLEEP_IB_DEFAULT … #define mmPCTL_SLICE0_CFG_DAGB_WRBUSY_DEFAULT … #define mmPCTL_SLICE0_CFG_DAGB_RDBUSY_DEFAULT … #define mmPCTL_SLICE0_CFG_DS_ALLOW_DEFAULT … #define mmPCTL_SLICE0_CFG_DS_ALLOW_IB_DEFAULT … #define mmPCTL_SLICE1_CFG_DAGB_WRBUSY_DEFAULT … #define mmPCTL_SLICE1_CFG_DAGB_RDBUSY_DEFAULT … #define mmPCTL_SLICE1_CFG_DS_ALLOW_DEFAULT … #define mmPCTL_SLICE1_CFG_DS_ALLOW_IB_DEFAULT … #define mmPCTL_UTCL2_MISC_DEFAULT … #define mmPCTL_SLICE0_MISC_DEFAULT … #define mmPCTL_SLICE1_MISC_DEFAULT … #define mmPCTL_RENG_CTRL_DEFAULT … #define mmPCTL_UTCL2_RENG_EXECUTE_DEFAULT … #define mmPCTL_SLICE0_RENG_EXECUTE_DEFAULT … #define mmPCTL_SLICE1_RENG_EXECUTE_DEFAULT … #define mmPCTL_UTCL2_RENG_RAM_INDEX_DEFAULT … #define mmPCTL_UTCL2_RENG_RAM_DATA_DEFAULT … #define mmPCTL_SLICE0_RENG_RAM_INDEX_DEFAULT … #define mmPCTL_SLICE0_RENG_RAM_DATA_DEFAULT … #define mmPCTL_SLICE1_RENG_RAM_INDEX_DEFAULT … #define mmPCTL_SLICE1_RENG_RAM_DATA_DEFAULT … #define mmPCTL_UTCL2_STCTRL_REGISTER_SAVE_RANGE0_DEFAULT … #define mmPCTL_UTCL2_STCTRL_REGISTER_SAVE_RANGE1_DEFAULT … #define mmPCTL_UTCL2_STCTRL_REGISTER_SAVE_RANGE2_DEFAULT … #define mmPCTL_UTCL2_STCTRL_REGISTER_SAVE_RANGE3_DEFAULT … #define mmPCTL_UTCL2_STCTRL_REGISTER_SAVE_RANGE4_DEFAULT … #define mmPCTL_UTCL2_STCTRL_REGISTER_SAVE_EXCL_SET0_DEFAULT … #define mmPCTL_UTCL2_STCTRL_REGISTER_SAVE_EXCL_SET1_DEFAULT … #define mmPCTL_SLICE0_STCTRL_REGISTER_SAVE_RANGE0_DEFAULT … #define mmPCTL_SLICE0_STCTRL_REGISTER_SAVE_RANGE1_DEFAULT … #define mmPCTL_SLICE0_STCTRL_REGISTER_SAVE_RANGE2_DEFAULT … #define mmPCTL_SLICE0_STCTRL_REGISTER_SAVE_RANGE3_DEFAULT … #define mmPCTL_SLICE0_STCTRL_REGISTER_SAVE_RANGE4_DEFAULT … #define mmPCTL_SLICE0_STCTRL_REGISTER_SAVE_EXCL_SET0_DEFAULT … #define mmPCTL_SLICE0_STCTRL_REGISTER_SAVE_EXCL_SET1_DEFAULT … #define mmPCTL_SLICE1_STCTRL_REGISTER_SAVE_RANGE0_DEFAULT … #define mmPCTL_SLICE1_STCTRL_REGISTER_SAVE_RANGE1_DEFAULT … #define mmPCTL_SLICE1_STCTRL_REGISTER_SAVE_RANGE2_DEFAULT … #define mmPCTL_SLICE1_STCTRL_REGISTER_SAVE_RANGE3_DEFAULT … #define mmPCTL_SLICE1_STCTRL_REGISTER_SAVE_RANGE4_DEFAULT … #define mmPCTL_SLICE1_STCTRL_REGISTER_SAVE_EXCL_SET0_DEFAULT … #define mmPCTL_SLICE1_STCTRL_REGISTER_SAVE_EXCL_SET1_DEFAULT … #define mmPCTL_STATUS_DEFAULT … #define mmPCTL_PERFCOUNTER_LO_DEFAULT … #define mmPCTL_PERFCOUNTER_HI_DEFAULT … #define mmPCTL_PERFCOUNTER0_CFG_DEFAULT … #define mmPCTL_PERFCOUNTER1_CFG_DEFAULT … #define mmPCTL_PERFCOUNTER_RSLT_CNTL_DEFAULT … #define mmPCTL_RESERVED_0_DEFAULT … #define mmPCTL_RESERVED_1_DEFAULT … #define mmPCTL_RESERVED_2_DEFAULT … #define mmPCTL_RESERVED_3_DEFAULT … // addressBlock: mmhub_l1tlb_mmutcl1pfdec #define mmMMMC_VM_MX_L1_TLB0_STATUS_DEFAULT … #define mmMMMC_VM_MX_L1_TLB1_STATUS_DEFAULT … #define mmMMMC_VM_MX_L1_TLB2_STATUS_DEFAULT … #define mmMMMC_VM_MX_L1_TLB3_STATUS_DEFAULT … #define mmMMMC_VM_MX_L1_TLB4_STATUS_DEFAULT … #define mmMMMC_VM_MX_L1_TLB5_STATUS_DEFAULT … #define mmMMMC_VM_MX_L1_TLB6_STATUS_DEFAULT … #define mmMMMC_VM_MX_L1_TLB7_STATUS_DEFAULT … // addressBlock: mmhub_l1tlb_mmutcl1pldec #define mmMMMC_VM_MX_L1_PERFCOUNTER0_CFG_DEFAULT … #define mmMMMC_VM_MX_L1_PERFCOUNTER1_CFG_DEFAULT … #define mmMMMC_VM_MX_L1_PERFCOUNTER2_CFG_DEFAULT … #define mmMMMC_VM_MX_L1_PERFCOUNTER3_CFG_DEFAULT … #define mmMMMC_VM_MX_L1_PERFCOUNTER_RSLT_CNTL_DEFAULT … // addressBlock: mmhub_l1tlb_mmutcl1prdec #define mmMMMC_VM_MX_L1_PERFCOUNTER_LO_DEFAULT … #define mmMMMC_VM_MX_L1_PERFCOUNTER_HI_DEFAULT … // addressBlock: mmhub_l1tlb_mmvmtlspfdec #define mmMMMC_VM_MX_L1_TLS0_CNTL_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL0_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL1_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL2_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL3_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL4_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL5_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL6_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL7_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL8_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL9_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL10_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL11_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL12_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL13_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL14_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL15_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL16_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL17_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL18_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL19_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL20_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL21_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL22_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL23_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL24_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL25_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL26_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL27_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL28_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL29_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL30_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL31_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL33_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL34_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL35_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL36_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_CNTL37_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR0_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR0_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR1_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR1_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR2_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR2_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR3_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR3_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR4_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR4_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR5_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR5_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR6_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR6_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR7_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR7_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR8_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR8_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR9_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR9_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR10_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR10_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR11_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR11_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR12_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR12_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR13_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR13_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR14_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR14_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR15_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR15_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR16_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR16_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR17_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR17_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR18_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR18_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR19_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR19_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR20_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR20_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR21_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR21_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR22_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR22_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR23_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR23_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR24_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR24_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR25_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR25_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR26_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR26_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR27_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR27_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR28_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR28_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR29_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR29_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR30_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR30_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR31_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR31_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR32_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR32_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR33_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR33_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR34_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR34_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR35_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR35_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR36_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR36_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR37_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_START_ADDR37_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR0_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR0_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR1_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR1_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR2_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR2_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR3_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR3_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR4_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR4_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR5_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR5_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR6_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR6_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR7_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR7_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR8_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR8_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR9_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR9_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR10_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR10_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR11_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR11_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR12_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR12_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR13_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR13_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR14_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR14_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR15_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR15_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR16_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR16_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR17_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR17_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR18_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR18_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR19_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR19_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR20_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR20_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR21_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR21_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR22_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR22_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR23_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR23_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR24_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR24_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR25_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR25_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR26_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR26_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR27_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR27_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR28_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR28_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR29_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR29_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR30_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR30_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR31_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR31_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR32_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR32_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR33_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR33_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR34_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR34_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR35_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR35_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR36_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR36_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR37_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_END_ADDR37_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_INVALIDATE_STREAM_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_INVALIDATE_STREAM_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_INVALIDATE_REQUEST_PENDING_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_INVALIDATE_REQUEST_PENDING_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_PROTECTION_FAULT_STATUS_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_PROTECTION_FAULT_ADDR_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_PROTECTION_FAULT_ADDR_HI32_DEFAULT … #define mmMMVM_L2_SAW_CNTL_DEFAULT … #define mmMMVM_L2_SAW_CNTL2_DEFAULT … #define mmMMVM_L2_SAW_CNTL3_DEFAULT … #define mmMMVM_L2_SAW_CNTL4_DEFAULT … #define mmMMVM_L2_SAW_CONTEXT0_CNTL_DEFAULT … #define mmMMVM_L2_SAW_CONTEXT0_CNTL2_DEFAULT … #define mmMMVM_L2_SAW_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT … #define mmMMVM_L2_SAW_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT … #define mmMMVM_L2_SAW_CONTEXT0_PAGE_TABLE_START_ADDR_LO32_DEFAULT … #define mmMMVM_L2_SAW_CONTEXT0_PAGE_TABLE_START_ADDR_HI32_DEFAULT … #define mmMMVM_L2_SAW_CONTEXT0_PAGE_TABLE_END_ADDR_LO32_DEFAULT … #define mmMMVM_L2_SAW_CONTEXT0_PAGE_TABLE_END_ADDR_HI32_DEFAULT … #define mmMMVM_L2_SAW_CONTEXTS_DISABLE_DEFAULT … #define mmMMVM_L2_SAW_PIPES_BUSY_LO32_DEFAULT … #define mmMMVM_L2_SAW_PIPES_BUSY_HI32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_IOMMU_FAULT_STATUS_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_IOMMU_FAULT_GVADDR_LO32_DEFAULT … #define mmMMMC_VM_MX_L1_TLS0_IOMMU_FAULT_GVADDR_HI32_DEFAULT … // addressBlock: mmhub_mmutcl2_mmatcl2dec #define mmMM_ATC_L2_CNTL_DEFAULT … #define mmMM_ATC_L2_CNTL2_DEFAULT … #define mmMM_ATC_L2_CACHE_DATA0_DEFAULT … #define mmMM_ATC_L2_CACHE_DATA1_DEFAULT … #define mmMM_ATC_L2_CACHE_DATA2_DEFAULT … #define mmMM_ATC_L2_CNTL3_DEFAULT … #define mmMM_ATC_L2_CNTL4_DEFAULT … #define mmMM_ATC_L2_CNTL5_DEFAULT … #define mmMM_ATC_L2_MM_GROUP_RT_CLASSES_DEFAULT … #define mmMM_ATC_L2_STATUS_DEFAULT … #define mmMM_ATC_L2_STATUS2_DEFAULT … #define mmMM_ATC_L2_MISC_CG_DEFAULT … #define mmMM_ATC_L2_MEM_POWER_LS_DEFAULT … #define mmMM_ATC_L2_CGTT_CLK_CTRL_DEFAULT … #define mmMM_ATC_L2_SDPPORT_CTRL_DEFAULT … // addressBlock: mmhub_mmutcl2_mmvml2pfdec #define mmMMVM_L2_CNTL_DEFAULT … #define mmMMVM_L2_CNTL2_DEFAULT … #define mmMMVM_L2_CNTL3_DEFAULT … #define mmMMVM_L2_STATUS_DEFAULT … #define mmMMVM_DUMMY_PAGE_FAULT_CNTL_DEFAULT … #define mmMMVM_DUMMY_PAGE_FAULT_ADDR_LO32_DEFAULT … #define mmMMVM_DUMMY_PAGE_FAULT_ADDR_HI32_DEFAULT … #define mmMMVM_INVALIDATE_CNTL_DEFAULT … #define mmMMVM_L2_PROTECTION_FAULT_CNTL_DEFAULT … #define mmMMVM_L2_PROTECTION_FAULT_CNTL2_DEFAULT … #define mmMMVM_L2_PROTECTION_FAULT_MM_CNTL3_DEFAULT … #define mmMMVM_L2_PROTECTION_FAULT_MM_CNTL4_DEFAULT … #define mmMMVM_L2_PROTECTION_FAULT_STATUS_DEFAULT … #define mmMMVM_L2_PROTECTION_FAULT_ADDR_LO32_DEFAULT … #define mmMMVM_L2_PROTECTION_FAULT_ADDR_HI32_DEFAULT … #define mmMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32_DEFAULT … #define mmMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32_DEFAULT … #define mmMMVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32_DEFAULT … #define mmMMVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32_DEFAULT … #define mmMMVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32_DEFAULT … #define mmMMVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32_DEFAULT … #define mmMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32_DEFAULT … #define mmMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32_DEFAULT … #define mmMMVM_L2_CNTL4_DEFAULT … #define mmMMVM_L2_MM_GROUP_RT_CLASSES_DEFAULT … #define mmMMVM_L2_BANK_SELECT_RESERVED_CID_DEFAULT … #define mmMMVM_L2_BANK_SELECT_RESERVED_CID2_DEFAULT … #define mmMMVM_L2_CACHE_PARITY_CNTL_DEFAULT … #define mmMMVM_L2_IH_LOG_CNTL_DEFAULT … #define mmMMVM_L2_IH_LOG_BUSY_DEFAULT … #define mmMMVM_L2_CGTT_CLK_CTRL_DEFAULT … #define mmMMVM_L2_CNTL5_DEFAULT … #define mmMMVM_L2_GCR_CNTL_DEFAULT … #define mmMMVM_L2_CGTT_BUSY_CTRL_DEFAULT … #define mmMMVM_L2_PTE_CACHE_DUMP_CNTL_DEFAULT … #define mmMMVM_L2_PTE_CACHE_DUMP_READ_DEFAULT … // addressBlock: mmhub_mmutcl2_mmvml2vcdec #define mmMMVM_CONTEXT0_CNTL_DEFAULT … #define mmMMVM_CONTEXT1_CNTL_DEFAULT … #define mmMMVM_CONTEXT2_CNTL_DEFAULT … #define mmMMVM_CONTEXT3_CNTL_DEFAULT … #define mmMMVM_CONTEXT4_CNTL_DEFAULT … #define mmMMVM_CONTEXT5_CNTL_DEFAULT … #define mmMMVM_CONTEXT6_CNTL_DEFAULT … #define mmMMVM_CONTEXT7_CNTL_DEFAULT … #define mmMMVM_CONTEXT8_CNTL_DEFAULT … #define mmMMVM_CONTEXT9_CNTL_DEFAULT … #define mmMMVM_CONTEXT10_CNTL_DEFAULT … #define mmMMVM_CONTEXT11_CNTL_DEFAULT … #define mmMMVM_CONTEXT12_CNTL_DEFAULT … #define mmMMVM_CONTEXT13_CNTL_DEFAULT … #define mmMMVM_CONTEXT14_CNTL_DEFAULT … #define mmMMVM_CONTEXT15_CNTL_DEFAULT … #define mmMMVM_CONTEXTS_DISABLE_DEFAULT … #define mmMMVM_L2_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT … #define mmMMVM_L2_CONTEXT0_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT … #define mmMMVM_L2_CONTEXT1_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT … #define mmMMVM_L2_CONTEXT2_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT … #define mmMMVM_L2_CONTEXT3_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT … #define mmMMVM_L2_CONTEXT4_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT … #define mmMMVM_L2_CONTEXT5_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT … #define mmMMVM_L2_CONTEXT6_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT … #define mmMMVM_L2_CONTEXT7_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT … #define mmMMVM_L2_CONTEXT8_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT … #define mmMMVM_L2_CONTEXT9_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT … #define mmMMVM_L2_CONTEXT10_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT … #define mmMMVM_L2_CONTEXT11_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT … #define mmMMVM_L2_CONTEXT12_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT … #define mmMMVM_L2_CONTEXT13_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT … #define mmMMVM_L2_CONTEXT14_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT … #define mmMMVM_L2_CONTEXT15_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT … // addressBlock: mmhub_mmutcl2_mmvml2pldec #define mmMMMC_VM_L2_PERFCOUNTER0_CFG_DEFAULT … #define mmMMMC_VM_L2_PERFCOUNTER1_CFG_DEFAULT … #define mmMMMC_VM_L2_PERFCOUNTER2_CFG_DEFAULT … #define mmMMMC_VM_L2_PERFCOUNTER3_CFG_DEFAULT … #define mmMMMC_VM_L2_PERFCOUNTER4_CFG_DEFAULT … #define mmMMMC_VM_L2_PERFCOUNTER5_CFG_DEFAULT … #define mmMMMC_VM_L2_PERFCOUNTER6_CFG_DEFAULT … #define mmMMMC_VM_L2_PERFCOUNTER7_CFG_DEFAULT … #define mmMMMC_VM_L2_PERFCOUNTER_RSLT_CNTL_DEFAULT … #define mmMMUTCL2_PERFCOUNTER0_CFG_DEFAULT … #define mmMMUTCL2_PERFCOUNTER1_CFG_DEFAULT … #define mmMMUTCL2_PERFCOUNTER2_CFG_DEFAULT … #define mmMMUTCL2_PERFCOUNTER3_CFG_DEFAULT … #define mmMMUTCL2_PERFCOUNTER_RSLT_CNTL_DEFAULT … // addressBlock: mmhub_mmutcl2_mmvml2prdec #define mmMMMC_VM_L2_PERFCOUNTER_LO_DEFAULT … #define mmMMMC_VM_L2_PERFCOUNTER_HI_DEFAULT … #define mmMMUTCL2_PERFCOUNTER_LO_DEFAULT … #define mmMMUTCL2_PERFCOUNTER_HI_DEFAULT … // addressBlock: mmhub_mmutcl2_mmvmsharedhvdec #define mmMMMC_VM_FB_SIZE_OFFSET_VF0_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF1_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF2_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF3_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF4_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF5_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF6_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF7_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF8_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF9_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF10_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF11_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF12_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF13_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF14_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF15_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF16_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF17_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF18_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF19_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF20_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF21_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF22_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF23_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF24_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF25_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF26_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF27_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF28_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF29_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF30_DEFAULT … #define mmMMMC_VM_FB_SIZE_OFFSET_VF31_DEFAULT … #define mmMMVM_IOMMU_MMIO_CNTRL_1_DEFAULT … #define mmMMMC_VM_MARC_BASE_LO_0_DEFAULT … #define mmMMMC_VM_MARC_BASE_LO_1_DEFAULT … #define mmMMMC_VM_MARC_BASE_LO_2_DEFAULT … #define mmMMMC_VM_MARC_BASE_LO_3_DEFAULT … #define mmMMMC_VM_MARC_BASE_HI_0_DEFAULT … #define mmMMMC_VM_MARC_BASE_HI_1_DEFAULT … #define mmMMMC_VM_MARC_BASE_HI_2_DEFAULT … #define mmMMMC_VM_MARC_BASE_HI_3_DEFAULT … #define mmMMMC_VM_MARC_RELOC_LO_0_DEFAULT … #define mmMMMC_VM_MARC_RELOC_LO_1_DEFAULT … #define mmMMMC_VM_MARC_RELOC_LO_2_DEFAULT … #define mmMMMC_VM_MARC_RELOC_LO_3_DEFAULT … #define mmMMMC_VM_MARC_RELOC_HI_0_DEFAULT … #define mmMMMC_VM_MARC_RELOC_HI_1_DEFAULT … #define mmMMMC_VM_MARC_RELOC_HI_2_DEFAULT … #define mmMMMC_VM_MARC_RELOC_HI_3_DEFAULT … #define mmMMMC_VM_MARC_LEN_LO_0_DEFAULT … #define mmMMMC_VM_MARC_LEN_LO_1_DEFAULT … #define mmMMMC_VM_MARC_LEN_LO_2_DEFAULT … #define mmMMMC_VM_MARC_LEN_LO_3_DEFAULT … #define mmMMMC_VM_MARC_LEN_HI_0_DEFAULT … #define mmMMMC_VM_MARC_LEN_HI_1_DEFAULT … #define mmMMMC_VM_MARC_LEN_HI_2_DEFAULT … #define mmMMMC_VM_MARC_LEN_HI_3_DEFAULT … #define mmMMVM_IOMMU_CONTROL_REGISTER_DEFAULT … #define mmMMVM_IOMMU_PERFORMANCE_OPTIMIZATION_CONTROL_REGISTER_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_0_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_1_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_2_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_3_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_4_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_5_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_6_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_7_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_8_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_9_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_10_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_11_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_12_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_13_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_14_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_15_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_16_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_17_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_18_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_19_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_20_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_21_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_22_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_23_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_24_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_25_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_26_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_27_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_28_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_29_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_30_DEFAULT … #define mmMMVM_PCIE_ATS_CNTL_VF_31_DEFAULT … // addressBlock: mmhub_mmutcl2_mmvmsharedpfdec #define mmMMMC_VM_NB_MMIOBASE_DEFAULT … #define mmMMMC_VM_NB_MMIOLIMIT_DEFAULT … #define mmMMMC_VM_NB_PCI_CTRL_DEFAULT … #define mmMMMC_VM_NB_PCI_ARB_DEFAULT … #define mmMMMC_VM_NB_TOP_OF_DRAM_SLOT1_DEFAULT … #define mmMMMC_VM_NB_LOWER_TOP_OF_DRAM2_DEFAULT … #define mmMMMC_VM_NB_UPPER_TOP_OF_DRAM2_DEFAULT … #define mmMMMC_VM_FB_OFFSET_DEFAULT … #define mmMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB_DEFAULT … #define mmMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB_DEFAULT … #define mmMMMC_VM_STEERING_DEFAULT … #define mmMMMC_SHARED_VIRT_RESET_REQ_DEFAULT … #define mmMMMC_MEM_POWER_LS_DEFAULT … #define mmMMMC_VM_CACHEABLE_DRAM_ADDRESS_START_DEFAULT … #define mmMMMC_VM_CACHEABLE_DRAM_ADDRESS_END_DEFAULT … #define mmMMMC_VM_APT_CNTL_DEFAULT … #define mmMMMC_VM_LOCAL_HBM_ADDRESS_LOCK_CNTL_DEFAULT … #define mmMMMC_VM_LOCAL_HBM_ADDRESS_START_DEFAULT … #define mmMMMC_VM_LOCAL_HBM_ADDRESS_END_DEFAULT … #define mmMMUTCL2_CGTT_CLK_CTRL_DEFAULT … #define mmMMMC_SHARED_ACTIVE_FCN_ID_DEFAULT … #define mmMMMC_SHARED_VIRT_RESET_REQ2_DEFAULT … #define mmMMUTCL2_CGTT_BUSY_CTRL_DEFAULT … #define mmMMUTCL2_HARVEST_BYPASS_GROUPS_DEFAULT … // addressBlock: mmhub_mmutcl2_mmvmsharedvcdec #define mmMMMC_VM_FB_LOCATION_BASE_DEFAULT … #define mmMMMC_VM_FB_LOCATION_TOP_DEFAULT … #define mmMMMC_VM_AGP_TOP_DEFAULT … #define mmMMMC_VM_AGP_BOT_DEFAULT … #define mmMMMC_VM_AGP_BASE_DEFAULT … #define mmMMMC_VM_SYSTEM_APERTURE_LOW_ADDR_DEFAULT … #define mmMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR_DEFAULT … #define mmMMMC_VM_MX_L1_TLB_CNTL_DEFAULT … // addressBlock: mmhub_mmutcl2_mmatcl2pfcntrdec #define mmMM_ATC_L2_PERFCOUNTER_LO_DEFAULT … #define mmMM_ATC_L2_PERFCOUNTER_HI_DEFAULT … // addressBlock: mmhub_mmutcl2_mmatcl2pfcntldec #define mmMM_ATC_L2_PERFCOUNTER0_CFG_DEFAULT … #define mmMM_ATC_L2_PERFCOUNTER1_CFG_DEFAULT … #define mmMM_ATC_L2_PERFCOUNTER_RSLT_CNTL_DEFAULT … // addressBlock: mmhub_mmutcl2_mmvml2ptdec #define mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT0_PAGE_TABLE_RESERVE0_DEFAULT … #define mmMMVM_CONTEXT0_PAGE_TABLE_RESERVE1_DEFAULT … #define mmMMVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT1_PAGE_TABLE_RESERVE0_DEFAULT … #define mmMMVM_CONTEXT1_PAGE_TABLE_RESERVE1_DEFAULT … #define mmMMVM_CONTEXT2_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT2_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT2_PAGE_TABLE_START_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT2_PAGE_TABLE_START_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT2_PAGE_TABLE_END_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT2_PAGE_TABLE_END_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT2_PAGE_TABLE_RESERVE0_DEFAULT … #define mmMMVM_CONTEXT2_PAGE_TABLE_RESERVE1_DEFAULT … #define mmMMVM_CONTEXT3_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT3_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT3_PAGE_TABLE_START_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT3_PAGE_TABLE_START_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT3_PAGE_TABLE_END_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT3_PAGE_TABLE_END_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT3_PAGE_TABLE_RESERVE0_DEFAULT … #define mmMMVM_CONTEXT3_PAGE_TABLE_RESERVE1_DEFAULT … #define mmMMVM_CONTEXT4_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT4_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT4_PAGE_TABLE_START_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT4_PAGE_TABLE_START_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT4_PAGE_TABLE_END_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT4_PAGE_TABLE_END_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT4_PAGE_TABLE_RESERVE0_DEFAULT … #define mmMMVM_CONTEXT4_PAGE_TABLE_RESERVE1_DEFAULT … #define mmMMVM_CONTEXT5_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT5_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT5_PAGE_TABLE_START_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT5_PAGE_TABLE_START_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT5_PAGE_TABLE_END_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT5_PAGE_TABLE_END_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT5_PAGE_TABLE_RESERVE0_DEFAULT … #define mmMMVM_CONTEXT5_PAGE_TABLE_RESERVE1_DEFAULT … #define mmMMVM_CONTEXT6_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT6_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT6_PAGE_TABLE_START_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT6_PAGE_TABLE_START_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT6_PAGE_TABLE_END_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT6_PAGE_TABLE_END_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT6_PAGE_TABLE_RESERVE0_DEFAULT … #define mmMMVM_CONTEXT6_PAGE_TABLE_RESERVE1_DEFAULT … #define mmMMVM_CONTEXT7_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT7_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT7_PAGE_TABLE_START_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT7_PAGE_TABLE_START_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT7_PAGE_TABLE_END_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT7_PAGE_TABLE_END_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT7_PAGE_TABLE_RESERVE0_DEFAULT … #define mmMMVM_CONTEXT7_PAGE_TABLE_RESERVE1_DEFAULT … #define mmMMVM_CONTEXT8_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT8_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT8_PAGE_TABLE_START_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT8_PAGE_TABLE_START_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT8_PAGE_TABLE_END_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT8_PAGE_TABLE_END_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT8_PAGE_TABLE_RESERVE0_DEFAULT … #define mmMMVM_CONTEXT8_PAGE_TABLE_RESERVE1_DEFAULT … #define mmMMVM_CONTEXT9_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT9_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT9_PAGE_TABLE_START_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT9_PAGE_TABLE_START_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT9_PAGE_TABLE_END_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT9_PAGE_TABLE_END_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT9_PAGE_TABLE_RESERVE0_DEFAULT … #define mmMMVM_CONTEXT9_PAGE_TABLE_RESERVE1_DEFAULT … #define mmMMVM_CONTEXT10_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT10_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT10_PAGE_TABLE_START_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT10_PAGE_TABLE_START_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT10_PAGE_TABLE_END_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT10_PAGE_TABLE_END_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT10_PAGE_TABLE_RESERVE0_DEFAULT … #define mmMMVM_CONTEXT10_PAGE_TABLE_RESERVE1_DEFAULT … #define mmMMVM_CONTEXT11_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT11_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT11_PAGE_TABLE_START_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT11_PAGE_TABLE_START_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT11_PAGE_TABLE_END_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT11_PAGE_TABLE_END_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT11_PAGE_TABLE_RESERVE0_DEFAULT … #define mmMMVM_CONTEXT11_PAGE_TABLE_RESERVE1_DEFAULT … #define mmMMVM_CONTEXT12_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT12_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT12_PAGE_TABLE_START_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT12_PAGE_TABLE_START_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT12_PAGE_TABLE_END_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT12_PAGE_TABLE_END_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT12_PAGE_TABLE_RESERVE0_DEFAULT … #define mmMMVM_CONTEXT12_PAGE_TABLE_RESERVE1_DEFAULT … #define mmMMVM_CONTEXT13_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT13_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT13_PAGE_TABLE_START_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT13_PAGE_TABLE_START_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT13_PAGE_TABLE_END_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT13_PAGE_TABLE_END_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT13_PAGE_TABLE_RESERVE0_DEFAULT … #define mmMMVM_CONTEXT13_PAGE_TABLE_RESERVE1_DEFAULT … #define mmMMVM_CONTEXT14_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT14_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT14_PAGE_TABLE_START_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT14_PAGE_TABLE_START_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT14_PAGE_TABLE_END_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT14_PAGE_TABLE_END_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT14_PAGE_TABLE_RESERVE0_DEFAULT … #define mmMMVM_CONTEXT14_PAGE_TABLE_RESERVE1_DEFAULT … #define mmMMVM_CONTEXT15_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT15_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT15_PAGE_TABLE_START_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT15_PAGE_TABLE_START_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT15_PAGE_TABLE_END_ADDR_LO32_DEFAULT … #define mmMMVM_CONTEXT15_PAGE_TABLE_END_ADDR_HI32_DEFAULT … #define mmMMVM_CONTEXT15_PAGE_TABLE_RESERVE0_DEFAULT … #define mmMMVM_CONTEXT15_PAGE_TABLE_RESERVE1_DEFAULT … // addressBlock: mmhub_mmutcl2_mmvml2indec #define mmMMVM_INVALIDATE_ENG0_SEM_DEFAULT … #define mmMMVM_INVALIDATE_ENG0_REQ_DEFAULT … #define mmMMVM_INVALIDATE_ENG0_ACK_DEFAULT … #define mmMMVM_INVALIDATE_ENG0_ADDR_RANGE_LO32_DEFAULT … #define mmMMVM_INVALIDATE_ENG0_ADDR_RANGE_HI32_DEFAULT … #define mmMMVM_INVALIDATE_ENG0_RESERVE0_DEFAULT … #define mmMMVM_INVALIDATE_ENG0_RESERVE1_DEFAULT … #define mmMMVM_INVALIDATE_ENG0_RESERVE2_DEFAULT … #define mmMMVM_INVALIDATE_ENG1_SEM_DEFAULT … #define mmMMVM_INVALIDATE_ENG1_REQ_DEFAULT … #define mmMMVM_INVALIDATE_ENG1_ACK_DEFAULT … #define mmMMVM_INVALIDATE_ENG1_ADDR_RANGE_LO32_DEFAULT … #define mmMMVM_INVALIDATE_ENG1_ADDR_RANGE_HI32_DEFAULT … #define mmMMVM_INVALIDATE_ENG1_RESERVE0_DEFAULT … #define mmMMVM_INVALIDATE_ENG1_RESERVE1_DEFAULT … #define mmMMVM_INVALIDATE_ENG1_RESERVE2_DEFAULT … #define mmMMVM_INVALIDATE_ENG2_SEM_DEFAULT … #define mmMMVM_INVALIDATE_ENG2_REQ_DEFAULT … #define mmMMVM_INVALIDATE_ENG2_ACK_DEFAULT … #define mmMMVM_INVALIDATE_ENG2_ADDR_RANGE_LO32_DEFAULT … #define mmMMVM_INVALIDATE_ENG2_ADDR_RANGE_HI32_DEFAULT … #define mmMMVM_INVALIDATE_ENG2_RESERVE0_DEFAULT … #define mmMMVM_INVALIDATE_ENG2_RESERVE1_DEFAULT … #define mmMMVM_INVALIDATE_ENG2_RESERVE2_DEFAULT … #define mmMMVM_INVALIDATE_ENG3_SEM_DEFAULT … #define mmMMVM_INVALIDATE_ENG3_REQ_DEFAULT … #define mmMMVM_INVALIDATE_ENG3_ACK_DEFAULT … #define mmMMVM_INVALIDATE_ENG3_ADDR_RANGE_LO32_DEFAULT … #define mmMMVM_INVALIDATE_ENG3_ADDR_RANGE_HI32_DEFAULT … #define mmMMVM_INVALIDATE_ENG3_RESERVE0_DEFAULT … #define mmMMVM_INVALIDATE_ENG3_RESERVE1_DEFAULT … #define mmMMVM_INVALIDATE_ENG3_RESERVE2_DEFAULT … #define mmMMVM_INVALIDATE_ENG4_SEM_DEFAULT … #define mmMMVM_INVALIDATE_ENG4_REQ_DEFAULT … #define mmMMVM_INVALIDATE_ENG4_ACK_DEFAULT … #define mmMMVM_INVALIDATE_ENG4_ADDR_RANGE_LO32_DEFAULT … #define mmMMVM_INVALIDATE_ENG4_ADDR_RANGE_HI32_DEFAULT … #define mmMMVM_INVALIDATE_ENG4_RESERVE0_DEFAULT … #define mmMMVM_INVALIDATE_ENG4_RESERVE1_DEFAULT … #define mmMMVM_INVALIDATE_ENG4_RESERVE2_DEFAULT … #define mmMMVM_INVALIDATE_ENG5_SEM_DEFAULT … #define mmMMVM_INVALIDATE_ENG5_REQ_DEFAULT … #define mmMMVM_INVALIDATE_ENG5_ACK_DEFAULT … #define mmMMVM_INVALIDATE_ENG5_ADDR_RANGE_LO32_DEFAULT … #define mmMMVM_INVALIDATE_ENG5_ADDR_RANGE_HI32_DEFAULT … #define mmMMVM_INVALIDATE_ENG5_RESERVE0_DEFAULT … #define mmMMVM_INVALIDATE_ENG5_RESERVE1_DEFAULT … #define mmMMVM_INVALIDATE_ENG5_RESERVE2_DEFAULT … #define mmMMVM_INVALIDATE_ENG6_SEM_DEFAULT … #define mmMMVM_INVALIDATE_ENG6_REQ_DEFAULT … #define mmMMVM_INVALIDATE_ENG6_ACK_DEFAULT … #define mmMMVM_INVALIDATE_ENG6_ADDR_RANGE_LO32_DEFAULT … #define mmMMVM_INVALIDATE_ENG6_ADDR_RANGE_HI32_DEFAULT … #define mmMMVM_INVALIDATE_ENG6_RESERVE0_DEFAULT … #define mmMMVM_INVALIDATE_ENG6_RESERVE1_DEFAULT … #define mmMMVM_INVALIDATE_ENG6_RESERVE2_DEFAULT … #define mmMMVM_INVALIDATE_ENG7_SEM_DEFAULT … #define mmMMVM_INVALIDATE_ENG7_REQ_DEFAULT … #define mmMMVM_INVALIDATE_ENG7_ACK_DEFAULT … #define mmMMVM_INVALIDATE_ENG7_ADDR_RANGE_LO32_DEFAULT … #define mmMMVM_INVALIDATE_ENG7_ADDR_RANGE_HI32_DEFAULT … #define mmMMVM_INVALIDATE_ENG7_RESERVE0_DEFAULT … #define mmMMVM_INVALIDATE_ENG7_RESERVE1_DEFAULT … #define mmMMVM_INVALIDATE_ENG7_RESERVE2_DEFAULT … #define mmMMVM_INVALIDATE_ENG8_SEM_DEFAULT … #define mmMMVM_INVALIDATE_ENG8_REQ_DEFAULT … #define mmMMVM_INVALIDATE_ENG8_ACK_DEFAULT … #define mmMMVM_INVALIDATE_ENG8_ADDR_RANGE_LO32_DEFAULT … #define mmMMVM_INVALIDATE_ENG8_ADDR_RANGE_HI32_DEFAULT … #define mmMMVM_INVALIDATE_ENG8_RESERVE0_DEFAULT … #define mmMMVM_INVALIDATE_ENG8_RESERVE1_DEFAULT … #define mmMMVM_INVALIDATE_ENG8_RESERVE2_DEFAULT … #define mmMMVM_INVALIDATE_ENG9_SEM_DEFAULT … #define mmMMVM_INVALIDATE_ENG9_REQ_DEFAULT … #define mmMMVM_INVALIDATE_ENG9_ACK_DEFAULT … #define mmMMVM_INVALIDATE_ENG9_ADDR_RANGE_LO32_DEFAULT … #define mmMMVM_INVALIDATE_ENG9_ADDR_RANGE_HI32_DEFAULT … #define mmMMVM_INVALIDATE_ENG9_RESERVE0_DEFAULT … #define mmMMVM_INVALIDATE_ENG9_RESERVE1_DEFAULT … #define mmMMVM_INVALIDATE_ENG9_RESERVE2_DEFAULT … #define mmMMVM_INVALIDATE_ENG10_SEM_DEFAULT … #define mmMMVM_INVALIDATE_ENG10_REQ_DEFAULT … #define mmMMVM_INVALIDATE_ENG10_ACK_DEFAULT … #define mmMMVM_INVALIDATE_ENG10_ADDR_RANGE_LO32_DEFAULT … #define mmMMVM_INVALIDATE_ENG10_ADDR_RANGE_HI32_DEFAULT … #define mmMMVM_INVALIDATE_ENG10_RESERVE0_DEFAULT … #define mmMMVM_INVALIDATE_ENG10_RESERVE1_DEFAULT … #define mmMMVM_INVALIDATE_ENG10_RESERVE2_DEFAULT … #define mmMMVM_INVALIDATE_ENG11_SEM_DEFAULT … #define mmMMVM_INVALIDATE_ENG11_REQ_DEFAULT … #define mmMMVM_INVALIDATE_ENG11_ACK_DEFAULT … #define mmMMVM_INVALIDATE_ENG11_ADDR_RANGE_LO32_DEFAULT … #define mmMMVM_INVALIDATE_ENG11_ADDR_RANGE_HI32_DEFAULT … #define mmMMVM_INVALIDATE_ENG11_RESERVE0_DEFAULT … #define mmMMVM_INVALIDATE_ENG11_RESERVE1_DEFAULT … #define mmMMVM_INVALIDATE_ENG11_RESERVE2_DEFAULT … #define mmMMVM_INVALIDATE_ENG12_SEM_DEFAULT … #define mmMMVM_INVALIDATE_ENG12_REQ_DEFAULT … #define mmMMVM_INVALIDATE_ENG12_ACK_DEFAULT … #define mmMMVM_INVALIDATE_ENG12_ADDR_RANGE_LO32_DEFAULT … #define mmMMVM_INVALIDATE_ENG12_ADDR_RANGE_HI32_DEFAULT … #define mmMMVM_INVALIDATE_ENG12_RESERVE0_DEFAULT … #define mmMMVM_INVALIDATE_ENG12_RESERVE1_DEFAULT … #define mmMMVM_INVALIDATE_ENG12_RESERVE2_DEFAULT … #define mmMMVM_INVALIDATE_ENG13_SEM_DEFAULT … #define mmMMVM_INVALIDATE_ENG13_REQ_DEFAULT … #define mmMMVM_INVALIDATE_ENG13_ACK_DEFAULT … #define mmMMVM_INVALIDATE_ENG13_ADDR_RANGE_LO32_DEFAULT … #define mmMMVM_INVALIDATE_ENG13_ADDR_RANGE_HI32_DEFAULT … #define mmMMVM_INVALIDATE_ENG13_RESERVE0_DEFAULT … #define mmMMVM_INVALIDATE_ENG13_RESERVE1_DEFAULT … #define mmMMVM_INVALIDATE_ENG13_RESERVE2_DEFAULT … #define mmMMVM_INVALIDATE_ENG14_SEM_DEFAULT … #define mmMMVM_INVALIDATE_ENG14_REQ_DEFAULT … #define mmMMVM_INVALIDATE_ENG14_ACK_DEFAULT … #define mmMMVM_INVALIDATE_ENG14_ADDR_RANGE_LO32_DEFAULT … #define mmMMVM_INVALIDATE_ENG14_ADDR_RANGE_HI32_DEFAULT … #define mmMMVM_INVALIDATE_ENG14_RESERVE0_DEFAULT … #define mmMMVM_INVALIDATE_ENG14_RESERVE1_DEFAULT … #define mmMMVM_INVALIDATE_ENG14_RESERVE2_DEFAULT … #define mmMMVM_INVALIDATE_ENG15_SEM_DEFAULT … #define mmMMVM_INVALIDATE_ENG15_REQ_DEFAULT … #define mmMMVM_INVALIDATE_ENG15_ACK_DEFAULT … #define mmMMVM_INVALIDATE_ENG15_ADDR_RANGE_LO32_DEFAULT … #define mmMMVM_INVALIDATE_ENG15_ADDR_RANGE_HI32_DEFAULT … #define mmMMVM_INVALIDATE_ENG15_RESERVE0_DEFAULT … #define mmMMVM_INVALIDATE_ENG15_RESERVE1_DEFAULT … #define mmMMVM_INVALIDATE_ENG15_RESERVE2_DEFAULT … #define mmMMVM_INVALIDATE_ENG16_SEM_DEFAULT … #define mmMMVM_INVALIDATE_ENG16_REQ_DEFAULT … #define mmMMVM_INVALIDATE_ENG16_ACK_DEFAULT … #define mmMMVM_INVALIDATE_ENG16_ADDR_RANGE_LO32_DEFAULT … #define mmMMVM_INVALIDATE_ENG16_ADDR_RANGE_HI32_DEFAULT … #define mmMMVM_INVALIDATE_ENG16_RESERVE0_DEFAULT … #define mmMMVM_INVALIDATE_ENG16_RESERVE1_DEFAULT … #define mmMMVM_INVALIDATE_ENG16_RESERVE2_DEFAULT … #define mmMMVM_INVALIDATE_ENG17_SEM_DEFAULT … #define mmMMVM_INVALIDATE_ENG17_REQ_DEFAULT … #define mmMMVM_INVALIDATE_ENG17_ACK_DEFAULT … #define mmMMVM_INVALIDATE_ENG17_ADDR_RANGE_LO32_DEFAULT … #define mmMMVM_INVALIDATE_ENG17_ADDR_RANGE_HI32_DEFAULT … #define mmMMVM_INVALIDATE_ENG17_RESERVE0_DEFAULT … #define mmMMVM_INVALIDATE_ENG17_RESERVE1_DEFAULT … #define mmMMVM_INVALIDATE_ENG17_RESERVE2_DEFAULT … // addressBlock: mmhub_mmutcl2_mml2tlbpfdec #define mmMML2TLB_TLB0_STATUS_DEFAULT … // addressBlock: mmhub_mmutcl2_mml2tlbpldec #define mmMML2TLB_PERFCOUNTER0_CFG_DEFAULT … #define mmMML2TLB_PERFCOUNTER1_CFG_DEFAULT … #define mmMML2TLB_PERFCOUNTER2_CFG_DEFAULT … #define mmMML2TLB_PERFCOUNTER3_CFG_DEFAULT … #define mmMML2TLB_PERFCOUNTER_RSLT_CNTL_DEFAULT … // addressBlock: mmhub_mmutcl2_mml2tlbprdec #define mmMML2TLB_PERFCOUNTER_LO_DEFAULT … #define mmMML2TLB_PERFCOUNTER_HI_DEFAULT … #endif
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