/* SPDX-License-Identifier: GPL-2.0+ */
#ifndef __DT_BINDINGS_RESET_BCM6328_H
#define __DT_BINDINGS_RESET_BCM6328_H
#define BCM6328_RST_SPI 0
#define BCM6328_RST_EPHY 1
#define BCM6328_RST_SAR 2
#define BCM6328_RST_ENETSW 3
#define BCM6328_RST_USBS 4
#define BCM6328_RST_USBH 5
#define BCM6328_RST_PCM 6
#define BCM6328_RST_PCIE_CORE 7
#define BCM6328_RST_PCIE 8
#define BCM6328_RST_PCIE_EXT 9
#define BCM6328_RST_PCIE_HARD 10
#endif /* __DT_BINDINGS_RESET_BCM6328_H */
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