/* SPDX-License-Identifier: GPL-2.0-only */
/*
* OMAP44xx Clock Management register bits
*
* Copyright (C) 2009-2012 Texas Instruments, Inc.
* Copyright (C) 2009-2010 Nokia Corporation
*
* Paul Walmsley ([email protected])
* Rajendra Nayak ([email protected])
* Benoit Cousson ([email protected])
*
* This file is automatically generated from the OMAP hardware databases.
* We respectfully ask that any modifications to this file be coordinated
* with the public [email protected] mailing list and the
* authors above to ensure that the autogeneration scripts are kept
* up-to-date with the file contents.
*/
#ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H
#define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H
#define OMAP4430_ABE_STATDEP_SHIFT 3
#define OMAP4430_CLKTRCTRL_SHIFT 0
#define OMAP4430_CLKTRCTRL_MASK (0x3 << 0)
#define OMAP4430_DSS_STATDEP_SHIFT 8
#define OMAP4430_DUCATI_STATDEP_SHIFT 0
#define OMAP4430_GFX_STATDEP_SHIFT 10
#define OMAP4430_IDLEST_SHIFT 16
#define OMAP4430_IDLEST_MASK (0x3 << 16)
#define OMAP4430_IVAHD_STATDEP_SHIFT 2
#define OMAP4430_L3INIT_STATDEP_SHIFT 7
#define OMAP4430_L3_1_STATDEP_SHIFT 5
#define OMAP4430_L3_2_STATDEP_SHIFT 6
#define OMAP4430_L4CFG_STATDEP_SHIFT 12
#define OMAP4430_L4PER_STATDEP_SHIFT 13
#define OMAP4430_L4SEC_STATDEP_SHIFT 14
#define OMAP4430_L4WKUP_STATDEP_SHIFT 15
#define OMAP4430_MEMIF_STATDEP_SHIFT 4
#define OMAP4430_MODULEMODE_SHIFT 0
#define OMAP4430_MODULEMODE_MASK (0x3 << 0)
#define OMAP4430_TESLA_STATDEP_SHIFT 1
#endif
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