linux/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * HDMI wrapper
 *
 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
 */

#define DSS_SUBSYS_NAME …

#include <linux/kernel.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/seq_file.h>

#include "omapdss.h"
#include "dss.h"
#include "hdmi.h"

void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s)
{ … }

u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp)
{ … }

void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus)
{ … }

void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask)
{ … }

void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u32 mask)
{ … }

/* PHY_PWR_CMD */
int hdmi_wp_set_phy_pwr(struct hdmi_wp_data *wp, enum hdmi_phy_pwr val)
{ … }

/* PLL_PWR_CMD */
int hdmi_wp_set_pll_pwr(struct hdmi_wp_data *wp, enum hdmi_pll_pwr val)
{ … }

int hdmi_wp_video_start(struct hdmi_wp_data *wp)
{ … }

void hdmi_wp_video_stop(struct hdmi_wp_data *wp)
{ … }

void hdmi_wp_video_config_format(struct hdmi_wp_data *wp,
		const struct hdmi_video_format *video_fmt)
{ … }

void hdmi_wp_video_config_interface(struct hdmi_wp_data *wp,
				    const struct videomode *vm)
{ … }

void hdmi_wp_video_config_timing(struct hdmi_wp_data *wp,
				 const struct videomode *vm)
{ … }

void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt,
		struct videomode *vm, const struct hdmi_config *param)
{ … }

void hdmi_wp_audio_config_format(struct hdmi_wp_data *wp,
		struct hdmi_audio_format *aud_fmt)
{ … }

void hdmi_wp_audio_config_dma(struct hdmi_wp_data *wp,
		struct hdmi_audio_dma *aud_dma)
{ … }

int hdmi_wp_audio_enable(struct hdmi_wp_data *wp, bool enable)
{ … }

int hdmi_wp_audio_core_req_enable(struct hdmi_wp_data *wp, bool enable)
{ … }

int hdmi_wp_init(struct platform_device *pdev, struct hdmi_wp_data *wp,
		 unsigned int version)
{ … }

phys_addr_t hdmi_wp_get_audio_dma_addr(struct hdmi_wp_data *wp)
{ … }