// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2009 Nokia Corporation * Author: Tomi Valkeinen <[email protected]> * * Some code and ideas taken from drivers/video/omap/ driver * by Imre Deak. */ #define DSS_SUBSYS_NAME … #include <linux/kernel.h> #include <linux/dma-mapping.h> #include <linux/vmalloc.h> #include <linux/export.h> #include <linux/clk.h> #include <linux/io.h> #include <linux/jiffies.h> #include <linux/seq_file.h> #include <linux/delay.h> #include <linux/workqueue.h> #include <linux/hardirq.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <linux/property.h> #include <linux/sizes.h> #include <linux/mfd/syscon.h> #include <linux/regmap.h> #include <linux/of.h> #include <linux/component.h> #include <linux/sys_soc.h> #include <drm/drm_fourcc.h> #include <drm/drm_blend.h> #include "omapdss.h" #include "dss.h" #include "dispc.h" struct dispc_device; /* DISPC */ #define DISPC_SZ_REGS … enum omap_burst_size { … }; #define REG_GET(dispc, idx, start, end) … #define REG_FLD_MOD(dispc, idx, val, start, end) … /* DISPC has feature id */ enum dispc_feature_id { … }; struct dispc_features { … }; #define DISPC_MAX_NR_FIFOS … #define DISPC_MAX_CHANNEL_GAMMA … struct dispc_device { … }; enum omap_color_component { … }; enum mgr_reg_fields { … }; /* DISPC register field id */ enum dispc_feat_reg_field { … }; struct dispc_reg_field { … }; struct dispc_gamma_desc { … }; static const struct { … } mgr_desc[] = …; static unsigned long dispc_fclk_rate(struct dispc_device *dispc); static unsigned long dispc_core_clk_rate(struct dispc_device *dispc); static unsigned long dispc_mgr_lclk_rate(struct dispc_device *dispc, enum omap_channel channel); static unsigned long dispc_mgr_pclk_rate(struct dispc_device *dispc, enum omap_channel channel); static unsigned long dispc_plane_pclk_rate(struct dispc_device *dispc, enum omap_plane_id plane); static unsigned long dispc_plane_lclk_rate(struct dispc_device *dispc, enum omap_plane_id plane); static inline void dispc_write_reg(struct dispc_device *dispc, u16 idx, u32 val) { … } static inline u32 dispc_read_reg(struct dispc_device *dispc, u16 idx) { … } static u32 mgr_fld_read(struct dispc_device *dispc, enum omap_channel channel, enum mgr_reg_fields regfld) { … } static void mgr_fld_write(struct dispc_device *dispc, enum omap_channel channel, enum mgr_reg_fields regfld, int val) { … } int dispc_get_num_ovls(struct dispc_device *dispc) { … } int dispc_get_num_mgrs(struct dispc_device *dispc) { … } static void dispc_get_reg_field(struct dispc_device *dispc, enum dispc_feat_reg_field id, u8 *start, u8 *end) { … } static bool dispc_has_feature(struct dispc_device *dispc, enum dispc_feature_id id) { … } #define SR … #define RR … static void dispc_save_context(struct dispc_device *dispc) { … } static void dispc_restore_context(struct dispc_device *dispc) { … } #undef SR #undef RR int dispc_runtime_get(struct dispc_device *dispc) { … } void dispc_runtime_put(struct dispc_device *dispc) { … } u32 dispc_mgr_get_vsync_irq(struct dispc_device *dispc, enum omap_channel channel) { … } u32 dispc_mgr_get_framedone_irq(struct dispc_device *dispc, enum omap_channel channel) { … } u32 dispc_mgr_get_sync_lost_irq(struct dispc_device *dispc, enum omap_channel channel) { … } u32 dispc_wb_get_framedone_irq(struct dispc_device *dispc) { … } void dispc_mgr_enable(struct dispc_device *dispc, enum omap_channel channel, bool enable) { … } static bool dispc_mgr_is_enabled(struct dispc_device *dispc, enum omap_channel channel) { … } bool dispc_mgr_go_busy(struct dispc_device *dispc, enum omap_channel channel) { … } void dispc_mgr_go(struct dispc_device *dispc, enum omap_channel channel) { … } bool dispc_wb_go_busy(struct dispc_device *dispc) { … } void dispc_wb_go(struct dispc_device *dispc) { … } static void dispc_ovl_write_firh_reg(struct dispc_device *dispc, enum omap_plane_id plane, int reg, u32 value) { … } static void dispc_ovl_write_firhv_reg(struct dispc_device *dispc, enum omap_plane_id plane, int reg, u32 value) { … } static void dispc_ovl_write_firv_reg(struct dispc_device *dispc, enum omap_plane_id plane, int reg, u32 value) { … } static void dispc_ovl_write_firh2_reg(struct dispc_device *dispc, enum omap_plane_id plane, int reg, u32 value) { … } static void dispc_ovl_write_firhv2_reg(struct dispc_device *dispc, enum omap_plane_id plane, int reg, u32 value) { … } static void dispc_ovl_write_firv2_reg(struct dispc_device *dispc, enum omap_plane_id plane, int reg, u32 value) { … } static void dispc_ovl_set_scale_coef(struct dispc_device *dispc, enum omap_plane_id plane, int fir_hinc, int fir_vinc, int five_taps, enum omap_color_component color_comp) { … } struct csc_coef_yuv2rgb { … }; static void dispc_ovl_write_color_conv_coef(struct dispc_device *dispc, enum omap_plane_id plane, const struct csc_coef_yuv2rgb *ct) { … } /* YUV -> RGB, ITU-R BT.601, full range */ static const struct csc_coef_yuv2rgb coefs_yuv2rgb_bt601_full = …; /* YUV -> RGB, ITU-R BT.601, limited range */ static const struct csc_coef_yuv2rgb coefs_yuv2rgb_bt601_lim = …; /* YUV -> RGB, ITU-R BT.709, full range */ static const struct csc_coef_yuv2rgb coefs_yuv2rgb_bt709_full = …; /* YUV -> RGB, ITU-R BT.709, limited range */ static const struct csc_coef_yuv2rgb coefs_yuv2rgb_bt709_lim = …; static void dispc_ovl_set_csc(struct dispc_device *dispc, enum omap_plane_id plane, enum drm_color_encoding color_encoding, enum drm_color_range color_range) { … } static void dispc_ovl_set_ba0(struct dispc_device *dispc, enum omap_plane_id plane, u32 paddr) { … } static void dispc_ovl_set_ba1(struct dispc_device *dispc, enum omap_plane_id plane, u32 paddr) { … } static void dispc_ovl_set_ba0_uv(struct dispc_device *dispc, enum omap_plane_id plane, u32 paddr) { … } static void dispc_ovl_set_ba1_uv(struct dispc_device *dispc, enum omap_plane_id plane, u32 paddr) { … } static void dispc_ovl_set_pos(struct dispc_device *dispc, enum omap_plane_id plane, enum omap_overlay_caps caps, int x, int y) { … } static void dispc_ovl_set_input_size(struct dispc_device *dispc, enum omap_plane_id plane, int width, int height) { … } static void dispc_ovl_set_output_size(struct dispc_device *dispc, enum omap_plane_id plane, int width, int height) { … } static void dispc_ovl_set_zorder(struct dispc_device *dispc, enum omap_plane_id plane, enum omap_overlay_caps caps, u8 zorder) { … } static void dispc_ovl_enable_zorder_planes(struct dispc_device *dispc) { … } static void dispc_ovl_set_pre_mult_alpha(struct dispc_device *dispc, enum omap_plane_id plane, enum omap_overlay_caps caps, bool enable) { … } static void dispc_ovl_setup_global_alpha(struct dispc_device *dispc, enum omap_plane_id plane, enum omap_overlay_caps caps, u8 global_alpha) { … } static void dispc_ovl_set_pix_inc(struct dispc_device *dispc, enum omap_plane_id plane, s32 inc) { … } static void dispc_ovl_set_row_inc(struct dispc_device *dispc, enum omap_plane_id plane, s32 inc) { … } static void dispc_ovl_set_color_mode(struct dispc_device *dispc, enum omap_plane_id plane, u32 fourcc) { … } static void dispc_ovl_configure_burst_type(struct dispc_device *dispc, enum omap_plane_id plane, enum omap_dss_rotation_type rotation) { … } static void dispc_ovl_set_channel_out(struct dispc_device *dispc, enum omap_plane_id plane, enum omap_channel channel) { … } static enum omap_channel dispc_ovl_get_channel_out(struct dispc_device *dispc, enum omap_plane_id plane) { … } static void dispc_ovl_set_burst_size(struct dispc_device *dispc, enum omap_plane_id plane, enum omap_burst_size burst_size) { … } static void dispc_configure_burst_sizes(struct dispc_device *dispc) { … } static u32 dispc_ovl_get_burst_size(struct dispc_device *dispc, enum omap_plane_id plane) { … } bool dispc_ovl_color_mode_supported(struct dispc_device *dispc, enum omap_plane_id plane, u32 fourcc) { … } const u32 *dispc_ovl_get_color_modes(struct dispc_device *dispc, enum omap_plane_id plane) { … } static void dispc_mgr_enable_cpr(struct dispc_device *dispc, enum omap_channel channel, bool enable) { … } static void dispc_mgr_set_cpr_coef(struct dispc_device *dispc, enum omap_channel channel, const struct omap_dss_cpr_coefs *coefs) { … } static void dispc_ovl_set_vid_color_conv(struct dispc_device *dispc, enum omap_plane_id plane, bool enable) { … } static void dispc_ovl_enable_replication(struct dispc_device *dispc, enum omap_plane_id plane, enum omap_overlay_caps caps, bool enable) { … } static void dispc_mgr_set_size(struct dispc_device *dispc, enum omap_channel channel, u16 width, u16 height) { … } static void dispc_init_fifos(struct dispc_device *dispc) { … } static u32 dispc_ovl_get_fifo_size(struct dispc_device *dispc, enum omap_plane_id plane) { … } void dispc_ovl_set_fifo_threshold(struct dispc_device *dispc, enum omap_plane_id plane, u32 low, u32 high) { … } void dispc_enable_fifomerge(struct dispc_device *dispc, bool enable) { … } void dispc_ovl_compute_fifo_thresholds(struct dispc_device *dispc, enum omap_plane_id plane, u32 *fifo_low, u32 *fifo_high, bool use_fifomerge, bool manual_update) { … } static void dispc_ovl_set_mflag(struct dispc_device *dispc, enum omap_plane_id plane, bool enable) { … } static void dispc_ovl_set_mflag_threshold(struct dispc_device *dispc, enum omap_plane_id plane, int low, int high) { … } static void dispc_init_mflag(struct dispc_device *dispc) { … } static void dispc_ovl_set_fir(struct dispc_device *dispc, enum omap_plane_id plane, int hinc, int vinc, enum omap_color_component color_comp) { … } static void dispc_ovl_set_vid_accu0(struct dispc_device *dispc, enum omap_plane_id plane, int haccu, int vaccu) { … } static void dispc_ovl_set_vid_accu1(struct dispc_device *dispc, enum omap_plane_id plane, int haccu, int vaccu) { … } static void dispc_ovl_set_vid_accu2_0(struct dispc_device *dispc, enum omap_plane_id plane, int haccu, int vaccu) { … } static void dispc_ovl_set_vid_accu2_1(struct dispc_device *dispc, enum omap_plane_id plane, int haccu, int vaccu) { … } static void dispc_ovl_set_scale_param(struct dispc_device *dispc, enum omap_plane_id plane, u16 orig_width, u16 orig_height, u16 out_width, u16 out_height, bool five_taps, u8 rotation, enum omap_color_component color_comp) { … } static void dispc_ovl_set_accu_uv(struct dispc_device *dispc, enum omap_plane_id plane, u16 orig_width, u16 orig_height, u16 out_width, u16 out_height, bool ilace, u32 fourcc, u8 rotation) { … } static void dispc_ovl_set_scaling_common(struct dispc_device *dispc, enum omap_plane_id plane, u16 orig_width, u16 orig_height, u16 out_width, u16 out_height, bool ilace, bool five_taps, bool fieldmode, u32 fourcc, u8 rotation) { … } static void dispc_ovl_set_scaling_uv(struct dispc_device *dispc, enum omap_plane_id plane, u16 orig_width, u16 orig_height, u16 out_width, u16 out_height, bool ilace, bool five_taps, bool fieldmode, u32 fourcc, u8 rotation) { … } static void dispc_ovl_set_scaling(struct dispc_device *dispc, enum omap_plane_id plane, u16 orig_width, u16 orig_height, u16 out_width, u16 out_height, bool ilace, bool five_taps, bool fieldmode, u32 fourcc, u8 rotation) { … } static void dispc_ovl_set_rotation_attrs(struct dispc_device *dispc, enum omap_plane_id plane, u8 rotation, enum omap_dss_rotation_type rotation_type, u32 fourcc) { … } static int color_mode_to_bpp(u32 fourcc) { … } static s32 pixinc(int pixels, u8 ps) { … } static void calc_offset(u16 screen_width, u16 width, u32 fourcc, bool fieldmode, unsigned int field_offset, unsigned int *offset0, unsigned int *offset1, s32 *row_inc, s32 *pix_inc, int x_predecim, int y_predecim, enum omap_dss_rotation_type rotation_type, u8 rotation) { … } /* * This function is used to avoid synclosts in OMAP3, because of some * undocumented horizontal position and timing related limitations. */ static int check_horiz_timing_omap3(unsigned long pclk, unsigned long lclk, const struct videomode *vm, u16 pos_x, u16 width, u16 height, u16 out_width, u16 out_height, bool five_taps) { … } static unsigned long calc_core_clk_five_taps(unsigned long pclk, const struct videomode *vm, u16 width, u16 height, u16 out_width, u16 out_height, u32 fourcc) { … } static unsigned long calc_core_clk_24xx(unsigned long pclk, u16 width, u16 height, u16 out_width, u16 out_height, bool mem_to_mem) { … } static unsigned long calc_core_clk_34xx(unsigned long pclk, u16 width, u16 height, u16 out_width, u16 out_height, bool mem_to_mem) { … } static unsigned long calc_core_clk_44xx(unsigned long pclk, u16 width, u16 height, u16 out_width, u16 out_height, bool mem_to_mem) { … } static int dispc_ovl_calc_scaling_24xx(struct dispc_device *dispc, unsigned long pclk, unsigned long lclk, const struct videomode *vm, u16 width, u16 height, u16 out_width, u16 out_height, u32 fourcc, bool *five_taps, int *x_predecim, int *y_predecim, int *decim_x, int *decim_y, u16 pos_x, unsigned long *core_clk, bool mem_to_mem) { … } static int dispc_ovl_calc_scaling_34xx(struct dispc_device *dispc, unsigned long pclk, unsigned long lclk, const struct videomode *vm, u16 width, u16 height, u16 out_width, u16 out_height, u32 fourcc, bool *five_taps, int *x_predecim, int *y_predecim, int *decim_x, int *decim_y, u16 pos_x, unsigned long *core_clk, bool mem_to_mem) { … } static int dispc_ovl_calc_scaling_44xx(struct dispc_device *dispc, unsigned long pclk, unsigned long lclk, const struct videomode *vm, u16 width, u16 height, u16 out_width, u16 out_height, u32 fourcc, bool *five_taps, int *x_predecim, int *y_predecim, int *decim_x, int *decim_y, u16 pos_x, unsigned long *core_clk, bool mem_to_mem) { … } enum omap_overlay_caps dispc_ovl_get_caps(struct dispc_device *dispc, enum omap_plane_id plane) { … } #define DIV_FRAC(dividend, divisor) … static int dispc_ovl_calc_scaling(struct dispc_device *dispc, enum omap_plane_id plane, unsigned long pclk, unsigned long lclk, enum omap_overlay_caps caps, const struct videomode *vm, u16 width, u16 height, u16 out_width, u16 out_height, u32 fourcc, bool *five_taps, int *x_predecim, int *y_predecim, u16 pos_x, enum omap_dss_rotation_type rotation_type, bool mem_to_mem) { … } void dispc_ovl_get_max_size(struct dispc_device *dispc, u16 *width, u16 *height) { … } static int dispc_ovl_setup_common(struct dispc_device *dispc, enum omap_plane_id plane, enum omap_overlay_caps caps, u32 paddr, u32 p_uv_addr, u16 screen_width, int pos_x, int pos_y, u16 width, u16 height, u16 out_width, u16 out_height, u32 fourcc, u8 rotation, u8 zorder, u8 pre_mult_alpha, u8 global_alpha, enum omap_dss_rotation_type rotation_type, bool replication, const struct videomode *vm, bool mem_to_mem, enum drm_color_encoding color_encoding, enum drm_color_range color_range) { … } int dispc_ovl_setup(struct dispc_device *dispc, enum omap_plane_id plane, const struct omap_overlay_info *oi, const struct videomode *vm, bool mem_to_mem, enum omap_channel channel) { … } int dispc_wb_setup(struct dispc_device *dispc, const struct omap_dss_writeback_info *wi, bool mem_to_mem, const struct videomode *vm, enum dss_writeback_channel channel_in) { … } bool dispc_has_writeback(struct dispc_device *dispc) { … } int dispc_ovl_enable(struct dispc_device *dispc, enum omap_plane_id plane, bool enable) { … } static void dispc_lcd_enable_signal_polarity(struct dispc_device *dispc, bool act_high) { … } void dispc_lcd_enable_signal(struct dispc_device *dispc, bool enable) { … } void dispc_pck_free_enable(struct dispc_device *dispc, bool enable) { … } static void dispc_mgr_enable_fifohandcheck(struct dispc_device *dispc, enum omap_channel channel, bool enable) { … } static void dispc_mgr_set_lcd_type_tft(struct dispc_device *dispc, enum omap_channel channel) { … } static void dispc_set_loadmode(struct dispc_device *dispc, enum omap_dss_load_mode mode) { … } static void dispc_mgr_set_default_color(struct dispc_device *dispc, enum omap_channel channel, u32 color) { … } static void dispc_mgr_set_trans_key(struct dispc_device *dispc, enum omap_channel ch, enum omap_dss_trans_key_type type, u32 trans_key) { … } static void dispc_mgr_enable_trans_key(struct dispc_device *dispc, enum omap_channel ch, bool enable) { … } static void dispc_mgr_enable_alpha_fixed_zorder(struct dispc_device *dispc, enum omap_channel ch, bool enable) { … } void dispc_mgr_setup(struct dispc_device *dispc, enum omap_channel channel, const struct omap_overlay_manager_info *info) { … } static void dispc_mgr_set_tft_data_lines(struct dispc_device *dispc, enum omap_channel channel, u8 data_lines) { … } static void dispc_mgr_set_io_pad_mode(struct dispc_device *dispc, enum dss_io_pad_mode mode) { … } static void dispc_mgr_enable_stallmode(struct dispc_device *dispc, enum omap_channel channel, bool enable) { … } void dispc_mgr_set_lcd_config(struct dispc_device *dispc, enum omap_channel channel, const struct dss_lcd_mgr_config *config) { … } static bool _dispc_mgr_size_ok(struct dispc_device *dispc, u16 width, u16 height) { … } static bool _dispc_lcd_timings_ok(struct dispc_device *dispc, int hsync_len, int hfp, int hbp, int vsw, int vfp, int vbp) { … } static bool _dispc_mgr_pclk_ok(struct dispc_device *dispc, enum omap_channel channel, unsigned long pclk) { … } int dispc_mgr_check_timings(struct dispc_device *dispc, enum omap_channel channel, const struct videomode *vm) { … } static void _dispc_mgr_set_lcd_timings(struct dispc_device *dispc, enum omap_channel channel, const struct videomode *vm) { … } static int vm_flag_to_int(enum display_flags flags, enum display_flags high, enum display_flags low) { … } /* change name to mode? */ void dispc_mgr_set_timings(struct dispc_device *dispc, enum omap_channel channel, const struct videomode *vm) { … } static void dispc_mgr_set_lcd_divisor(struct dispc_device *dispc, enum omap_channel channel, u16 lck_div, u16 pck_div) { … } static void dispc_mgr_get_lcd_divisor(struct dispc_device *dispc, enum omap_channel channel, int *lck_div, int *pck_div) { … } static unsigned long dispc_fclk_rate(struct dispc_device *dispc) { … } static unsigned long dispc_mgr_lclk_rate(struct dispc_device *dispc, enum omap_channel channel) { … } static unsigned long dispc_mgr_pclk_rate(struct dispc_device *dispc, enum omap_channel channel) { … } void dispc_set_tv_pclk(struct dispc_device *dispc, unsigned long pclk) { … } static unsigned long dispc_core_clk_rate(struct dispc_device *dispc) { … } static unsigned long dispc_plane_pclk_rate(struct dispc_device *dispc, enum omap_plane_id plane) { … } static unsigned long dispc_plane_lclk_rate(struct dispc_device *dispc, enum omap_plane_id plane) { … } static void dispc_dump_clocks_channel(struct dispc_device *dispc, struct seq_file *s, enum omap_channel channel) { … } void dispc_dump_clocks(struct dispc_device *dispc, struct seq_file *s) { … } static int dispc_dump_regs(struct seq_file *s, void *p) { … } /* calculate clock rates using dividers in cinfo */ int dispc_calc_clock_rates(struct dispc_device *dispc, unsigned long dispc_fclk_rate, struct dispc_clock_info *cinfo) { … } bool dispc_div_calc(struct dispc_device *dispc, unsigned long dispc_freq, unsigned long pck_min, unsigned long pck_max, dispc_div_calc_func func, void *data) { … } void dispc_mgr_set_clock_div(struct dispc_device *dispc, enum omap_channel channel, const struct dispc_clock_info *cinfo) { … } int dispc_mgr_get_clock_div(struct dispc_device *dispc, enum omap_channel channel, struct dispc_clock_info *cinfo) { … } u32 dispc_read_irqstatus(struct dispc_device *dispc) { … } void dispc_clear_irqstatus(struct dispc_device *dispc, u32 mask) { … } void dispc_write_irqenable(struct dispc_device *dispc, u32 mask) { … } void dispc_enable_sidle(struct dispc_device *dispc) { … } void dispc_disable_sidle(struct dispc_device *dispc) { … } u32 dispc_mgr_gamma_size(struct dispc_device *dispc, enum omap_channel channel) { … } static void dispc_mgr_write_gamma_table(struct dispc_device *dispc, enum omap_channel channel) { … } static void dispc_restore_gamma_tables(struct dispc_device *dispc) { … } static const struct drm_color_lut dispc_mgr_gamma_default_lut[] = …; void dispc_mgr_set_gamma(struct dispc_device *dispc, enum omap_channel channel, const struct drm_color_lut *lut, unsigned int length) { … } static int dispc_init_gamma_tables(struct dispc_device *dispc) { … } static void _omap_dispc_initial_config(struct dispc_device *dispc) { … } static const enum dispc_feature_id omap2_dispc_features_list[] = …; static const enum dispc_feature_id omap3_dispc_features_list[] = …; static const enum dispc_feature_id am43xx_dispc_features_list[] = …; static const enum dispc_feature_id omap4_dispc_features_list[] = …; static const enum dispc_feature_id omap5_dispc_features_list[] = …; static const struct dss_reg_field omap2_dispc_reg_fields[] = …; static const struct dss_reg_field omap3_dispc_reg_fields[] = …; static const struct dss_reg_field omap4_dispc_reg_fields[] = …; static const enum omap_overlay_caps omap2_dispc_overlay_caps[] = …; static const enum omap_overlay_caps omap3430_dispc_overlay_caps[] = …; static const enum omap_overlay_caps omap3630_dispc_overlay_caps[] = …; static const enum omap_overlay_caps omap4_dispc_overlay_caps[] = …; #define COLOR_ARRAY(arr...) … static const u32 *omap2_dispc_supported_color_modes[] = …; static const u32 *omap3_dispc_supported_color_modes[] = …; static const u32 *omap4_dispc_supported_color_modes[] = …; static const u32 omap3_dispc_supported_scaler_color_modes[] = …; static const struct dispc_features omap24xx_dispc_feats = …; static const struct dispc_features omap34xx_rev1_0_dispc_feats = …; static const struct dispc_features omap34xx_rev3_0_dispc_feats = …; static const struct dispc_features omap36xx_dispc_feats = …; static const struct dispc_features am43xx_dispc_feats = …; static const struct dispc_features omap44xx_dispc_feats = …; static const struct dispc_features omap54xx_dispc_feats = …; static irqreturn_t dispc_irq_handler(int irq, void *arg) { … } int dispc_request_irq(struct dispc_device *dispc, irq_handler_t handler, void *dev_id) { … } void dispc_free_irq(struct dispc_device *dispc, void *dev_id) { … } u32 dispc_get_memory_bandwidth_limit(struct dispc_device *dispc) { … } /* * Workaround for errata i734 in DSS dispc * - LCD1 Gamma Correction Is Not Working When GFX Pipe Is Disabled * * For gamma tables to work on LCD1 the GFX plane has to be used at * least once after DSS HW has come out of reset. The workaround * sets up a minimal LCD setup with GFX plane and waits for one * vertical sync irq before disabling the setup and continuing with * the context restore. The physical outputs are gated during the * operation. This workaround requires that gamma table's LOADMODE * is set to 0x2 in DISPC_CONTROL1 register. * * For details see: * OMAP543x Multimedia Device Silicon Revision 2.0 Silicon Errata * Literature Number: SWPZ037E * Or some other relevant errata document for the DSS IP version. */ static const struct dispc_errata_i734_data { … } i734 = …; static struct i734_buf { … } i734_buf; static int dispc_errata_i734_wa_init(struct dispc_device *dispc) { … } static void dispc_errata_i734_wa_fini(struct dispc_device *dispc) { … } static void dispc_errata_i734_wa(struct dispc_device *dispc) { … } /* DISPC HW IP initialisation */ static const struct of_device_id dispc_of_match[] = …; static const struct soc_device_attribute dispc_soc_devices[] = …; static int dispc_bind(struct device *dev, struct device *master, void *data) { … } static void dispc_unbind(struct device *dev, struct device *master, void *data) { … } static const struct component_ops dispc_component_ops = …; static int dispc_probe(struct platform_device *pdev) { … } static void dispc_remove(struct platform_device *pdev) { … } static __maybe_unused int dispc_runtime_suspend(struct device *dev) { … } static __maybe_unused int dispc_runtime_resume(struct device *dev) { … } static const struct dev_pm_ops dispc_pm_ops = …; struct platform_driver omap_dispchw_driver = …;
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