/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2009 Nokia Corporation * Author: Tomi Valkeinen <[email protected]> * * Some code and ideas taken from drivers/video/omap/ driver * by Imre Deak. */ #ifndef __OMAP2_DSS_H #define __OMAP2_DSS_H #include <linux/interrupt.h> #include "omapdss.h" struct dispc_device; struct dss_debugfs_entry; struct platform_device; struct seq_file; #define MAX_DSS_LCD_MANAGERS … #define MAX_NUM_DSI … #ifdef pr_fmt #undef pr_fmt #endif #ifdef DSS_SUBSYS_NAME #define pr_fmt … #else #define pr_fmt(fmt) … #endif #define DSSDBG(format, ...) … #ifdef DSS_SUBSYS_NAME #define DSSERR … #else #define DSSERR(format, ...) … #endif #ifdef DSS_SUBSYS_NAME #define DSSINFO … #else #define DSSINFO(format, ...) … #endif #ifdef DSS_SUBSYS_NAME #define DSSWARN … #else #define DSSWARN(format, ...) … #endif /* OMAP TRM gives bitfields as start:end, where start is the higher bit number. For example 7:0 */ #define FLD_MASK(start, end) … #define FLD_VAL(val, start, end) … #define FLD_GET(val, start, end) … #define FLD_MOD(orig, val, start, end) … enum dss_model { … }; enum dss_io_pad_mode { … }; enum dss_hdmi_venc_clk_source_select { … }; enum dss_dsi_content_type { … }; enum dss_clk_source { … }; enum dss_pll_id { … }; struct dss_pll; #define DSS_PLL_MAX_HSDIVS … enum dss_pll_type { … }; /* * Type-A PLLs: clkout[]/mX[] refer to hsdiv outputs m4, m5, m6, m7. * Type-B PLLs: clkout[0] refers to m2. */ struct dss_pll_clock_info { … }; struct dss_pll_ops { … }; struct dss_pll_hw { … }; struct dss_pll { … }; /* Defines a generic omap register field */ struct dss_reg_field { … }; struct dispc_clock_info { … }; struct dss_lcd_mgr_config { … }; #define DSS_SZ_REGS … struct dss_device { … }; /* core */ static inline int dss_set_min_bus_tput(struct device *dev, unsigned long tput) { … } static inline bool dss_mgr_is_lcd(enum omap_channel id) { … } /* DSS */ #if defined(CONFIG_OMAP2_DSS_DEBUGFS) struct dss_debugfs_entry * dss_debugfs_create_file(struct dss_device *dss, const char *name, int (*show_fn)(struct seq_file *s, void *data), void *data); void dss_debugfs_remove_file(struct dss_debugfs_entry *entry); #else static inline struct dss_debugfs_entry * dss_debugfs_create_file(struct dss_device *dss, const char *name, int (*show_fn)(struct seq_file *s, void *data), void *data) { return NULL; } static inline void dss_debugfs_remove_file(struct dss_debugfs_entry *entry) { } #endif /* CONFIG_OMAP2_DSS_DEBUGFS */ struct dss_device *dss_get_device(struct device *dev); int dss_runtime_get(struct dss_device *dss); void dss_runtime_put(struct dss_device *dss); unsigned long dss_get_dispc_clk_rate(struct dss_device *dss); unsigned long dss_get_max_fck_rate(struct dss_device *dss); int dss_dpi_select_source(struct dss_device *dss, int port, enum omap_channel channel); void dss_select_hdmi_venc_clk_source(struct dss_device *dss, enum dss_hdmi_venc_clk_source_select src); const char *dss_get_clk_source_name(enum dss_clk_source clk_src); /* DSS VIDEO PLL */ struct dss_pll *dss_video_pll_init(struct dss_device *dss, struct platform_device *pdev, int id, struct regulator *regulator); void dss_video_pll_uninit(struct dss_pll *pll); void dss_ctrl_pll_enable(struct dss_pll *pll, bool enable); void dss_sdi_init(struct dss_device *dss, int datapairs); int dss_sdi_enable(struct dss_device *dss); void dss_sdi_disable(struct dss_device *dss); void dss_select_dsi_clk_source(struct dss_device *dss, int dsi_module, enum dss_clk_source clk_src); void dss_select_lcd_clk_source(struct dss_device *dss, enum omap_channel channel, enum dss_clk_source clk_src); enum dss_clk_source dss_get_dispc_clk_source(struct dss_device *dss); enum dss_clk_source dss_get_dsi_clk_source(struct dss_device *dss, int dsi_module); enum dss_clk_source dss_get_lcd_clk_source(struct dss_device *dss, enum omap_channel channel); void dss_set_venc_output(struct dss_device *dss, enum omap_dss_venc_type type); void dss_set_dac_pwrdn_bgz(struct dss_device *dss, bool enable); int dss_set_fck_rate(struct dss_device *dss, unsigned long rate); dss_div_calc_func; bool dss_div_calc(struct dss_device *dss, unsigned long pck, unsigned long fck_min, dss_div_calc_func func, void *data); /* SDI */ #ifdef CONFIG_OMAP2_DSS_SDI int sdi_init_port(struct dss_device *dss, struct platform_device *pdev, struct device_node *port); void sdi_uninit_port(struct device_node *port); #else static inline int sdi_init_port(struct dss_device *dss, struct platform_device *pdev, struct device_node *port) { return 0; } static inline void sdi_uninit_port(struct device_node *port) { } #endif /* DSI */ #ifdef CONFIG_OMAP2_DSS_DSI void dsi_irq_handler(void); #endif /* DPI */ #ifdef CONFIG_OMAP2_DSS_DPI int dpi_init_port(struct dss_device *dss, struct platform_device *pdev, struct device_node *port, enum dss_model dss_model); void dpi_uninit_port(struct device_node *port); #else static inline int dpi_init_port(struct dss_device *dss, struct platform_device *pdev, struct device_node *port, enum dss_model dss_model) { return 0; } static inline void dpi_uninit_port(struct device_node *port) { } #endif /* DISPC */ void dispc_dump_clocks(struct dispc_device *dispc, struct seq_file *s); int dispc_runtime_get(struct dispc_device *dispc); void dispc_runtime_put(struct dispc_device *dispc); int dispc_get_num_ovls(struct dispc_device *dispc); int dispc_get_num_mgrs(struct dispc_device *dispc); const u32 *dispc_ovl_get_color_modes(struct dispc_device *dispc, enum omap_plane_id plane); void dispc_ovl_get_max_size(struct dispc_device *dispc, u16 *width, u16 *height); bool dispc_ovl_color_mode_supported(struct dispc_device *dispc, enum omap_plane_id plane, u32 fourcc); enum omap_overlay_caps dispc_ovl_get_caps(struct dispc_device *dispc, enum omap_plane_id plane); u32 dispc_read_irqstatus(struct dispc_device *dispc); void dispc_clear_irqstatus(struct dispc_device *dispc, u32 mask); void dispc_write_irqenable(struct dispc_device *dispc, u32 mask); int dispc_request_irq(struct dispc_device *dispc, irq_handler_t handler, void *dev_id); void dispc_free_irq(struct dispc_device *dispc, void *dev_id); u32 dispc_mgr_get_vsync_irq(struct dispc_device *dispc, enum omap_channel channel); u32 dispc_mgr_get_framedone_irq(struct dispc_device *dispc, enum omap_channel channel); u32 dispc_mgr_get_sync_lost_irq(struct dispc_device *dispc, enum omap_channel channel); u32 dispc_wb_get_framedone_irq(struct dispc_device *dispc); u32 dispc_get_memory_bandwidth_limit(struct dispc_device *dispc); void dispc_mgr_enable(struct dispc_device *dispc, enum omap_channel channel, bool enable); bool dispc_mgr_go_busy(struct dispc_device *dispc, enum omap_channel channel); void dispc_mgr_go(struct dispc_device *dispc, enum omap_channel channel); void dispc_mgr_set_lcd_config(struct dispc_device *dispc, enum omap_channel channel, const struct dss_lcd_mgr_config *config); void dispc_mgr_set_timings(struct dispc_device *dispc, enum omap_channel channel, const struct videomode *vm); void dispc_mgr_setup(struct dispc_device *dispc, enum omap_channel channel, const struct omap_overlay_manager_info *info); int dispc_mgr_check_timings(struct dispc_device *dispc, enum omap_channel channel, const struct videomode *vm); u32 dispc_mgr_gamma_size(struct dispc_device *dispc, enum omap_channel channel); void dispc_mgr_set_gamma(struct dispc_device *dispc, enum omap_channel channel, const struct drm_color_lut *lut, unsigned int length); int dispc_ovl_setup(struct dispc_device *dispc, enum omap_plane_id plane, const struct omap_overlay_info *oi, const struct videomode *vm, bool mem_to_mem, enum omap_channel channel); int dispc_ovl_enable(struct dispc_device *dispc, enum omap_plane_id plane, bool enable); bool dispc_has_writeback(struct dispc_device *dispc); int dispc_wb_setup(struct dispc_device *dispc, const struct omap_dss_writeback_info *wi, bool mem_to_mem, const struct videomode *vm, enum dss_writeback_channel channel_in); bool dispc_wb_go_busy(struct dispc_device *dispc); void dispc_wb_go(struct dispc_device *dispc); void dispc_enable_sidle(struct dispc_device *dispc); void dispc_disable_sidle(struct dispc_device *dispc); void dispc_lcd_enable_signal(struct dispc_device *dispc, bool enable); void dispc_pck_free_enable(struct dispc_device *dispc, bool enable); void dispc_enable_fifomerge(struct dispc_device *dispc, bool enable); dispc_div_calc_func; bool dispc_div_calc(struct dispc_device *dispc, unsigned long dispc_freq, unsigned long pck_min, unsigned long pck_max, dispc_div_calc_func func, void *data); int dispc_calc_clock_rates(struct dispc_device *dispc, unsigned long dispc_fclk_rate, struct dispc_clock_info *cinfo); void dispc_ovl_set_fifo_threshold(struct dispc_device *dispc, enum omap_plane_id plane, u32 low, u32 high); void dispc_ovl_compute_fifo_thresholds(struct dispc_device *dispc, enum omap_plane_id plane, u32 *fifo_low, u32 *fifo_high, bool use_fifomerge, bool manual_update); void dispc_mgr_set_clock_div(struct dispc_device *dispc, enum omap_channel channel, const struct dispc_clock_info *cinfo); int dispc_mgr_get_clock_div(struct dispc_device *dispc, enum omap_channel channel, struct dispc_clock_info *cinfo); void dispc_set_tv_pclk(struct dispc_device *dispc, unsigned long pclk); #ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS static inline void dss_collect_irq_stats(u32 irqstatus, unsigned int *irq_arr) { … } #endif /* PLL */ dss_pll_calc_func; dss_hsdiv_calc_func; int dss_pll_register(struct dss_device *dss, struct dss_pll *pll); void dss_pll_unregister(struct dss_pll *pll); struct dss_pll *dss_pll_find(struct dss_device *dss, const char *name); struct dss_pll *dss_pll_find_by_src(struct dss_device *dss, enum dss_clk_source src); unsigned int dss_pll_get_clkout_idx_for_src(enum dss_clk_source src); int dss_pll_enable(struct dss_pll *pll); void dss_pll_disable(struct dss_pll *pll); int dss_pll_set_config(struct dss_pll *pll, const struct dss_pll_clock_info *cinfo); bool dss_pll_hsdiv_calc_a(const struct dss_pll *pll, unsigned long clkdco, unsigned long out_min, unsigned long out_max, dss_hsdiv_calc_func func, void *data); bool dss_pll_calc_a(const struct dss_pll *pll, unsigned long clkin, unsigned long pll_min, unsigned long pll_max, dss_pll_calc_func func, void *data); bool dss_pll_calc_b(const struct dss_pll *pll, unsigned long clkin, unsigned long target_clkout, struct dss_pll_clock_info *cinfo); int dss_pll_write_config_type_a(struct dss_pll *pll, const struct dss_pll_clock_info *cinfo); int dss_pll_write_config_type_b(struct dss_pll *pll, const struct dss_pll_clock_info *cinfo); int dss_pll_wait_reset_done(struct dss_pll *pll); extern struct platform_driver omap_dsshw_driver; extern struct platform_driver omap_dispchw_driver; #ifdef CONFIG_OMAP2_DSS_DSI extern struct platform_driver omap_dsihw_driver; #endif #ifdef CONFIG_OMAP2_DSS_VENC extern struct platform_driver omap_venchw_driver; #endif #ifdef CONFIG_OMAP4_DSS_HDMI extern struct platform_driver omapdss_hdmi4hw_driver; #endif #ifdef CONFIG_OMAP5_DSS_HDMI extern struct platform_driver omapdss_hdmi5hw_driver; #endif #endif
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