linux/drivers/gpu/drm/omapdrm/dss/pll.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
 */

#define DSS_SUBSYS_NAME …

#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/regulator/consumer.h>
#include <linux/sched.h>

#include "omapdss.h"
#include "dss.h"

#define PLL_CONTROL …
#define PLL_STATUS …
#define PLL_GO …
#define PLL_CONFIGURATION1 …
#define PLL_CONFIGURATION2 …
#define PLL_CONFIGURATION3 …
#define PLL_SSC_CONFIGURATION1 …
#define PLL_SSC_CONFIGURATION2 …
#define PLL_CONFIGURATION4 …

int dss_pll_register(struct dss_device *dss, struct dss_pll *pll)
{ … }

void dss_pll_unregister(struct dss_pll *pll)
{ … }

struct dss_pll *dss_pll_find(struct dss_device *dss, const char *name)
{ … }

struct dss_pll *dss_pll_find_by_src(struct dss_device *dss,
				    enum dss_clk_source src)
{ … }

unsigned int dss_pll_get_clkout_idx_for_src(enum dss_clk_source src)
{ … }

int dss_pll_enable(struct dss_pll *pll)
{ … }

void dss_pll_disable(struct dss_pll *pll)
{ … }

int dss_pll_set_config(struct dss_pll *pll, const struct dss_pll_clock_info *cinfo)
{ … }

bool dss_pll_hsdiv_calc_a(const struct dss_pll *pll, unsigned long clkdco,
		unsigned long out_min, unsigned long out_max,
		dss_hsdiv_calc_func func, void *data)
{ … }

/*
 * clkdco = clkin / n * m * 2
 * clkoutX = clkdco / mX
 */
bool dss_pll_calc_a(const struct dss_pll *pll, unsigned long clkin,
		unsigned long pll_min, unsigned long pll_max,
		dss_pll_calc_func func, void *data)
{ … }

/*
 * This calculates a PLL config that will provide the target_clkout rate
 * for clkout. Additionally clkdco rate will be the same as clkout rate
 * when clkout rate is >= min_clkdco.
 *
 * clkdco = clkin / n * m + clkin / n * mf / 262144
 * clkout = clkdco / m2
 */
bool dss_pll_calc_b(const struct dss_pll *pll, unsigned long clkin,
	unsigned long target_clkout, struct dss_pll_clock_info *cinfo)
{ … }

static int wait_for_bit_change(void __iomem *reg, int bitnum, int value)
{ … }

int dss_pll_wait_reset_done(struct dss_pll *pll)
{ … }

static int dss_wait_hsdiv_ack(struct dss_pll *pll, u32 hsdiv_ack_mask)
{ … }

static bool pll_is_locked(u32 stat)
{ … }

int dss_pll_write_config_type_a(struct dss_pll *pll,
		const struct dss_pll_clock_info *cinfo)
{ … }

int dss_pll_write_config_type_b(struct dss_pll *pll,
		const struct dss_pll_clock_info *cinfo)
{ … }