// SPDX-License-Identifier: GPL-2.0+ /* * caam - Freescale FSL CAAM support for ahash functions of crypto API * * Copyright 2011 Freescale Semiconductor, Inc. * Copyright 2018-2019, 2023 NXP * * Based on caamalg.c crypto API driver. * * relationship of digest job descriptor or first job descriptor after init to * shared descriptors: * * --------------- --------------- * | JobDesc #1 |-------------------->| ShareDesc | * | *(packet 1) | | (hashKey) | * --------------- | (operation) | * --------------- * * relationship of subsequent job descriptors to shared descriptors: * * --------------- --------------- * | JobDesc #2 |-------------------->| ShareDesc | * | *(packet 2) | |------------->| (hashKey) | * --------------- | |-------->| (operation) | * . | | | (load ctx2) | * . | | --------------- * --------------- | | * | JobDesc #3 |------| | * | *(packet 3) | | * --------------- | * . | * . | * --------------- | * | JobDesc #4 |------------ * | *(packet 4) | * --------------- * * The SharedDesc never changes for a connection unless rekeyed, but * each packet will likely be in a different place. So all we need * to know to process the packet is where the input is, where the * output goes, and what context we want to process with. Context is * in the SharedDesc, packet references in the JobDesc. * * So, a job desc looks like: * * --------------------- * | Header | * | ShareDesc Pointer | * | SEQ_OUT_PTR | * | (output buffer) | * | (output length) | * | SEQ_IN_PTR | * | (input buffer) | * | (input length) | * --------------------- */ #include "compat.h" #include "regs.h" #include "intern.h" #include "desc_constr.h" #include "jr.h" #include "error.h" #include "sg_sw_sec4.h" #include "key_gen.h" #include "caamhash_desc.h" #include <crypto/internal/engine.h> #include <crypto/internal/hash.h> #include <linux/dma-mapping.h> #include <linux/err.h> #include <linux/kernel.h> #include <linux/slab.h> #include <linux/string.h> #define CAAM_CRA_PRIORITY … /* max hash key is max split key size */ #define CAAM_MAX_HASH_KEY_SIZE … #define CAAM_MAX_HASH_BLOCK_SIZE … #define CAAM_MAX_HASH_DIGEST_SIZE … #define DESC_HASH_MAX_USED_BYTES … #define DESC_HASH_MAX_USED_LEN … /* caam context sizes for hashes: running digest + 8 */ #define HASH_MSG_LEN … #define MAX_CTX_LEN … static struct list_head hash_list; /* ahash per-session context */ struct caam_hash_ctx { … }; /* ahash state */ struct caam_hash_state { … }; struct caam_export_state { … }; static inline bool is_cmac_aes(u32 algtype) { … } /* Common job descriptor seq in/out ptr routines */ /* Map state->caam_ctx, and append seq_out_ptr command that points to it */ static inline int map_seq_out_ptr_ctx(u32 *desc, struct device *jrdev, struct caam_hash_state *state, int ctx_len) { … } /* Map current buffer in state (if length > 0) and put it in link table */ static inline int buf_map_to_sec4_sg(struct device *jrdev, struct sec4_sg_entry *sec4_sg, struct caam_hash_state *state) { … } /* Map state->caam_ctx, and add it to link table */ static inline int ctx_map_to_sec4_sg(struct device *jrdev, struct caam_hash_state *state, int ctx_len, struct sec4_sg_entry *sec4_sg, u32 flag) { … } static int ahash_set_sh_desc(struct crypto_ahash *ahash) { … } static int axcbc_set_sh_desc(struct crypto_ahash *ahash) { … } static int acmac_set_sh_desc(struct crypto_ahash *ahash) { … } /* Digest hash size if it is too large */ static int hash_digest_key(struct caam_hash_ctx *ctx, u32 *keylen, u8 *key, u32 digestsize) { … } static int ahash_setkey(struct crypto_ahash *ahash, const u8 *key, unsigned int keylen) { … } static int axcbc_setkey(struct crypto_ahash *ahash, const u8 *key, unsigned int keylen) { … } static int acmac_setkey(struct crypto_ahash *ahash, const u8 *key, unsigned int keylen) { … } /* * ahash_edesc - s/w-extended ahash descriptor * @sec4_sg_dma: physical mapped address of h/w link table * @src_nents: number of segments in input scatterlist * @sec4_sg_bytes: length of dma mapped sec4_sg space * @bklog: stored to determine if the request needs backlog * @hw_desc: the h/w job descriptor followed by any referenced link tables * @sec4_sg: h/w link table */ struct ahash_edesc { … }; static inline void ahash_unmap(struct device *dev, struct ahash_edesc *edesc, struct ahash_request *req, int dst_len) { … } static inline void ahash_unmap_ctx(struct device *dev, struct ahash_edesc *edesc, struct ahash_request *req, int dst_len, u32 flag) { … } static inline void ahash_done_cpy(struct device *jrdev, u32 *desc, u32 err, void *context, enum dma_data_direction dir) { … } static void ahash_done(struct device *jrdev, u32 *desc, u32 err, void *context) { … } static void ahash_done_ctx_src(struct device *jrdev, u32 *desc, u32 err, void *context) { … } static inline void ahash_done_switch(struct device *jrdev, u32 *desc, u32 err, void *context, enum dma_data_direction dir) { … } static void ahash_done_bi(struct device *jrdev, u32 *desc, u32 err, void *context) { … } static void ahash_done_ctx_dst(struct device *jrdev, u32 *desc, u32 err, void *context) { … } /* * Allocate an enhanced descriptor, which contains the hardware descriptor * and space for hardware scatter table containing sg_num entries. */ static struct ahash_edesc *ahash_edesc_alloc(struct ahash_request *req, int sg_num, u32 *sh_desc, dma_addr_t sh_desc_dma) { … } static int ahash_edesc_add_src(struct caam_hash_ctx *ctx, struct ahash_edesc *edesc, struct ahash_request *req, int nents, unsigned int first_sg, unsigned int first_bytes, size_t to_hash) { … } static int ahash_do_one_req(struct crypto_engine *engine, void *areq) { … } static int ahash_enqueue_req(struct device *jrdev, void (*cbk)(struct device *jrdev, u32 *desc, u32 err, void *context), struct ahash_request *req, int dst_len, enum dma_data_direction dir) { … } /* submit update job descriptor */ static int ahash_update_ctx(struct ahash_request *req) { … } static int ahash_final_ctx(struct ahash_request *req) { … } static int ahash_finup_ctx(struct ahash_request *req) { … } static int ahash_digest(struct ahash_request *req) { … } /* submit ahash final if it the first job descriptor */ static int ahash_final_no_ctx(struct ahash_request *req) { … } /* submit ahash update if it the first job descriptor after update */ static int ahash_update_no_ctx(struct ahash_request *req) { … } /* submit ahash finup if it the first job descriptor after update */ static int ahash_finup_no_ctx(struct ahash_request *req) { … } /* submit first update job descriptor after init */ static int ahash_update_first(struct ahash_request *req) { … } static int ahash_finup_first(struct ahash_request *req) { … } static int ahash_init(struct ahash_request *req) { … } static int ahash_update(struct ahash_request *req) { … } static int ahash_finup(struct ahash_request *req) { … } static int ahash_final(struct ahash_request *req) { … } static int ahash_export(struct ahash_request *req, void *out) { … } static int ahash_import(struct ahash_request *req, const void *in) { … } struct caam_hash_template { … }; /* ahash descriptors */ static struct caam_hash_template driver_hash[] = …; struct caam_hash_alg { … }; static int caam_hash_cra_init(struct crypto_tfm *tfm) { … } static void caam_hash_cra_exit(struct crypto_tfm *tfm) { … } void caam_algapi_hash_exit(void) { … } static struct caam_hash_alg * caam_hash_alloc(struct caam_hash_template *template, bool keyed) { … } int caam_algapi_hash_init(struct device *ctrldev) { … }
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