# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/renesas,rcar-canfd.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas R-Car CAN FD Controller
maintainers:
- Fabrizio Castro <[email protected]>
properties:
compatible:
oneOf:
- items:
- enum:
- renesas,r8a774a1-canfd # RZ/G2M
- renesas,r8a774b1-canfd # RZ/G2N
- renesas,r8a774c0-canfd # RZ/G2E
- renesas,r8a774e1-canfd # RZ/G2H
- renesas,r8a7795-canfd # R-Car H3
- renesas,r8a7796-canfd # R-Car M3-W
- renesas,r8a77961-canfd # R-Car M3-W+
- renesas,r8a77965-canfd # R-Car M3-N
- renesas,r8a77970-canfd # R-Car V3M
- renesas,r8a77980-canfd # R-Car V3H
- renesas,r8a77990-canfd # R-Car E3
- renesas,r8a77995-canfd # R-Car D3
- const: renesas,rcar-gen3-canfd # R-Car Gen3 and RZ/G2
- items:
- enum:
- renesas,r8a779a0-canfd # R-Car V3U
- renesas,r8a779g0-canfd # R-Car V4H
- const: renesas,rcar-gen4-canfd # R-Car Gen4
- items:
- enum:
- renesas,r9a07g043-canfd # RZ/G2UL and RZ/Five
- renesas,r9a07g044-canfd # RZ/G2{L,LC}
- renesas,r9a07g054-canfd # RZ/V2L
- const: renesas,rzg2l-canfd # RZ/G2L family
reg:
maxItems: 1
interrupts: true
clocks:
maxItems: 3
clock-names:
items:
- const: fck
- const: canfd
- const: can_clk
power-domains:
maxItems: 1
resets: true
renesas,no-can-fd:
$ref: /schemas/types.yaml#/definitions/flag
description:
The controller can operate in either CAN FD only mode (default) or
Classical CAN only mode. The mode is global to all channels.
Specify this property to put the controller in Classical CAN only mode.
assigned-clocks:
description:
Reference to the CANFD clock. The CANFD clock is a div6 clock and can be
used by both CAN (if present) and CAN FD controllers at the same time.
It needs to be scaled to maximum frequency if any of these controllers
use it.
assigned-clock-rates:
description: Maximum frequency of the CANFD clock.
patternProperties:
"^channel[0-7]$":
type: object
description:
The controller supports multiple channels and each is represented as a
child node. Each channel can be enabled/disabled individually.
properties:
phys:
maxItems: 1
additionalProperties: false
required:
- compatible
- reg
- interrupts
- interrupt-names
- clocks
- clock-names
- power-domains
- resets
- assigned-clocks
- assigned-clock-rates
- channel0
- channel1
allOf:
- $ref: can-controller.yaml#
- if:
properties:
compatible:
contains:
enum:
- renesas,rzg2l-canfd
then:
properties:
interrupts:
items:
- description: CAN global error interrupt
- description: CAN receive FIFO interrupt
- description: CAN0 error interrupt
- description: CAN0 transmit interrupt
- description: CAN0 transmit/receive FIFO receive completion interrupt
- description: CAN1 error interrupt
- description: CAN1 transmit interrupt
- description: CAN1 transmit/receive FIFO receive completion interrupt
interrupt-names:
items:
- const: g_err
- const: g_recc
- const: ch0_err
- const: ch0_rec
- const: ch0_trx
- const: ch1_err
- const: ch1_rec
- const: ch1_trx
resets:
maxItems: 2
reset-names:
items:
- const: rstp_n
- const: rstc_n
required:
- reset-names
else:
properties:
interrupts:
items:
- description: Channel interrupt
- description: Global interrupt
interrupt-names:
items:
- const: ch_int
- const: g_int
resets:
maxItems: 1
- if:
not:
properties:
compatible:
contains:
const: renesas,rcar-gen4-canfd
then:
patternProperties:
"^channel[2-7]$": false
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/r8a7795-sysc.h>
canfd: can@e66c0000 {
compatible = "renesas,r8a7795-canfd",
"renesas,rcar-gen3-canfd";
reg = <0xe66c0000 0x8000>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch_int", "g_int";
clocks = <&cpg CPG_MOD 914>,
<&cpg CPG_CORE R8A7795_CLK_CANFD>,
<&can_clk>;
clock-names = "fck", "canfd", "can_clk";
assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
assigned-clock-rates = <40000000>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
resets = <&cpg 914>;
channel0 {
};
channel1 {
};
};
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