# SPDX-License-Identifier: GPL-2.0-only
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/samsung/samsung,exynos-hdmi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Samsung Exynos SoC HDMI
maintainers:
- Inki Dae <[email protected]>
- Seung-Woo Kim <[email protected]>
- Kyungmin Park <[email protected]>
- Krzysztof Kozlowski <[email protected]>
properties:
compatible:
enum:
- samsung,exynos4210-hdmi
- samsung,exynos4212-hdmi
- samsung,exynos5420-hdmi
- samsung,exynos5433-hdmi
clocks:
minItems: 5
maxItems: 10
clock-names:
minItems: 5
maxItems: 10
ddc:
$ref: /schemas/types.yaml#/definitions/phandle
description:
Phandle to the HDMI DDC node.
hdmi-en-supply:
description:
Provides voltage source for DCC lines available on HDMI connector. When
there is no power provided for DDC epprom, some TV-sets do not pulls up
HPD (hot plug detect) line, what causes HDMI block to stay turned off.
When provided, the regulator allows TV-set correctly signal HPD event.
hpd-gpios:
maxItems: 1
description:
A GPIO line connected to HPD
interrupts:
maxItems: 1
phy:
$ref: /schemas/types.yaml#/definitions/phandle
description: Phandle to the HDMI PHY node.
ports:
$ref: /schemas/graph.yaml#/properties/ports
description:
Contains a port which is connected to mic node.
power-domains:
maxItems: 1
reg:
maxItems: 1
samsung,syscon-phandle:
$ref: /schemas/types.yaml#/definitions/phandle
description:
Phandle to the PMU system controller node.
samsung,sysreg-phandle:
$ref: /schemas/types.yaml#/definitions/phandle
description:
Phandle to DISP system controller interface.
'#sound-dai-cells':
const: 0
vdd-supply:
description:
VDD 1.0V HDMI TX.
vdd_osc-supply:
description:
VDD 1.8V HDMI OSC.
vdd_pll-supply:
description:
VDD 1.0V HDMI PLL.
required:
- compatible
- clocks
- clock-names
- ddc
- hpd-gpios
- interrupts
- phy
- reg
- samsung,syscon-phandle
- '#sound-dai-cells'
- vdd-supply
- vdd_osc-supply
- vdd_pll-supply
allOf:
- if:
properties:
compatible:
contains:
const: samsung,exynos5433-hdmi
then:
properties:
clocks:
items:
- description: Gate of HDMI IP APB bus.
- description: Gate of HDMI-PHY IP APB bus.
- description: Gate of HDMI TMDS clock.
- description: Gate of HDMI pixel clock.
- description: TMDS clock generated by HDMI-PHY.
- description: MUX used to switch between oscclk and tmds_clko,
respectively if HDMI-PHY is off and operational.
- description: Pixel clock generated by HDMI-PHY.
- description: MUX used to switch between oscclk and pixel_clko,
respectively if HDMI-PHY is off and operational.
- description: Oscillator clock, used as parent of following *_user
clocks in case HDMI-PHY is not operational.
- description: Gate of HDMI SPDIF clock.
clock-names:
items:
- const: hdmi_pclk
- const: hdmi_i_pclk
- const: i_tmds_clk
- const: i_pixel_clk
- const: tmds_clko
- const: tmds_clko_user
- const: pixel_clko
- const: pixel_clko_user
- const: oscclk
- const: i_spdif_clk
required:
- samsung,sysreg-phandle
else:
properties:
clocks:
items:
- description: Gate of HDMI IP bus clock.
- description: Gate of HDMI special clock.
- description: Pixel special clock, one of the two possible inputs
of HDMI clock mux.
- description: HDMI PHY clock output, one of two possible inputs of
HDMI clock mux.
- description: It is required by the driver to switch between the 2
parents i.e. sclk_pixel and sclk_hdmiphy. If hdmiphy is stable
after configuration, parent is set to sclk_hdmiphy else
sclk_pixel.
clock-names:
items:
- const: hdmi
- const: sclk_hdmi
- const: sclk_pixel
- const: sclk_hdmiphy
- const: mout_hdmi
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/exynos5433.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
hdmi@13970000 {
compatible = "samsung,exynos5433-hdmi";
reg = <0x13970000 0x70000>;
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu_disp CLK_PCLK_HDMI>,
<&cmu_disp CLK_PCLK_HDMIPHY>,
<&cmu_disp CLK_PHYCLK_HDMIPHY_TMDS_CLKO>,
<&cmu_disp CLK_PHYCLK_HDMI_PIXEL>,
<&cmu_disp CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY>,
<&cmu_disp CLK_MOUT_PHYCLK_HDMIPHY_TMDS_CLKO_USER>,
<&cmu_disp CLK_PHYCLK_HDMIPHY_PIXEL_CLKO_PHY>,
<&cmu_disp CLK_MOUT_PHYCLK_HDMIPHY_PIXEL_CLKO_USER>,
<&xxti>,
<&cmu_disp CLK_SCLK_HDMI_SPDIF>;
clock-names = "hdmi_pclk",
"hdmi_i_pclk",
"i_tmds_clk",
"i_pixel_clk",
"tmds_clko",
"tmds_clko_user",
"pixel_clko",
"pixel_clko_user",
"oscclk",
"i_spdif_clk";
phy = <&hdmiphy>;
ddc = <&hsi2c_11>;
samsung,syscon-phandle = <&pmu_system_controller>;
samsung,sysreg-phandle = <&syscon_disp>;
#sound-dai-cells = <0>;
hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>;
vdd-supply = <&ldo6_reg>;
vdd_osc-supply = <&ldo7_reg>;
vdd_pll-supply = <&ldo6_reg>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
hdmi_to_tv: endpoint {
remote-endpoint = <&tv_to_hdmi>;
};
};
port@1 {
reg = <1>;
hdmi_to_mhl: endpoint {
remote-endpoint = <&mhl_to_hdmi>;
};
};
};
};
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