/* SPDX-License-Identifier: GPL-2.0 */ #ifndef _ASM_X86_CPUFEATURES_H #define _ASM_X86_CPUFEATURES_H #ifndef _ASM_X86_REQUIRED_FEATURES_H #include <asm/required-features.h> #endif #ifndef _ASM_X86_DISABLED_FEATURES_H #include <asm/disabled-features.h> #endif /* * Defines x86 CPU feature bits */ #define NCAPINTS … #define NBUGINTS … /* * Note: If the comment begins with a quoted string, that string is used * in /proc/cpuinfo instead of the macro name. Otherwise, this feature * bit is not displayed in /proc/cpuinfo at all. * * When adding new features here that depend on other features, * please update the table in kernel/cpu/cpuid-deps.c as well. */ /* Intel-defined CPU features, CPUID level 0x00000001 (EDX), word 0 */ #define X86_FEATURE_FPU … #define X86_FEATURE_VME … #define X86_FEATURE_DE … #define X86_FEATURE_PSE … #define X86_FEATURE_TSC … #define X86_FEATURE_MSR … #define X86_FEATURE_PAE … #define X86_FEATURE_MCE … #define X86_FEATURE_CX8 … #define X86_FEATURE_APIC … #define X86_FEATURE_SEP … #define X86_FEATURE_MTRR … #define X86_FEATURE_PGE … #define X86_FEATURE_MCA … #define X86_FEATURE_CMOV … #define X86_FEATURE_PAT … #define X86_FEATURE_PSE36 … #define X86_FEATURE_PN … #define X86_FEATURE_CLFLUSH … #define X86_FEATURE_DS … #define X86_FEATURE_ACPI … #define X86_FEATURE_MMX … #define X86_FEATURE_FXSR … #define X86_FEATURE_XMM … #define X86_FEATURE_XMM2 … #define X86_FEATURE_SELFSNOOP … #define X86_FEATURE_HT … #define X86_FEATURE_ACC … #define X86_FEATURE_IA64 … #define X86_FEATURE_PBE … /* AMD-defined CPU features, CPUID level 0x80000001, word 1 */ /* Don't duplicate feature flags which are redundant with Intel! */ #define X86_FEATURE_SYSCALL … #define X86_FEATURE_MP … #define X86_FEATURE_NX … #define X86_FEATURE_MMXEXT … #define X86_FEATURE_FXSR_OPT … #define X86_FEATURE_GBPAGES … #define X86_FEATURE_RDTSCP … #define X86_FEATURE_LM … #define X86_FEATURE_3DNOWEXT … #define X86_FEATURE_3DNOW … /* Transmeta-defined CPU features, CPUID level 0x80860001, word 2 */ #define X86_FEATURE_RECOVERY … #define X86_FEATURE_LONGRUN … #define X86_FEATURE_LRTI … /* Other features, Linux-defined mapping, word 3 */ /* This range is used for feature bits which conflict or are synthesized */ #define X86_FEATURE_CXMMX … #define X86_FEATURE_K6_MTRR … #define X86_FEATURE_CYRIX_ARR … #define X86_FEATURE_CENTAUR_MCR … #define X86_FEATURE_K8 … #define X86_FEATURE_ZEN5 … #define X86_FEATURE_P3 … #define X86_FEATURE_P4 … #define X86_FEATURE_CONSTANT_TSC … #define X86_FEATURE_UP … #define X86_FEATURE_ART … #define X86_FEATURE_ARCH_PERFMON … #define X86_FEATURE_PEBS … #define X86_FEATURE_BTS … #define X86_FEATURE_SYSCALL32 … #define X86_FEATURE_SYSENTER32 … #define X86_FEATURE_REP_GOOD … #define X86_FEATURE_AMD_LBR_V2 … #define X86_FEATURE_CLEAR_CPU_BUF … #define X86_FEATURE_ACC_POWER … #define X86_FEATURE_NOPL … #define X86_FEATURE_ALWAYS … #define X86_FEATURE_XTOPOLOGY … #define X86_FEATURE_TSC_RELIABLE … #define X86_FEATURE_NONSTOP_TSC … #define X86_FEATURE_CPUID … #define X86_FEATURE_EXTD_APICID … #define X86_FEATURE_AMD_DCM … #define X86_FEATURE_APERFMPERF … #define X86_FEATURE_RAPL … #define X86_FEATURE_NONSTOP_TSC_S3 … #define X86_FEATURE_TSC_KNOWN_FREQ … /* Intel-defined CPU features, CPUID level 0x00000001 (ECX), word 4 */ #define X86_FEATURE_XMM3 … #define X86_FEATURE_PCLMULQDQ … #define X86_FEATURE_DTES64 … #define X86_FEATURE_MWAIT … #define X86_FEATURE_DSCPL … #define X86_FEATURE_VMX … #define X86_FEATURE_SMX … #define X86_FEATURE_EST … #define X86_FEATURE_TM2 … #define X86_FEATURE_SSSE3 … #define X86_FEATURE_CID … #define X86_FEATURE_SDBG … #define X86_FEATURE_FMA … #define X86_FEATURE_CX16 … #define X86_FEATURE_XTPR … #define X86_FEATURE_PDCM … #define X86_FEATURE_PCID … #define X86_FEATURE_DCA … #define X86_FEATURE_XMM4_1 … #define X86_FEATURE_XMM4_2 … #define X86_FEATURE_X2APIC … #define X86_FEATURE_MOVBE … #define X86_FEATURE_POPCNT … #define X86_FEATURE_TSC_DEADLINE_TIMER … #define X86_FEATURE_AES … #define X86_FEATURE_XSAVE … #define X86_FEATURE_OSXSAVE … #define X86_FEATURE_AVX … #define X86_FEATURE_F16C … #define X86_FEATURE_RDRAND … #define X86_FEATURE_HYPERVISOR … /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */ #define X86_FEATURE_XSTORE … #define X86_FEATURE_XSTORE_EN … #define X86_FEATURE_XCRYPT … #define X86_FEATURE_XCRYPT_EN … #define X86_FEATURE_ACE2 … #define X86_FEATURE_ACE2_EN … #define X86_FEATURE_PHE … #define X86_FEATURE_PHE_EN … #define X86_FEATURE_PMM … #define X86_FEATURE_PMM_EN … /* More extended AMD flags: CPUID level 0x80000001, ECX, word 6 */ #define X86_FEATURE_LAHF_LM … #define X86_FEATURE_CMP_LEGACY … #define X86_FEATURE_SVM … #define X86_FEATURE_EXTAPIC … #define X86_FEATURE_CR8_LEGACY … #define X86_FEATURE_ABM … #define X86_FEATURE_SSE4A … #define X86_FEATURE_MISALIGNSSE … #define X86_FEATURE_3DNOWPREFETCH … #define X86_FEATURE_OSVW … #define X86_FEATURE_IBS … #define X86_FEATURE_XOP … #define X86_FEATURE_SKINIT … #define X86_FEATURE_WDT … #define X86_FEATURE_LWP … #define X86_FEATURE_FMA4 … #define X86_FEATURE_TCE … #define X86_FEATURE_NODEID_MSR … #define X86_FEATURE_TBM … #define X86_FEATURE_TOPOEXT … #define X86_FEATURE_PERFCTR_CORE … #define X86_FEATURE_PERFCTR_NB … #define X86_FEATURE_BPEXT … #define X86_FEATURE_PTSC … #define X86_FEATURE_PERFCTR_LLC … #define X86_FEATURE_MWAITX … /* * Auxiliary flags: Linux defined - For features scattered in various * CPUID levels like 0x6, 0xA etc, word 7. * * Reuse free bits when adding new feature flags! */ #define X86_FEATURE_RING3MWAIT … #define X86_FEATURE_CPUID_FAULT … #define X86_FEATURE_CPB … #define X86_FEATURE_EPB … #define X86_FEATURE_CAT_L3 … #define X86_FEATURE_CAT_L2 … #define X86_FEATURE_CDP_L3 … #define X86_FEATURE_TDX_HOST_PLATFORM … #define X86_FEATURE_HW_PSTATE … #define X86_FEATURE_PROC_FEEDBACK … #define X86_FEATURE_XCOMPACTED … #define X86_FEATURE_PTI … #define X86_FEATURE_KERNEL_IBRS … #define X86_FEATURE_RSB_VMEXIT … #define X86_FEATURE_INTEL_PPIN … #define X86_FEATURE_CDP_L2 … #define X86_FEATURE_MSR_SPEC_CTRL … #define X86_FEATURE_SSBD … #define X86_FEATURE_MBA … #define X86_FEATURE_RSB_CTXSW … #define X86_FEATURE_PERFMON_V2 … #define X86_FEATURE_USE_IBPB … #define X86_FEATURE_USE_IBRS_FW … #define X86_FEATURE_SPEC_STORE_BYPASS_DISABLE … #define X86_FEATURE_LS_CFG_SSBD … #define X86_FEATURE_IBRS … #define X86_FEATURE_IBPB … #define X86_FEATURE_STIBP … #define X86_FEATURE_ZEN … #define X86_FEATURE_L1TF_PTEINV … #define X86_FEATURE_IBRS_ENHANCED … #define X86_FEATURE_MSR_IA32_FEAT_CTL … /* Virtualization flags: Linux defined, word 8 */ #define X86_FEATURE_TPR_SHADOW … #define X86_FEATURE_FLEXPRIORITY … #define X86_FEATURE_EPT … #define X86_FEATURE_VPID … #define X86_FEATURE_VMMCALL … #define X86_FEATURE_XENPV … #define X86_FEATURE_EPT_AD … #define X86_FEATURE_VMCALL … #define X86_FEATURE_VMW_VMMCALL … #define X86_FEATURE_PVUNLOCK … #define X86_FEATURE_VCPUPREEMPT … #define X86_FEATURE_TDX_GUEST … /* Intel-defined CPU features, CPUID level 0x00000007:0 (EBX), word 9 */ #define X86_FEATURE_FSGSBASE … #define X86_FEATURE_TSC_ADJUST … #define X86_FEATURE_SGX … #define X86_FEATURE_BMI1 … #define X86_FEATURE_HLE … #define X86_FEATURE_AVX2 … #define X86_FEATURE_FDP_EXCPTN_ONLY … #define X86_FEATURE_SMEP … #define X86_FEATURE_BMI2 … #define X86_FEATURE_ERMS … #define X86_FEATURE_INVPCID … #define X86_FEATURE_RTM … #define X86_FEATURE_CQM … #define X86_FEATURE_ZERO_FCS_FDS … #define X86_FEATURE_MPX … #define X86_FEATURE_RDT_A … #define X86_FEATURE_AVX512F … #define X86_FEATURE_AVX512DQ … #define X86_FEATURE_RDSEED … #define X86_FEATURE_ADX … #define X86_FEATURE_SMAP … #define X86_FEATURE_AVX512IFMA … #define X86_FEATURE_CLFLUSHOPT … #define X86_FEATURE_CLWB … #define X86_FEATURE_INTEL_PT … #define X86_FEATURE_AVX512PF … #define X86_FEATURE_AVX512ER … #define X86_FEATURE_AVX512CD … #define X86_FEATURE_SHA_NI … #define X86_FEATURE_AVX512BW … #define X86_FEATURE_AVX512VL … /* Extended state features, CPUID level 0x0000000d:1 (EAX), word 10 */ #define X86_FEATURE_XSAVEOPT … #define X86_FEATURE_XSAVEC … #define X86_FEATURE_XGETBV1 … #define X86_FEATURE_XSAVES … #define X86_FEATURE_XFD … /* * Extended auxiliary flags: Linux defined - for features scattered in various * CPUID levels like 0xf, etc. * * Reuse free bits when adding new feature flags! */ #define X86_FEATURE_CQM_LLC … #define X86_FEATURE_CQM_OCCUP_LLC … #define X86_FEATURE_CQM_MBM_TOTAL … #define X86_FEATURE_CQM_MBM_LOCAL … #define X86_FEATURE_FENCE_SWAPGS_USER … #define X86_FEATURE_FENCE_SWAPGS_KERNEL … #define X86_FEATURE_SPLIT_LOCK_DETECT … #define X86_FEATURE_PER_THREAD_MBA … #define X86_FEATURE_SGX1 … #define X86_FEATURE_SGX2 … #define X86_FEATURE_ENTRY_IBPB … #define X86_FEATURE_RRSBA_CTRL … #define X86_FEATURE_RETPOLINE … #define X86_FEATURE_RETPOLINE_LFENCE … #define X86_FEATURE_RETHUNK … #define X86_FEATURE_UNRET … #define X86_FEATURE_USE_IBPB_FW … #define X86_FEATURE_RSB_VMEXIT_LITE … #define X86_FEATURE_SGX_EDECCSSA … #define X86_FEATURE_CALL_DEPTH … #define X86_FEATURE_MSR_TSX_CTRL … #define X86_FEATURE_SMBA … #define X86_FEATURE_BMEC … #define X86_FEATURE_USER_SHSTK … #define X86_FEATURE_SRSO … #define X86_FEATURE_SRSO_ALIAS … #define X86_FEATURE_IBPB_ON_VMEXIT … #define X86_FEATURE_APIC_MSRS_FENCE … #define X86_FEATURE_ZEN2 … #define X86_FEATURE_ZEN3 … #define X86_FEATURE_ZEN4 … #define X86_FEATURE_ZEN1 … /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */ #define X86_FEATURE_AVX_VNNI … #define X86_FEATURE_AVX512_BF16 … #define X86_FEATURE_CMPCCXADD … #define X86_FEATURE_ARCH_PERFMON_EXT … #define X86_FEATURE_FZRM … #define X86_FEATURE_FSRS … #define X86_FEATURE_FSRC … #define X86_FEATURE_FRED … #define X86_FEATURE_LKGS … #define X86_FEATURE_WRMSRNS … #define X86_FEATURE_AMX_FP16 … #define X86_FEATURE_AVX_IFMA … #define X86_FEATURE_LAM … /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */ #define X86_FEATURE_CLZERO … #define X86_FEATURE_IRPERF … #define X86_FEATURE_XSAVEERPTR … #define X86_FEATURE_RDPRU … #define X86_FEATURE_WBNOINVD … #define X86_FEATURE_AMD_IBPB … #define X86_FEATURE_AMD_IBRS … #define X86_FEATURE_AMD_STIBP … #define X86_FEATURE_AMD_STIBP_ALWAYS_ON … #define X86_FEATURE_AMD_PPIN … #define X86_FEATURE_AMD_SSBD … #define X86_FEATURE_VIRT_SSBD … #define X86_FEATURE_AMD_SSB_NO … #define X86_FEATURE_CPPC … #define X86_FEATURE_AMD_PSFD … #define X86_FEATURE_BTC_NO … #define X86_FEATURE_BRS … /* Thermal and Power Management Leaf, CPUID level 0x00000006 (EAX), word 14 */ #define X86_FEATURE_DTHERM … #define X86_FEATURE_IDA … #define X86_FEATURE_ARAT … #define X86_FEATURE_PLN … #define X86_FEATURE_PTS … #define X86_FEATURE_HWP … #define X86_FEATURE_HWP_NOTIFY … #define X86_FEATURE_HWP_ACT_WINDOW … #define X86_FEATURE_HWP_EPP … #define X86_FEATURE_HWP_PKG_REQ … #define X86_FEATURE_HWP_HIGHEST_PERF_CHANGE … #define X86_FEATURE_HFI … /* AMD SVM Feature Identification, CPUID level 0x8000000a (EDX), word 15 */ #define X86_FEATURE_NPT … #define X86_FEATURE_LBRV … #define X86_FEATURE_SVML … #define X86_FEATURE_NRIPS … #define X86_FEATURE_TSCRATEMSR … #define X86_FEATURE_VMCBCLEAN … #define X86_FEATURE_FLUSHBYASID … #define X86_FEATURE_DECODEASSISTS … #define X86_FEATURE_PAUSEFILTER … #define X86_FEATURE_PFTHRESHOLD … #define X86_FEATURE_AVIC … #define X86_FEATURE_V_VMSAVE_VMLOAD … #define X86_FEATURE_VGIF … #define X86_FEATURE_X2AVIC … #define X86_FEATURE_V_SPEC_CTRL … #define X86_FEATURE_VNMI … #define X86_FEATURE_SVME_ADDR_CHK … /* Intel-defined CPU features, CPUID level 0x00000007:0 (ECX), word 16 */ #define X86_FEATURE_AVX512VBMI … #define X86_FEATURE_UMIP … #define X86_FEATURE_PKU … #define X86_FEATURE_OSPKE … #define X86_FEATURE_WAITPKG … #define X86_FEATURE_AVX512_VBMI2 … #define X86_FEATURE_SHSTK … #define X86_FEATURE_GFNI … #define X86_FEATURE_VAES … #define X86_FEATURE_VPCLMULQDQ … #define X86_FEATURE_AVX512_VNNI … #define X86_FEATURE_AVX512_BITALG … #define X86_FEATURE_TME … #define X86_FEATURE_AVX512_VPOPCNTDQ … #define X86_FEATURE_LA57 … #define X86_FEATURE_RDPID … #define X86_FEATURE_BUS_LOCK_DETECT … #define X86_FEATURE_CLDEMOTE … #define X86_FEATURE_MOVDIRI … #define X86_FEATURE_MOVDIR64B … #define X86_FEATURE_ENQCMD … #define X86_FEATURE_SGX_LC … /* AMD-defined CPU features, CPUID level 0x80000007 (EBX), word 17 */ #define X86_FEATURE_OVERFLOW_RECOV … #define X86_FEATURE_SUCCOR … #define X86_FEATURE_SMCA … /* Intel-defined CPU features, CPUID level 0x00000007:0 (EDX), word 18 */ #define X86_FEATURE_AVX512_4VNNIW … #define X86_FEATURE_AVX512_4FMAPS … #define X86_FEATURE_FSRM … #define X86_FEATURE_AVX512_VP2INTERSECT … #define X86_FEATURE_SRBDS_CTRL … #define X86_FEATURE_MD_CLEAR … #define X86_FEATURE_RTM_ALWAYS_ABORT … #define X86_FEATURE_TSX_FORCE_ABORT … #define X86_FEATURE_SERIALIZE … #define X86_FEATURE_HYBRID_CPU … #define X86_FEATURE_TSXLDTRK … #define X86_FEATURE_PCONFIG … #define X86_FEATURE_ARCH_LBR … #define X86_FEATURE_IBT … #define X86_FEATURE_AMX_BF16 … #define X86_FEATURE_AVX512_FP16 … #define X86_FEATURE_AMX_TILE … #define X86_FEATURE_AMX_INT8 … #define X86_FEATURE_SPEC_CTRL … #define X86_FEATURE_INTEL_STIBP … #define X86_FEATURE_FLUSH_L1D … #define X86_FEATURE_ARCH_CAPABILITIES … #define X86_FEATURE_CORE_CAPABILITIES … #define X86_FEATURE_SPEC_CTRL_SSBD … /* AMD-defined memory encryption features, CPUID level 0x8000001f (EAX), word 19 */ #define X86_FEATURE_SME … #define X86_FEATURE_SEV … #define X86_FEATURE_VM_PAGE_FLUSH … #define X86_FEATURE_SEV_ES … #define X86_FEATURE_SEV_SNP … #define X86_FEATURE_V_TSC_AUX … #define X86_FEATURE_SME_COHERENT … #define X86_FEATURE_DEBUG_SWAP … #define X86_FEATURE_SVSM … /* AMD-defined Extended Feature 2 EAX, CPUID level 0x80000021 (EAX), word 20 */ #define X86_FEATURE_NO_NESTED_DATA_BP … #define X86_FEATURE_WRMSR_XX_BASE_NS … #define X86_FEATURE_LFENCE_RDTSC … #define X86_FEATURE_NULL_SEL_CLR_BASE … #define X86_FEATURE_AUTOIBRS … #define X86_FEATURE_NO_SMM_CTL_MSR … #define X86_FEATURE_SBPB … #define X86_FEATURE_IBPB_BRTYPE … #define X86_FEATURE_SRSO_NO … /* * Extended auxiliary flags: Linux defined - for features scattered in various * CPUID levels like 0x80000022, etc and Linux defined features. * * Reuse free bits when adding new feature flags! */ #define X86_FEATURE_AMD_LBR_PMC_FREEZE … #define X86_FEATURE_CLEAR_BHB_LOOP … #define X86_FEATURE_BHI_CTRL … #define X86_FEATURE_CLEAR_BHB_HW … #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT … #define X86_FEATURE_FAST_CPPC … /* * BUG word(s) */ #define X86_BUG(x) … #define X86_BUG_F00F … #define X86_BUG_FDIV … #define X86_BUG_COMA … #define X86_BUG_AMD_TLB_MMATCH … #define X86_BUG_AMD_APIC_C1E … #define X86_BUG_11AP … #define X86_BUG_FXSAVE_LEAK … #define X86_BUG_CLFLUSH_MONITOR … #define X86_BUG_SYSRET_SS_ATTRS … #ifdef CONFIG_X86_32 /* * 64-bit kernels don't use X86_BUG_ESPFIX. Make the define conditional * to avoid confusion. */ #define X86_BUG_ESPFIX … #endif #define X86_BUG_NULL_SEG … #define X86_BUG_SWAPGS_FENCE … #define X86_BUG_MONITOR … #define X86_BUG_AMD_E400 … #define X86_BUG_CPU_MELTDOWN … #define X86_BUG_SPECTRE_V1 … #define X86_BUG_SPECTRE_V2 … #define X86_BUG_SPEC_STORE_BYPASS … #define X86_BUG_L1TF … #define X86_BUG_MDS … #define X86_BUG_MSBDS_ONLY … #define X86_BUG_SWAPGS … #define X86_BUG_TAA … #define X86_BUG_ITLB_MULTIHIT … #define X86_BUG_SRBDS … #define X86_BUG_MMIO_STALE_DATA … #define X86_BUG_MMIO_UNKNOWN … #define X86_BUG_RETBLEED … #define X86_BUG_EIBRS_PBRSB … #define X86_BUG_SMT_RSB … #define X86_BUG_GDS … #define X86_BUG_TDX_PW_MCE … /* BUG word 2 */ #define X86_BUG_SRSO … #define X86_BUG_DIV0 … #define X86_BUG_RFDS … #define X86_BUG_BHI … #endif /* _ASM_X86_CPUFEATURES_H */
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