// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause /* * Copyright (C) 2005-2014, 2018-2019, 2021, 2024 Intel Corporation */ #include <linux/types.h> #include <linux/slab.h> #include <linux/export.h> #include "iwl-drv.h" #include "iwl-debug.h" #include "iwl-io.h" #include "iwl-prph.h" #include "iwl-csr.h" #include "agn.h" /* EEPROM offset definitions */ /* indirect access definitions */ #define ADDRESS_MSK … #define INDIRECT_TYPE_MSK … #define INDIRECT_HOST … #define INDIRECT_GENERAL … #define INDIRECT_REGULATORY … #define INDIRECT_CALIBRATION … #define INDIRECT_PROCESS_ADJST … #define INDIRECT_OTHERS … #define INDIRECT_TXP_LIMIT … #define INDIRECT_TXP_LIMIT_SIZE … #define INDIRECT_ADDRESS … /* corresponding link offsets in EEPROM */ #define EEPROM_LINK_HOST … #define EEPROM_LINK_GENERAL … #define EEPROM_LINK_REGULATORY … #define EEPROM_LINK_CALIBRATION … #define EEPROM_LINK_PROCESS_ADJST … #define EEPROM_LINK_OTHERS … #define EEPROM_LINK_TXP_LIMIT … #define EEPROM_LINK_TXP_LIMIT_SIZE … /* General */ #define EEPROM_DEVICE_ID … #define EEPROM_SUBSYSTEM_ID … #define EEPROM_MAC_ADDRESS … #define EEPROM_BOARD_REVISION … #define EEPROM_BOARD_PBA_NUMBER … #define EEPROM_VERSION … #define EEPROM_SKU_CAP … #define EEPROM_OEM_MODE … #define EEPROM_RADIO_CONFIG … #define EEPROM_NUM_MAC_ADDRESS … /* calibration */ struct iwl_eeprom_calib_hdr { … } __packed; #define EEPROM_CALIB_ALL … #define EEPROM_XTAL … /* temperature */ #define EEPROM_KELVIN_TEMPERATURE … #define EEPROM_RAW_TEMPERATURE … /* SKU Capabilities (actual values from EEPROM definition) */ enum eeprom_sku_bits { … }; /* radio config bits (actual values from EEPROM definition) */ #define EEPROM_RF_CFG_TYPE_MSK(x) … #define EEPROM_RF_CFG_STEP_MSK(x) … #define EEPROM_RF_CFG_DASH_MSK(x) … #define EEPROM_RF_CFG_PNUM_MSK(x) … #define EEPROM_RF_CFG_TX_ANT_MSK(x) … #define EEPROM_RF_CFG_RX_ANT_MSK(x) … /* * EEPROM bands * These are the channel numbers from each band in the order * that they are stored in the EEPROM band information. Note * that EEPROM bands aren't the same as mac80211 bands, and * there are even special "ht40 bands" in the EEPROM. */ static const u8 iwl_eeprom_band_1[14] = …; static const u8 iwl_eeprom_band_2[] = …; static const u8 iwl_eeprom_band_3[] = …; static const u8 iwl_eeprom_band_4[] = …; static const u8 iwl_eeprom_band_5[] = …; static const u8 iwl_eeprom_band_6[] = …; static const u8 iwl_eeprom_band_7[] = …; #define IWL_NUM_CHANNELS … /* rate data (static) */ static struct ieee80211_rate iwl_cfg80211_rates[] = …; #define RATES_24_OFFS … #define N_RATES_24 … #define RATES_52_OFFS … #define N_RATES_52 … /* EEPROM reading functions */ static u16 iwl_eeprom_query16(const u8 *eeprom, size_t eeprom_size, int offset) { … } static u32 eeprom_indirect_address(const u8 *eeprom, size_t eeprom_size, u32 address) { … } static const u8 *iwl_eeprom_query_addr(const u8 *eeprom, size_t eeprom_size, u32 offset) { … } static int iwl_eeprom_read_calib(const u8 *eeprom, size_t eeprom_size, struct iwl_nvm_data *data) { … } /** * enum iwl_eeprom_channel_flags - channel flags in EEPROM * @EEPROM_CHANNEL_VALID: channel is usable for this SKU/geo * @EEPROM_CHANNEL_IBSS: usable as an IBSS channel * @EEPROM_CHANNEL_ACTIVE: active scanning allowed * @EEPROM_CHANNEL_RADAR: radar detection required * @EEPROM_CHANNEL_WIDE: 20 MHz channel okay (?) * @EEPROM_CHANNEL_DFS: dynamic freq selection candidate */ enum iwl_eeprom_channel_flags { … }; /** * struct iwl_eeprom_channel - EEPROM channel data * @flags: %EEPROM_CHANNEL_* flags * @max_power_avg: max power (in dBm) on this channel, at most 31 dBm */ struct iwl_eeprom_channel { … } __packed; enum iwl_eeprom_enhanced_txpwr_flags { … }; /** * struct iwl_eeprom_enhanced_txpwr - enhanced regulatory TX power limits * @flags: entry flags * @channel: channel number * @chain_a_max: chain a max power in 1/2 dBm * @chain_b_max: chain b max power in 1/2 dBm * @chain_c_max: chain c max power in 1/2 dBm * @delta_20_in_40: 20-in-40 deltas (hi/lo) * @mimo2_max: mimo2 max power in 1/2 dBm * @mimo3_max: mimo3 max power in 1/2 dBm * * This structure presents the enhanced regulatory tx power limit layout * in an EEPROM image. */ struct iwl_eeprom_enhanced_txpwr { … } __packed; static s8 iwl_get_max_txpwr_half_dbm(const struct iwl_nvm_data *data, struct iwl_eeprom_enhanced_txpwr *txp) { … } #define EEPROM_TXP_OFFS … #define EEPROM_TXP_ENTRY_LEN … #define EEPROM_TXP_SZ_OFFS … #define TXP_CHECK_AND_PRINT(x) … static void iwl_eeprom_enh_txp_read_element(struct iwl_nvm_data *data, struct iwl_eeprom_enhanced_txpwr *txp, int n_channels, s8 max_txpower_avg) { … } static void iwl_eeprom_enhanced_txpower(struct device *dev, struct iwl_nvm_data *data, const u8 *eeprom, size_t eeprom_size, int n_channels) { … } static void iwl_init_band_reference(const struct iwl_cfg *cfg, const u8 *eeprom, size_t eeprom_size, int eeprom_band, int *eeprom_ch_count, const struct iwl_eeprom_channel **ch_info, const u8 **eeprom_ch_array) { … } #define CHECK_AND_PRINT(x) … static void iwl_mod_ht40_chan_info(struct device *dev, struct iwl_nvm_data *data, int n_channels, enum nl80211_band band, u16 channel, const struct iwl_eeprom_channel *eeprom_ch, u8 clear_ht40_extension_channel) { … } #define CHECK_AND_PRINT_I(x) … static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg, struct iwl_nvm_data *data, const u8 *eeprom, size_t eeprom_size) { … } /* * EEPROM access time values: * * Driver initiates EEPROM read by writing byte address << 1 to CSR_EEPROM_REG. * Driver then polls CSR_EEPROM_REG for CSR_EEPROM_REG_READ_VALID_MSK (0x1). * When polling, wait 10 uSec between polling loops, up to a maximum 5000 uSec. * Driver reads 16-bit value from bits 31-16 of CSR_EEPROM_REG. */ #define IWL_EEPROM_ACCESS_TIMEOUT … /* * The device's EEPROM semaphore prevents conflicts between driver and uCode * when accessing the EEPROM; each access is a series of pulses to/from the * EEPROM chip, not a single event, so even reads could conflict if they * weren't arbitrated by the semaphore. */ #define IWL_EEPROM_SEM_TIMEOUT … #define IWL_EEPROM_SEM_RETRY_LIMIT … static int iwl_eeprom_acquire_semaphore(struct iwl_trans *trans) { … } static void iwl_eeprom_release_semaphore(struct iwl_trans *trans) { … } static int iwl_eeprom_verify_signature(struct iwl_trans *trans, bool nvm_is_otp) { … } /****************************************************************************** * * OTP related functions * ******************************************************************************/ static void iwl_set_otp_access_absolute(struct iwl_trans *trans) { … } static int iwl_nvm_is_otp(struct iwl_trans *trans) { … } static int iwl_init_otp_access(struct iwl_trans *trans) { … } static int iwl_read_otp_word(struct iwl_trans *trans, u16 addr, __le16 *eeprom_data) { … } /* * iwl_is_otp_empty: check for empty OTP */ static bool iwl_is_otp_empty(struct iwl_trans *trans) { … } /* * iwl_find_otp_image: find EEPROM image in OTP * finding the OTP block that contains the EEPROM image. * the last valid block on the link list (the block _before_ the last block) * is the block we should read and used to configure the device. * If all the available OTP blocks are full, the last block will be the block * we should read and used to configure the device. * only perform this operation if shadow RAM is disabled */ static int iwl_find_otp_image(struct iwl_trans *trans, u16 *validblockaddr) { … } /* * iwl_read_eeprom - read EEPROM contents * * Load the EEPROM contents from adapter and return it * and its size. * * NOTE: This routine uses the non-debug IO access functions. */ int iwl_read_eeprom(struct iwl_trans *trans, u8 **eeprom, size_t *eeprom_size) { … } static void iwl_init_sbands(struct iwl_trans *trans, const struct iwl_cfg *cfg, struct iwl_nvm_data *data, const u8 *eeprom, size_t eeprom_size) { … } /* EEPROM data functions */ struct iwl_nvm_data * iwl_parse_eeprom_data(struct iwl_trans *trans, const struct iwl_cfg *cfg, const u8 *eeprom, size_t eeprom_size) { … }
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