// SPDX-License-Identifier: GPL-2.0 /* * Microchip AXI PCIe Bridge host controller driver * * Copyright (c) 2018 - 2020 Microchip Corporation. All rights reserved. * * Author: Daire McNamara <[email protected]> */ #include <linux/bitfield.h> #include <linux/clk.h> #include <linux/irqchip/chained_irq.h> #include <linux/irqdomain.h> #include <linux/module.h> #include <linux/msi.h> #include <linux/of_address.h> #include <linux/of_pci.h> #include <linux/pci-ecam.h> #include <linux/platform_device.h> #include "../../pci.h" #include "pcie-plda.h" /* PCIe Bridge Phy and Controller Phy offsets */ #define MC_PCIE1_BRIDGE_ADDR … #define MC_PCIE1_CTRL_ADDR … #define MC_PCIE_BRIDGE_ADDR … #define MC_PCIE_CTRL_ADDR … /* PCIe Controller Phy Regs */ #define SEC_ERROR_EVENT_CNT … #define DED_ERROR_EVENT_CNT … #define SEC_ERROR_INT … #define SEC_ERROR_INT_TX_RAM_SEC_ERR_INT … #define SEC_ERROR_INT_RX_RAM_SEC_ERR_INT … #define SEC_ERROR_INT_PCIE2AXI_RAM_SEC_ERR_INT … #define SEC_ERROR_INT_AXI2PCIE_RAM_SEC_ERR_INT … #define SEC_ERROR_INT_ALL_RAM_SEC_ERR_INT … #define NUM_SEC_ERROR_INTS … #define SEC_ERROR_INT_MASK … #define DED_ERROR_INT … #define DED_ERROR_INT_TX_RAM_DED_ERR_INT … #define DED_ERROR_INT_RX_RAM_DED_ERR_INT … #define DED_ERROR_INT_PCIE2AXI_RAM_DED_ERR_INT … #define DED_ERROR_INT_AXI2PCIE_RAM_DED_ERR_INT … #define DED_ERROR_INT_ALL_RAM_DED_ERR_INT … #define NUM_DED_ERROR_INTS … #define DED_ERROR_INT_MASK … #define ECC_CONTROL … #define ECC_CONTROL_TX_RAM_INJ_ERROR_0 … #define ECC_CONTROL_TX_RAM_INJ_ERROR_1 … #define ECC_CONTROL_TX_RAM_INJ_ERROR_2 … #define ECC_CONTROL_TX_RAM_INJ_ERROR_3 … #define ECC_CONTROL_RX_RAM_INJ_ERROR_0 … #define ECC_CONTROL_RX_RAM_INJ_ERROR_1 … #define ECC_CONTROL_RX_RAM_INJ_ERROR_2 … #define ECC_CONTROL_RX_RAM_INJ_ERROR_3 … #define ECC_CONTROL_PCIE2AXI_RAM_INJ_ERROR_0 … #define ECC_CONTROL_PCIE2AXI_RAM_INJ_ERROR_1 … #define ECC_CONTROL_PCIE2AXI_RAM_INJ_ERROR_2 … #define ECC_CONTROL_PCIE2AXI_RAM_INJ_ERROR_3 … #define ECC_CONTROL_AXI2PCIE_RAM_INJ_ERROR_0 … #define ECC_CONTROL_AXI2PCIE_RAM_INJ_ERROR_1 … #define ECC_CONTROL_AXI2PCIE_RAM_INJ_ERROR_2 … #define ECC_CONTROL_AXI2PCIE_RAM_INJ_ERROR_3 … #define ECC_CONTROL_TX_RAM_ECC_BYPASS … #define ECC_CONTROL_RX_RAM_ECC_BYPASS … #define ECC_CONTROL_PCIE2AXI_RAM_ECC_BYPASS … #define ECC_CONTROL_AXI2PCIE_RAM_ECC_BYPASS … #define PCIE_EVENT_INT … #define PCIE_EVENT_INT_L2_EXIT_INT … #define PCIE_EVENT_INT_HOTRST_EXIT_INT … #define PCIE_EVENT_INT_DLUP_EXIT_INT … #define PCIE_EVENT_INT_MASK … #define PCIE_EVENT_INT_L2_EXIT_INT_MASK … #define PCIE_EVENT_INT_HOTRST_EXIT_INT_MASK … #define PCIE_EVENT_INT_DLUP_EXIT_INT_MASK … #define PCIE_EVENT_INT_ENB_MASK … #define PCIE_EVENT_INT_ENB_SHIFT … #define NUM_PCIE_EVENTS … /* PCIe Config space MSI capability structure */ #define MC_MSI_CAP_CTRL_OFFSET … /* Events */ #define EVENT_PCIE_L2_EXIT … #define EVENT_PCIE_HOTRST_EXIT … #define EVENT_PCIE_DLUP_EXIT … #define EVENT_SEC_TX_RAM_SEC_ERR … #define EVENT_SEC_RX_RAM_SEC_ERR … #define EVENT_SEC_PCIE2AXI_RAM_SEC_ERR … #define EVENT_SEC_AXI2PCIE_RAM_SEC_ERR … #define EVENT_DED_TX_RAM_DED_ERR … #define EVENT_DED_RX_RAM_DED_ERR … #define EVENT_DED_PCIE2AXI_RAM_DED_ERR … #define EVENT_DED_AXI2PCIE_RAM_DED_ERR … #define EVENT_LOCAL_DMA_END_ENGINE_0 … #define EVENT_LOCAL_DMA_END_ENGINE_1 … #define EVENT_LOCAL_DMA_ERROR_ENGINE_0 … #define EVENT_LOCAL_DMA_ERROR_ENGINE_1 … #define NUM_MC_EVENTS … #define EVENT_LOCAL_A_ATR_EVT_POST_ERR … #define EVENT_LOCAL_A_ATR_EVT_FETCH_ERR … #define EVENT_LOCAL_A_ATR_EVT_DISCARD_ERR … #define EVENT_LOCAL_A_ATR_EVT_DOORBELL … #define EVENT_LOCAL_P_ATR_EVT_POST_ERR … #define EVENT_LOCAL_P_ATR_EVT_FETCH_ERR … #define EVENT_LOCAL_P_ATR_EVT_DISCARD_ERR … #define EVENT_LOCAL_P_ATR_EVT_DOORBELL … #define EVENT_LOCAL_PM_MSI_INT_INTX … #define EVENT_LOCAL_PM_MSI_INT_MSI … #define EVENT_LOCAL_PM_MSI_INT_AER_EVT … #define EVENT_LOCAL_PM_MSI_INT_EVENTS … #define EVENT_LOCAL_PM_MSI_INT_SYS_ERR … #define NUM_EVENTS … #define PCIE_EVENT_CAUSE(x, s) … #define SEC_ERROR_CAUSE(x, s) … #define DED_ERROR_CAUSE(x, s) … #define LOCAL_EVENT_CAUSE(x, s) … #define PCIE_EVENT(x) … #define SEC_EVENT(x) … #define DED_EVENT(x) … #define LOCAL_EVENT(x) … #define PCIE_EVENT_TO_EVENT_MAP(x) … #define SEC_ERROR_TO_EVENT_MAP(x) … #define DED_ERROR_TO_EVENT_MAP(x) … #define LOCAL_STATUS_TO_EVENT_MAP(x) … struct event_map { … }; struct mc_pcie { … }; struct cause { … }; static const struct cause event_cause[NUM_EVENTS] = …; static struct event_map pcie_event_to_event[] = …; static struct event_map sec_error_to_event[] = …; static struct event_map ded_error_to_event[] = …; static struct event_map local_status_to_event[] = …; static struct { … } event_descs[] = …; static char poss_clks[][5] = …; static struct mc_pcie *port; static void mc_pcie_enable_msi(struct mc_pcie *port, void __iomem *ecam) { … } static inline u32 reg_to_event(u32 reg, struct event_map field) { … } static u32 pcie_events(struct mc_pcie *port) { … } static u32 sec_errors(struct mc_pcie *port) { … } static u32 ded_errors(struct mc_pcie *port) { … } static u32 local_events(struct mc_pcie *port) { … } static u32 mc_get_events(struct plda_pcie_rp *port) { … } static irqreturn_t mc_event_handler(int irq, void *dev_id) { … } static void mc_ack_event_irq(struct irq_data *data) { … } static void mc_mask_event_irq(struct irq_data *data) { … } static void mc_unmask_event_irq(struct irq_data *data) { … } static struct irq_chip mc_event_irq_chip = …; static inline void mc_pcie_deinit_clk(void *data) { … } static inline struct clk *mc_pcie_init_clk(struct device *dev, const char *id) { … } static int mc_pcie_init_clks(struct device *dev) { … } static int mc_request_event_irq(struct plda_pcie_rp *plda, int event_irq, int event) { … } static const struct plda_event_ops mc_event_ops = …; static const struct plda_event mc_event = …; static inline void mc_clear_secs(struct mc_pcie *port) { … } static inline void mc_clear_deds(struct mc_pcie *port) { … } static void mc_disable_interrupts(struct mc_pcie *port) { … } static int mc_platform_init(struct pci_config_window *cfg) { … } static int mc_host_probe(struct platform_device *pdev) { … } static const struct pci_ecam_ops mc_ecam_ops = …; static const struct of_device_id mc_pcie_of_match[] = …; MODULE_DEVICE_TABLE(of, mc_pcie_of_match); static struct platform_driver mc_pcie_driver = …; builtin_platform_driver(…) …; MODULE_LICENSE(…) …; MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …;
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