linux/drivers/gpu/drm/amd/amdgpu/soc24.c

/*
 * Copyright 2023 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */
#include <linux/firmware.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/pci.h>

#include "amdgpu.h"
#include "amdgpu_atombios.h"
#include "amdgpu_ih.h"
#include "amdgpu_uvd.h"
#include "amdgpu_vce.h"
#include "amdgpu_ucode.h"
#include "amdgpu_psp.h"
#include "amdgpu_smu.h"
#include "atom.h"
#include "amd_pcie.h"

#include "gc/gc_12_0_0_offset.h"
#include "gc/gc_12_0_0_sh_mask.h"
#include "mp/mp_14_0_2_offset.h"

#include "soc15.h"
#include "soc15_common.h"
#include "soc24.h"
#include "mxgpu_nv.h"

static const struct amd_ip_funcs soc24_common_ip_funcs;

static const struct amdgpu_video_codec_info vcn_5_0_0_video_codecs_encode_array_vcn0[] =;

static const struct amdgpu_video_codecs vcn_5_0_0_video_codecs_encode_vcn0 =;

static const struct amdgpu_video_codec_info vcn_5_0_0_video_codecs_decode_array_vcn0[] =;

static const struct amdgpu_video_codecs vcn_5_0_0_video_codecs_decode_vcn0 =;

static int soc24_query_video_codecs(struct amdgpu_device *adev, bool encode,
				 const struct amdgpu_video_codecs **codecs)
{}

static u32 soc24_get_config_memsize(struct amdgpu_device *adev)
{}

static u32 soc24_get_xclk(struct amdgpu_device *adev)
{}

void soc24_grbm_select(struct amdgpu_device *adev,
		       u32 me, u32 pipe, u32 queue, u32 vmid)
{}

static struct soc15_allowed_register_entry soc24_allowed_read_registers[] =;

static uint32_t soc24_read_indexed_register(struct amdgpu_device *adev,
					    u32 se_num,
					    u32 sh_num,
					    u32 reg_offset)
{}

static uint32_t soc24_get_register_value(struct amdgpu_device *adev,
					 bool indexed, u32 se_num,
					 u32 sh_num, u32 reg_offset)
{}

static int soc24_read_register(struct amdgpu_device *adev, u32 se_num,
			       u32 sh_num, u32 reg_offset, u32 *value)
{}

static enum amd_reset_method
soc24_asic_reset_method(struct amdgpu_device *adev)
{}

static int soc24_asic_reset(struct amdgpu_device *adev)
{}

static void soc24_program_aspm(struct amdgpu_device *adev)
{}

static void soc24_enable_doorbell_aperture(struct amdgpu_device *adev,
					   bool enable)
{}

const struct amdgpu_ip_block_version soc24_common_ip_block =;

static bool soc24_need_full_reset(struct amdgpu_device *adev)
{}

static bool soc24_need_reset_on_init(struct amdgpu_device *adev)
{}

static uint64_t soc24_get_pcie_replay_count(struct amdgpu_device *adev)
{}

static void soc24_init_doorbell_index(struct amdgpu_device *adev)
{}

static void soc24_pre_asic_init(struct amdgpu_device *adev)
{}

static int soc24_update_umd_stable_pstate(struct amdgpu_device *adev,
					  bool enter)
{}

static const struct amdgpu_asic_funcs soc24_asic_funcs =;

static int soc24_common_early_init(void *handle)
{}

static int soc24_common_late_init(void *handle)
{}

static int soc24_common_sw_init(void *handle)
{}

static int soc24_common_sw_fini(void *handle)
{}

static int soc24_common_hw_init(void *handle)
{}

static int soc24_common_hw_fini(void *handle)
{}

static int soc24_common_suspend(void *handle)
{}

static int soc24_common_resume(void *handle)
{}

static bool soc24_common_is_idle(void *handle)
{}

static int soc24_common_wait_for_idle(void *handle)
{}

static int soc24_common_soft_reset(void *handle)
{}

static int soc24_common_set_clockgating_state(void *handle,
					      enum amd_clockgating_state state)
{}

static int soc24_common_set_powergating_state(void *handle,
					      enum amd_powergating_state state)
{}

static void soc24_common_get_clockgating_state(void *handle, u64 *flags)
{}

static const struct amd_ip_funcs soc24_common_ip_funcs =;