linux/drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.h

/*
 * Copyright 2012-17 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#ifndef __DC_MEM_INPUT_DCN20_H__
#define __DC_MEM_INPUT_DCN20_H__

#include "../dcn10/dcn10_hubp.h"

#define TO_DCN20_HUBP(hubp)

#define HUBP_REG_LIST_DCN2_COMMON(id)

#define HUBP_REG_LIST_DCN20(id)

#define HUBP_MASK_SH_LIST_DCN2_SHARE_COMMON(mask_sh)

/*DCN2.x and DCN1.x*/
#define HUBP_MASK_SH_LIST_DCN2_COMMON(mask_sh)

/*DCN2.0 specific*/
#define HUBP_MASK_SH_LIST_DCN20(mask_sh)

/*DCN2.x */
#define DCN2_HUBP_REG_COMMON_VARIABLE_LIST

/*shared with dcn3.x*/
#define DCN21_HUBP_REG_COMMON_VARIABLE_LIST

#define DCN30_HUBP_REG_COMMON_VARIABLE_LIST

#define DCN32_HUBP_REG_COMMON_VARIABLE_LIST

#define DCN401_HUBP_REG_COMMON_VARIABLE_LIST

#define DCN2_HUBP_REG_FIELD_VARIABLE_LIST(type)

#define DCN21_HUBP_REG_FIELD_VARIABLE_LIST(type)

#define DCN30_HUBP_REG_FIELD_VARIABLE_LIST(type)

#define DCN31_HUBP_REG_FIELD_VARIABLE_LIST(type)

#define DCN32_HUBP_REG_FIELD_VARIABLE_LIST(type)

#define DCN401_HUBP_REG_FIELD_VARIABLE_LIST(type)



struct dcn_hubp2_registers {};

struct dcn_hubp2_shift {};

struct dcn_hubp2_mask {};

struct dcn20_hubp {};

bool hubp2_construct(
		struct dcn20_hubp *hubp2,
		struct dc_context *ctx,
		uint32_t inst,
		const struct dcn_hubp2_registers *hubp_regs,
		const struct dcn_hubp2_shift *hubp_shift,
		const struct dcn_hubp2_mask *hubp_mask);

void hubp2_setup_interdependent(
		struct hubp *hubp,
		struct _vcs_dpi_display_dlg_regs_st *dlg_attr,
		struct _vcs_dpi_display_ttu_regs_st *ttu_attr);

void hubp2_vready_at_or_After_vsync(struct hubp *hubp,
		struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest);

void hubp2_cursor_set_attributes(
		struct hubp *hubp,
		const struct dc_cursor_attributes *attr);

void hubp2_set_vm_system_aperture_settings(struct hubp *hubp,
		struct vm_system_aperture_param *apt);

enum cursor_lines_per_chunk hubp2_get_lines_per_chunk(
		unsigned int cursor_width,
		enum dc_cursor_color_format cursor_mode);

void hubp2_dmdata_set_attributes(
		struct hubp *hubp,
		const struct dc_dmdata_attributes *attr);

void hubp2_dmdata_load(
		struct hubp *hubp,
		uint32_t dmdata_sw_size,
		const uint32_t *dmdata_sw_data);

bool hubp2_dmdata_status_done(struct hubp *hubp);

void hubp2_enable_triplebuffer(
		struct hubp *hubp,
		bool enable);

bool hubp2_is_triplebuffer_enabled(
		struct hubp *hubp);

void hubp2_set_flip_control_surface_gsl(struct hubp *hubp, bool enable);

void hubp2_program_deadline(
		struct hubp *hubp,
		struct _vcs_dpi_display_dlg_regs_st *dlg_attr,
		struct _vcs_dpi_display_ttu_regs_st *ttu_attr);

bool hubp2_program_surface_flip_and_addr(
	struct hubp *hubp,
	const struct dc_plane_address *address,
	bool flip_immediate);

void hubp2_dcc_control(struct hubp *hubp, bool enable,
		enum hubp_ind_block_size independent_64b_blks);

void hubp2_program_size(
	struct hubp *hubp,
	enum surface_pixel_format format,
	const struct plane_size *plane_size,
	struct dc_plane_dcc_param *dcc);

void hubp2_program_rotation(
	struct hubp *hubp,
	enum dc_rotation_angle rotation,
	bool horizontal_mirror);

void hubp2_program_pixel_format(
	struct hubp *hubp,
	enum surface_pixel_format format);

void hubp2_program_surface_config(
	struct hubp *hubp,
	enum surface_pixel_format format,
	union dc_tiling_info *tiling_info,
	struct plane_size *plane_size,
	enum dc_rotation_angle rotation,
	struct dc_plane_dcc_param *dcc,
	bool horizontal_mirror,
	unsigned int compat_level);

bool hubp2_is_flip_pending(struct hubp *hubp);

void hubp2_set_blank(struct hubp *hubp, bool blank);
void hubp2_set_blank_regs(struct hubp *hubp, bool blank);

void hubp2_cursor_set_position(
		struct hubp *hubp,
		const struct dc_cursor_position *pos,
		const struct dc_cursor_mi_param *param);

void hubp2_clk_cntl(struct hubp *hubp, bool enable);

void hubp2_vtg_sel(struct hubp *hubp, uint32_t otg_inst);

void hubp2_clear_underflow(struct hubp *hubp);

void hubp2_read_state_common(struct hubp *hubp);

void hubp2_read_state(struct hubp *hubp);

#endif /* __DC_MEM_INPUT_DCN20_H__ */