linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

// SPDX-License-Identifier: MIT
//
// Copyright 2024 Advanced Micro Devices, Inc.

#include "dm_services.h"
#include "dm_helpers.h"
#include "core_types.h"
#include "resource.h"
#include "dccg.h"
#include "dce/dce_hwseq.h"
#include "reg_helper.h"
#include "abm.h"
#include "hubp.h"
#include "dchubbub.h"
#include "timing_generator.h"
#include "opp.h"
#include "ipp.h"
#include "mpc.h"
#include "mcif_wb.h"
#include "dc_dmub_srv.h"
#include "link_hwss.h"
#include "dpcd_defs.h"
#include "clk_mgr.h"
#include "dsc.h"
#include "link.h"

#include "dce/dmub_hw_lock_mgr.h"
#include "dcn10/dcn10_cm_common.h"
#include "dcn20/dcn20_optc.h"
#include "dcn30/dcn30_cm_common.h"
#include "dcn32/dcn32_hwseq.h"
#include "dcn401_hwseq.h"
#include "dcn401/dcn401_resource.h"
#include "dc_state_priv.h"
#include "link_enc_cfg.h"

#define DC_LOGGER_INIT(logger) …

#define CTX …
#define REG(reg) …
#define DC_LOGGER …


#undef FN
#define FN(reg_name, field_name) …

static void dcn401_initialize_min_clocks(struct dc *dc)
{ … }

void dcn401_program_gamut_remap(struct pipe_ctx *pipe_ctx)
{ … }

struct ips_ono_region_state dcn401_read_ono_state(struct dc *dc, uint8_t region)
{ … }

void dcn401_init_hw(struct dc *dc)
{ … }

static void dcn401_get_mcm_lut_xable_from_pipe_ctx(struct dc *dc, struct pipe_ctx *pipe_ctx,
		enum MCM_LUT_XABLE *shaper_xable,
		enum MCM_LUT_XABLE *lut3d_xable,
		enum MCM_LUT_XABLE *lut1d_xable)
{ … }

void dcn401_populate_mcm_luts(struct dc *dc,
		struct pipe_ctx *pipe_ctx,
		struct dc_cm2_func_luts mcm_luts,
		bool lut_bank_a)
{ … }

void dcn401_trigger_3dlut_dma_load(struct dc *dc, struct pipe_ctx *pipe_ctx)
{ … }

bool dcn401_set_mcm_luts(struct pipe_ctx *pipe_ctx,
				const struct dc_plane_state *plane_state)
{ … }

bool dcn401_set_output_transfer_func(struct dc *dc,
				struct pipe_ctx *pipe_ctx,
				const struct dc_stream_state *stream)
{ … }

void dcn401_calculate_dccg_tmds_div_value(struct pipe_ctx *pipe_ctx,
				unsigned int *tmds_div)
{ … }

static void enable_stream_timing_calc(
		struct pipe_ctx *pipe_ctx,
		struct dc_state *context,
		struct dc *dc,
		unsigned int *tmds_div,
		int *opp_inst,
		int *opp_cnt,
		struct pipe_ctx *opp_heads[MAX_PIPES],
		bool *manual_mode,
		struct drr_params *params,
		unsigned int *event_triggers)
{ … }

enum dc_status dcn401_enable_stream_timing(
		struct pipe_ctx *pipe_ctx,
		struct dc_state *context,
		struct dc *dc)
{ … }

static enum phyd32clk_clock_source get_phyd32clk_src(struct dc_link *link)
{ … }

static void dcn401_enable_stream_calc(
		struct pipe_ctx *pipe_ctx,
		int *dp_hpo_inst,
		enum phyd32clk_clock_source *phyd32clk,
		unsigned int *tmds_div,
		uint32_t *early_control)
{ … }

void dcn401_enable_stream(struct pipe_ctx *pipe_ctx)
{ … }

void dcn401_setup_hpo_hw_control(const struct dce_hwseq *hws, bool enable)
{ … }

static bool dcn401_can_pipe_disable_cursor(struct pipe_ctx *pipe_ctx)
{ … }

void adjust_hotspot_between_slices_for_2x_magnify(uint32_t cursor_width, struct dc_cursor_position *pos_cpy)
{ … }

void dcn401_set_cursor_position(struct pipe_ctx *pipe_ctx)
{ … }

static bool dcn401_check_no_memory_request_for_cab(struct dc *dc)
{ … }

static uint32_t dcn401_calculate_cab_allocation(struct dc *dc, struct dc_state *ctx)
{ … }

bool dcn401_apply_idle_power_optimizations(struct dc *dc, bool enable)
{ … }

void dcn401_wait_for_dcc_meta_propagation(const struct dc *dc,
		const struct pipe_ctx *top_pipe)
{ … }

void dcn401_prepare_bandwidth(struct dc *dc,
	struct dc_state *context)
{ … }

void dcn401_optimize_bandwidth(
		struct dc *dc,
		struct dc_state *context)
{ … }

void dcn401_fams2_global_control_lock(struct dc *dc,
		struct dc_state *context,
		bool lock)
{ … }

void dcn401_fams2_global_control_lock_fast(union block_sequence_params *params)
{ … }

void dcn401_fams2_update_config(struct dc *dc, struct dc_state *context, bool enable)
{ … }

static void update_dsc_for_odm_change(struct dc *dc, struct dc_state *context,
		struct pipe_ctx *otg_master)
{ … }

void dcn401_update_odm(struct dc *dc, struct dc_state *context,
		struct pipe_ctx *otg_master)
{ … }

void dcn401_unblank_stream(struct pipe_ctx *pipe_ctx,
		struct dc_link_settings *link_settings)
{ … }

void dcn401_hardware_release(struct dc *dc)
{ … }