dcn35_pg_cntl.h | Explore in Territory

/* SPDX-License-Identifier: MIT */
/*
 * Copyright 2023 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#ifndef _DCN35_PG_CNTL_H_
#define _DCN35_PG_CNTL_H_

#include "pg_cntl.h"

#define PG_CNTL_REG_LIST_DCN35() …

#define PG_CNTL_SF(reg_name, field_name, post_fix) …

#define PG_CNTL_MASK_SH_LIST_DCN35(mask_sh) …

#define PG_CNTL_REG_FIELD_LIST(type) …

#define PG_CNTL_DCN35_REG_FIELD_LIST(type) …

struct pg_cntl_shift { … };

struct pg_cntl_mask { … };

struct pg_cntl_registers { … };

struct dcn_pg_cntl { … };

void pg_cntl35_dsc_pg_control(struct pg_cntl *pg_cntl, unsigned int dsc_inst, bool power_on);
void pg_cntl35_hubp_dpp_pg_control(struct pg_cntl *pg_cntl,
	unsigned int hubp_dpp_inst, bool power_on);
void pg_cntl35_hpo_pg_control(struct pg_cntl *pg_cntl, bool power_on);
void pg_cntl35_io_clk_pg_control(struct pg_cntl *pg_cntl, bool power_on);
void pg_cntl35_plane_otg_pg_control(struct pg_cntl *pg_cntl, bool power_on);
void pg_cntl35_mpcc_pg_control(struct pg_cntl *pg_cntl,
	unsigned int mpcc_inst, bool power_on);
void pg_cntl35_opp_pg_control(struct pg_cntl *pg_cntl,
	unsigned int opp_inst, bool power_on);
void pg_cntl35_optc_pg_control(struct pg_cntl *pg_cntl,
	unsigned int optc_inst, bool power_on);
void pg_cntl35_dwb_pg_control(struct pg_cntl *pg_cntl, bool power_on);
void pg_cntl35_init_pg_status(struct pg_cntl *pg_cntl);

struct pg_cntl *pg_cntl35_create(
	struct dc_context *ctx,
	const struct pg_cntl_registers *regs,
	const struct pg_cntl_shift *pg_cntl_shift,
	const struct pg_cntl_mask *pg_cntl_mask);

void dcn_pg_cntl_destroy(struct pg_cntl **pg_cntl);

#endif /* DCN35_PG_CNTL */
linux/drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
