linux/drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

/*
 * Copyright 2012-15 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */
#include "dm_services.h"
#include "dce_calcs.h"
#include "reg_helper.h"
#include "basics/conversion.h"
#include "dcn10_hubp.h"

#define REG(reg) …

#define CTX …

#undef FN
#define FN(reg_name, field_name) …

void hubp1_set_blank(struct hubp *hubp, bool blank)
{ … }

static void hubp1_disconnect(struct hubp *hubp)
{ … }

static void hubp1_disable_control(struct hubp *hubp, bool disable_hubp)
{ … }

static unsigned int hubp1_get_underflow_status(struct hubp *hubp)
{ … }


void hubp1_clear_underflow(struct hubp *hubp)
{ … }

static void hubp1_set_hubp_blank_en(struct hubp *hubp, bool blank)
{ … }

void hubp1_vready_workaround(struct hubp *hubp,
		struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest)
{ … }

void hubp1_program_tiling(
	struct hubp *hubp,
	const union dc_tiling_info *info,
	const enum surface_pixel_format pixel_format)
{ … }

void hubp1_program_size(
	struct hubp *hubp,
	enum surface_pixel_format format,
	const struct plane_size *plane_size,
	struct dc_plane_dcc_param *dcc)
{ … }

void hubp1_program_rotation(
	struct hubp *hubp,
	enum dc_rotation_angle rotation,
	bool horizontal_mirror)
{ … }

void hubp1_program_pixel_format(
	struct hubp *hubp,
	enum surface_pixel_format format)
{ … }

bool hubp1_program_surface_flip_and_addr(
	struct hubp *hubp,
	const struct dc_plane_address *address,
	bool flip_immediate)
{ … }

void hubp1_dcc_control(struct hubp *hubp, bool enable,
		enum hubp_ind_block_size independent_64b_blks)
{ … }

void hubp1_program_surface_config(
	struct hubp *hubp,
	enum surface_pixel_format format,
	union dc_tiling_info *tiling_info,
	struct plane_size *plane_size,
	enum dc_rotation_angle rotation,
	struct dc_plane_dcc_param *dcc,
	bool horizontal_mirror,
	unsigned int compat_level)
{ … }

void hubp1_program_requestor(
		struct hubp *hubp,
		struct _vcs_dpi_display_rq_regs_st *rq_regs)
{ … }


void hubp1_program_deadline(
		struct hubp *hubp,
		struct _vcs_dpi_display_dlg_regs_st *dlg_attr,
		struct _vcs_dpi_display_ttu_regs_st *ttu_attr)
{ … }

static void hubp1_setup(
		struct hubp *hubp,
		struct _vcs_dpi_display_dlg_regs_st *dlg_attr,
		struct _vcs_dpi_display_ttu_regs_st *ttu_attr,
		struct _vcs_dpi_display_rq_regs_st *rq_regs,
		struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest)
{ … }

static void hubp1_setup_interdependent(
		struct hubp *hubp,
		struct _vcs_dpi_display_dlg_regs_st *dlg_attr,
		struct _vcs_dpi_display_ttu_regs_st *ttu_attr)
{ … }

bool hubp1_is_flip_pending(struct hubp *hubp)
{ … }

static uint32_t aperture_default_system = …;
static uint32_t context0_default_system; /* = 0;*/

static void hubp1_set_vm_system_aperture_settings(struct hubp *hubp,
		struct vm_system_aperture_param *apt)
{ … }

static void hubp1_set_vm_context0_settings(struct hubp *hubp,
		const struct vm_context0_param *vm0)
{ … }

void min_set_viewport(
	struct hubp *hubp,
	const struct rect *viewport,
	const struct rect *viewport_c)
{ … }

void hubp1_read_state_common(struct hubp *hubp)
{ … }

void hubp1_read_state(struct hubp *hubp)
{ … }
enum cursor_pitch hubp1_get_cursor_pitch(unsigned int pitch)
{ … }

static enum cursor_lines_per_chunk hubp1_get_lines_per_chunk(
		unsigned int cur_width,
		enum dc_cursor_color_format format)
{ … }

void hubp1_cursor_set_attributes(
		struct hubp *hubp,
		const struct dc_cursor_attributes *attr)
{ … }

void hubp1_cursor_set_position(
		struct hubp *hubp,
		const struct dc_cursor_position *pos,
		const struct dc_cursor_mi_param *param)
{ … }

/**
 * hubp1_clk_cntl - Disable or enable clocks for DCHUBP
 *
 * @hubp: hubp struct reference.
 * @enable: Set true for enabling gate clock.
 *
 * When enabling/disabling DCHUBP clock, we affect dcfclk/dppclk.
 */
void hubp1_clk_cntl(struct hubp *hubp, bool enable)
{ … }

void hubp1_vtg_sel(struct hubp *hubp, uint32_t otg_inst)
{ … }

bool hubp1_in_blank(struct hubp *hubp)
{ … }

void hubp1_soft_reset(struct hubp *hubp, bool reset)
{ … }

/**
 * hubp1_set_flip_int - Enable surface flip interrupt
 *
 * @hubp: hubp struct reference.
 */
void hubp1_set_flip_int(struct hubp *hubp)
{ … }

/**
 * hubp1_wait_pipe_read_start - wait for hubp ret path starting read.
 *
 * @hubp: hubp struct reference.
 */
static void hubp1_wait_pipe_read_start(struct hubp *hubp)
{ … }

void hubp1_init(struct hubp *hubp)
{ … }
static const struct hubp_funcs dcn10_hubp_funcs = …;

/*****************************************/
/* Constructor, Destructor               */
/*****************************************/

void dcn10_hubp_construct(
	struct dcn10_hubp *hubp1,
	struct dc_context *ctx,
	uint32_t inst,
	const struct dcn_mi_registers *hubp_regs,
	const struct dcn_mi_shift *hubp_shift,
	const struct dcn_mi_mask *hubp_mask)
{ … }