// SPDX-License-Identifier: MIT // // Copyright 2024 Advanced Micro Devices, Inc. #include "dml2_internal_shared_types.h" #include "dml2_core_dcn4_calcs.h" #include "dml2_debug.h" #include "lib_float_math.h" #include "dml_top_types.h" #include "dml2_core_shared.h" #define DML_VM_PTE_ADL_PATCH_EN //#define DML_TVM_UPDATE_EN #define DML_TDLUT_ROW_BYTES_FIX_EN #define DML_REG_LIMIT_CLAMP_EN #define DML2_MAX_FMT_420_BUFFER_WIDTH … #define DML_MAX_NUM_OF_SLICES_PER_DSC … static void dml2_print_dml_mode_support_info(const struct dml2_core_internal_mode_support_info *support, bool fail_only) { … } static void get_stream_output_bpp(double *out_bpp, const struct dml2_display_cfg *display_cfg) { … } static unsigned int dml_round_to_multiple(unsigned int num, unsigned int multiple, bool up) { … } static unsigned int dml_get_num_active_pipes(int unsigned num_planes, const struct core_display_cfg_support_info *cfg_support_info) { … } static void dml_calc_pipe_plane_mapping(const struct core_display_cfg_support_info *cfg_support_info, unsigned int *pipe_plane) { … } static bool dml_is_phantom_pipe(const struct dml2_plane_parameters *plane_cfg) { … } static bool dml_get_is_phantom_pipe(const struct dml2_display_cfg *display_cfg, const struct dml2_core_internal_display_mode_lib *mode_lib, unsigned int pipe_idx) { … } #define dml_get_per_pipe_var_func(variable, type, interval_var) … dml_get_per_pipe_var_func(dpte_group_size_in_bytes, unsigned int, mode_lib->mp.dpte_group_bytes); dml_get_per_pipe_var_func(vm_group_size_in_bytes, unsigned int, mode_lib->mp.vm_group_bytes); dml_get_per_pipe_var_func(swath_height_l, unsigned int, mode_lib->mp.SwathHeightY); dml_get_per_pipe_var_func(swath_height_c, unsigned int, mode_lib->mp.SwathHeightC); dml_get_per_pipe_var_func(dpte_row_height_linear_l, unsigned int, mode_lib->mp.dpte_row_height_linear); dml_get_per_pipe_var_func(dpte_row_height_linear_c, unsigned int, mode_lib->mp.dpte_row_height_linear_chroma); dml_get_per_pipe_var_func(vstartup_calculated, unsigned int, mode_lib->mp.VStartup); dml_get_per_pipe_var_func(vupdate_offset, unsigned int, mode_lib->mp.VUpdateOffsetPix); dml_get_per_pipe_var_func(vupdate_width, unsigned int, mode_lib->mp.VUpdateWidthPix); dml_get_per_pipe_var_func(vready_offset, unsigned int, mode_lib->mp.VReadyOffsetPix); dml_get_per_pipe_var_func(det_stored_buffer_size_l_bytes, unsigned int, mode_lib->mp.DETBufferSizeY); dml_get_per_pipe_var_func(det_stored_buffer_size_c_bytes, unsigned int, mode_lib->mp.DETBufferSizeC); dml_get_per_pipe_var_func(det_buffer_size_kbytes, unsigned int, mode_lib->mp.DETBufferSizeInKByte); dml_get_per_pipe_var_func(surface_size_in_mall_bytes, unsigned int, mode_lib->mp.SurfaceSizeInTheMALL); #define dml_get_per_plane_var_func(variable, type, interval_var) … dml_get_per_plane_var_func(num_mcaches_plane0, unsigned int, mode_lib->ms.num_mcaches_l); dml_get_per_plane_var_func(mcache_row_bytes_plane0, unsigned int, mode_lib->ms.mcache_row_bytes_l); dml_get_per_plane_var_func(mcache_shift_granularity_plane0, unsigned int, mode_lib->ms.mcache_shift_granularity_l); dml_get_per_plane_var_func(num_mcaches_plane1, unsigned int, mode_lib->ms.num_mcaches_c); dml_get_per_plane_var_func(mcache_row_bytes_plane1, unsigned int, mode_lib->ms.mcache_row_bytes_c); dml_get_per_plane_var_func(mcache_shift_granularity_plane1, unsigned int, mode_lib->ms.mcache_shift_granularity_c); dml_get_per_plane_var_func(mall_comb_mcache_l, unsigned int, mode_lib->ms.mall_comb_mcache_l); dml_get_per_plane_var_func(mall_comb_mcache_c, unsigned int, mode_lib->ms.mall_comb_mcache_c); dml_get_per_plane_var_func(lc_comb_mcache, unsigned int, mode_lib->ms.lc_comb_mcache); dml_get_per_plane_var_func(subviewport_lines_needed_in_mall, unsigned int, mode_lib->ms.SubViewportLinesNeededInMALL); dml_get_per_plane_var_func(max_vstartup_lines, unsigned int, mode_lib->ms.MaxVStartupLines); #define dml_get_per_plane_array_var_func(variable, type, interval_var) … dml_get_per_plane_array_var_func(mcache_offsets_plane0, unsigned int, mode_lib->ms.mcache_offsets_l); dml_get_per_plane_array_var_func(mcache_offsets_plane1, unsigned int, mode_lib->ms.mcache_offsets_c); #define dml_get_var_func(var, type, internal_var) … dml_get_var_func(wm_urgent, double, mode_lib->mp.Watermark.UrgentWatermark); dml_get_var_func(wm_stutter_exit, double, mode_lib->mp.Watermark.StutterExitWatermark); dml_get_var_func(wm_stutter_enter_exit, double, mode_lib->mp.Watermark.StutterEnterPlusExitWatermark); dml_get_var_func(wm_z8_stutter_exit, double, mode_lib->mp.Watermark.Z8StutterExitWatermark); dml_get_var_func(wm_z8_stutter_enter_exit, double, mode_lib->mp.Watermark.Z8StutterEnterPlusExitWatermark); dml_get_var_func(wm_memory_trip, double, mode_lib->mp.UrgentLatency); dml_get_var_func(meta_trip_memory_us, double, mode_lib->mp.MetaTripToMemory); dml_get_var_func(wm_fclk_change, double, mode_lib->mp.Watermark.FCLKChangeWatermark); dml_get_var_func(wm_usr_retraining, double, mode_lib->mp.Watermark.USRRetrainingWatermark); dml_get_var_func(wm_g6_temp_read, double, mode_lib->mp.Watermark.g6_temp_read_watermark_us); dml_get_var_func(wm_dram_clock_change, double, mode_lib->mp.Watermark.DRAMClockChangeWatermark); dml_get_var_func(fraction_of_urgent_bandwidth, double, mode_lib->mp.FractionOfUrgentBandwidth); dml_get_var_func(fraction_of_urgent_bandwidth_imm_flip, double, mode_lib->mp.FractionOfUrgentBandwidthImmediateFlip); dml_get_var_func(fraction_of_urgent_bandwidth_mall, double, mode_lib->mp.FractionOfUrgentBandwidthMALL); dml_get_var_func(urgent_latency, double, mode_lib->mp.UrgentLatency); dml_get_var_func(wm_writeback_dram_clock_change, double, mode_lib->mp.Watermark.WritebackDRAMClockChangeWatermark); dml_get_var_func(wm_writeback_fclk_change, double, mode_lib->mp.Watermark.WritebackFCLKChangeWatermark); dml_get_var_func(stutter_efficiency, double, mode_lib->mp.StutterEfficiency); dml_get_var_func(stutter_efficiency_no_vblank, double, mode_lib->mp.StutterEfficiencyNotIncludingVBlank); dml_get_var_func(stutter_num_bursts, double, mode_lib->mp.NumberOfStutterBurstsPerFrame); dml_get_var_func(stutter_efficiency_z8, double, mode_lib->mp.Z8StutterEfficiency); dml_get_var_func(stutter_num_bursts_z8, double, mode_lib->mp.Z8NumberOfStutterBurstsPerFrame); dml_get_var_func(stutter_period, double, mode_lib->mp.StutterPeriod); dml_get_var_func(stutter_efficiency_z8_bestcase, double, mode_lib->mp.Z8StutterEfficiencyBestCase); dml_get_var_func(stutter_num_bursts_z8_bestcase, double, mode_lib->mp.Z8NumberOfStutterBurstsPerFrameBestCase); dml_get_var_func(stutter_period_bestcase, double, mode_lib->mp.StutterPeriodBestCase); dml_get_var_func(fclk_change_latency, double, mode_lib->mp.MaxActiveFCLKChangeLatencySupported); dml_get_var_func(global_dppclk_khz, double, mode_lib->mp.GlobalDPPCLK * 1000.0); dml_get_var_func(sys_active_avg_bw_required_sdp, double, mode_lib->ms.support.avg_bandwidth_required[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_sdp]); dml_get_var_func(sys_active_avg_bw_required_dram, double, mode_lib->ms.support.avg_bandwidth_required[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_dram]); dml_get_var_func(svp_prefetch_avg_bw_required_sdp, double, mode_lib->ms.support.avg_bandwidth_required[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_sdp]); dml_get_var_func(svp_prefetch_avg_bw_required_dram, double, mode_lib->ms.support.avg_bandwidth_required[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_dram]); dml_get_var_func(sys_active_avg_bw_available_sdp, double, mode_lib->mp.avg_bandwidth_available[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_sdp]); dml_get_var_func(sys_active_avg_bw_available_dram, double, mode_lib->mp.avg_bandwidth_available[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_dram]); dml_get_var_func(svp_prefetch_avg_bw_available_sdp, double, mode_lib->mp.avg_bandwidth_available[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_sdp]); dml_get_var_func(svp_prefetch_avg_bw_available_dram, double, mode_lib->mp.avg_bandwidth_available[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_dram]); dml_get_var_func(sys_active_urg_bw_available_sdp, double, mode_lib->mp.urg_bandwidth_available[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_sdp]); dml_get_var_func(sys_active_urg_bw_available_dram, double, mode_lib->mp.urg_bandwidth_available[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_dram]); dml_get_var_func(sys_active_urg_bw_available_dram_vm_only, double, mode_lib->mp.urg_bandwidth_available_vm_only[dml2_core_internal_soc_state_sys_active]); dml_get_var_func(svp_prefetch_urg_bw_available_sdp, double, mode_lib->mp.urg_bandwidth_available[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_sdp]); dml_get_var_func(svp_prefetch_urg_bw_available_dram, double, mode_lib->mp.urg_bandwidth_available[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_dram]); dml_get_var_func(svp_prefetch_urg_bw_available_dram_vm_only, double, mode_lib->mp.urg_bandwidth_available_vm_only[dml2_core_internal_soc_state_svp_prefetch]); dml_get_var_func(max_urgent_latency_us, double, mode_lib->ms.support.max_urgent_latency_us); dml_get_var_func(avg_non_urgent_latency_us, double, mode_lib->ms.support.avg_non_urgent_latency_us); dml_get_var_func(avg_urgent_latency_us, double, mode_lib->ms.support.avg_urgent_latency_us); dml_get_var_func(sys_active_urg_bw_required_sdp, double, mode_lib->mp.urg_bandwidth_required[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_sdp]); dml_get_var_func(sys_active_urg_bw_required_dram, double, mode_lib->mp.urg_bandwidth_required[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_dram]); dml_get_var_func(svp_prefetch_urg_bw_required_sdp, double, mode_lib->mp.urg_bandwidth_required[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_sdp]); dml_get_var_func(svp_prefetch_urg_bw_required_dram, double, mode_lib->mp.urg_bandwidth_required[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_dram]); dml_get_var_func(sys_active_non_urg_required_sdp, double, mode_lib->mp.non_urg_bandwidth_required[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_sdp]); dml_get_var_func(sys_active_non_urg_required_dram, double, mode_lib->mp.non_urg_bandwidth_required[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_dram]); dml_get_var_func(svp_prefetch_non_urg_bw_required_sdp, double, mode_lib->mp.non_urg_bandwidth_required[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_sdp]); dml_get_var_func(svp_prefetch_non_urg_bw_required_dram, double, mode_lib->mp.non_urg_bandwidth_required[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_dram]); dml_get_var_func(sys_active_urg_bw_required_sdp_flip, double, mode_lib->mp.urg_bandwidth_required_flip[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_sdp]); dml_get_var_func(sys_active_urg_bw_required_dram_flip, double, mode_lib->mp.urg_bandwidth_required_flip[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_dram]); dml_get_var_func(svp_prefetch_urg_bw_required_sdp_flip, double, mode_lib->mp.urg_bandwidth_required_flip[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_sdp]); dml_get_var_func(svp_prefetch_urg_bw_required_dram_flip, double, mode_lib->mp.urg_bandwidth_required_flip[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_dram]); dml_get_var_func(sys_active_non_urg_required_sdp_flip, double, mode_lib->mp.non_urg_bandwidth_required_flip[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_sdp]); dml_get_var_func(sys_active_non_urg_required_dram_flip, double, mode_lib->mp.non_urg_bandwidth_required_flip[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_dram]); dml_get_var_func(svp_prefetch_non_urg_bw_required_sdp_flip, double, mode_lib->mp.non_urg_bandwidth_required_flip[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_sdp]); dml_get_var_func(svp_prefetch_non_urg_bw_required_dram_flip, double, mode_lib->mp.non_urg_bandwidth_required_flip[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_dram]); dml_get_var_func(comp_buffer_size_kbytes, unsigned int, mode_lib->mp.CompressedBufferSizeInkByte); dml_get_var_func(unbounded_request_enabled, bool, mode_lib->mp.UnboundedRequestEnabled); dml_get_var_func(wm_writeback_urgent, double, mode_lib->mp.Watermark.WritebackUrgentWatermark); dml_get_var_func(cstate_max_cap_mode, bool, mode_lib->mp.DCHUBBUB_ARB_CSTATE_MAX_CAP_MODE); dml_get_var_func(compbuf_reserved_space_64b, unsigned int, mode_lib->mp.compbuf_reserved_space_64b); dml_get_var_func(hw_debug5, bool, mode_lib->mp.hw_debug5); dml_get_var_func(dcfclk_deep_sleep_hysteresis, unsigned int, mode_lib->mp.dcfclk_deep_sleep_hysteresis); static void CalculateMaxDETAndMinCompressedBufferSize( unsigned int ConfigReturnBufferSizeInKByte, unsigned int ConfigReturnBufferSegmentSizeInKByte, unsigned int ROBBufferSizeInKByte, unsigned int MaxNumDPP, unsigned int nomDETInKByteOverrideEnable, // VBA_DELTA, allow DV to override default DET size unsigned int nomDETInKByteOverrideValue, // VBA_DELTA bool is_mrq_present, // Output unsigned int *MaxTotalDETInKByte, unsigned int *nomDETInKByte, unsigned int *MinCompressedBufferSizeInKByte) { … } static void PixelClockAdjustmentForProgressiveToInterlaceUnit(const struct dml2_display_cfg *display_cfg, bool ptoi_supported, double *PixelClockBackEnd) { … } static bool dml_is_420(enum dml2_source_format_class source_format) { … } static unsigned int dml_get_tile_block_size_bytes(enum dml2_swizzle_mode sw_mode) { … } static bool dml_is_vertical_rotation(enum dml2_rotation_angle Scan) { … } static int unsigned dml_get_gfx_version(enum dml2_swizzle_mode sw_mode) { … } static void CalculateBytePerPixelAndBlockSizes( enum dml2_source_format_class SourcePixelFormat, enum dml2_swizzle_mode SurfaceTiling, unsigned int pitch_y, unsigned int pitch_c, // Output unsigned int *BytePerPixelY, unsigned int *BytePerPixelC, double *BytePerPixelDETY, double *BytePerPixelDETC, unsigned int *BlockHeight256BytesY, unsigned int *BlockHeight256BytesC, unsigned int *BlockWidth256BytesY, unsigned int *BlockWidth256BytesC, unsigned int *MacroTileHeightY, unsigned int *MacroTileHeightC, unsigned int *MacroTileWidthY, unsigned int *MacroTileWidthC, bool *surf_linear128_l, bool *surf_linear128_c) { … } static void CalculateSinglePipeDPPCLKAndSCLThroughput( double HRatio, double HRatioChroma, double VRatio, double VRatioChroma, double MaxDCHUBToPSCLThroughput, double MaxPSCLToLBThroughput, double PixelClock, enum dml2_source_format_class SourcePixelFormat, unsigned int HTaps, unsigned int HTapsChroma, unsigned int VTaps, unsigned int VTapsChroma, // Output double *PSCL_THROUGHPUT, double *PSCL_THROUGHPUT_CHROMA, double *DPPCLKUsingSingleDPP) { … } static void CalculateSwathWidth( const struct dml2_display_cfg *display_cfg, bool ForceSingleDPP, unsigned int NumberOfActiveSurfaces, enum dml2_odm_mode ODMMode[], unsigned int BytePerPixY[], unsigned int BytePerPixC[], unsigned int Read256BytesBlockHeightY[], unsigned int Read256BytesBlockHeightC[], unsigned int Read256BytesBlockWidthY[], unsigned int Read256BytesBlockWidthC[], bool surf_linear128_l[], bool surf_linear128_c[], unsigned int DPPPerSurface[], // Output unsigned int req_per_swath_ub_l[], unsigned int req_per_swath_ub_c[], unsigned int SwathWidthSingleDPPY[], unsigned int SwathWidthSingleDPPC[], unsigned int SwathWidthY[], // per-pipe unsigned int SwathWidthC[], // per-pipe unsigned int MaximumSwathHeightY[], unsigned int MaximumSwathHeightC[], unsigned int swath_width_luma_ub[], // per-pipe unsigned int swath_width_chroma_ub[]) // per-pipe { … } static bool UnboundedRequest(bool unb_req_force_en, bool unb_req_force_val, unsigned int TotalNumberOfActiveDPP, bool NoChromaOrLinear) { … } static void CalculateDETBufferSize( struct dml2_core_shared_CalculateDETBufferSize_locals *l, const struct dml2_display_cfg *display_cfg, bool ForceSingleDPP, unsigned int NumberOfActiveSurfaces, bool UnboundedRequestEnabled, unsigned int nomDETInKByte, unsigned int MaxTotalDETInKByte, unsigned int ConfigReturnBufferSizeInKByte, unsigned int MinCompressedBufferSizeInKByte, unsigned int ConfigReturnBufferSegmentSizeInkByte, unsigned int CompressedBufferSegmentSizeInkByte, double ReadBandwidthLuma[], double ReadBandwidthChroma[], unsigned int full_swath_bytes_l[], unsigned int full_swath_bytes_c[], unsigned int DPPPerSurface[], // Output unsigned int DETBufferSizeInKByte[], unsigned int *CompressedBufferSizeInkByte) { … } static double CalculateRequiredDispclk( enum dml2_odm_mode ODMMode, double PixelClock) { … } static double TruncToValidBPP( struct dml2_core_shared_TruncToValidBPP_locals *l, double LinkBitRate, unsigned int Lanes, unsigned int HTotal, unsigned int HActive, double PixelClock, double DesiredBPP, bool DSCEnable, enum dml2_output_encoder_class Output, enum dml2_output_format_class Format, unsigned int DSCInputBitPerComponent, unsigned int DSCSlices, unsigned int AudioRate, unsigned int AudioLayout, enum dml2_odm_mode ODMModeNoDSC, enum dml2_odm_mode ODMModeDSC, // Output unsigned int *RequiredSlots) { … } // updated for dcn4 static unsigned int dscceComputeDelay( unsigned int bpc, double BPP, unsigned int sliceWidth, unsigned int numSlices, enum dml2_output_format_class pixelFormat, enum dml2_output_encoder_class Output) { … } //updated in dcn4 static unsigned int dscComputeDelay(enum dml2_output_format_class pixelFormat, enum dml2_output_encoder_class Output) { … } static unsigned int CalculateHostVMDynamicLevels( bool GPUVMEnable, bool HostVMEnable, unsigned int HostVMMinPageSize, unsigned int HostVMMaxNonCachedPageTableLevels) { … } static unsigned int CalculateVMAndRowBytes(struct dml2_core_shared_calculate_vm_and_row_bytes_params *p) { … } // CalculateVMAndRowBytes static unsigned int CalculatePrefetchSourceLines( double VRatio, unsigned int VTaps, bool Interlace, bool ProgressiveToInterlaceUnitInOPP, unsigned int SwathHeight, enum dml2_rotation_angle RotationAngle, bool mirrored, bool ViewportStationary, unsigned int SwathWidth, unsigned int ViewportHeight, unsigned int ViewportXStart, unsigned int ViewportYStart, // Output unsigned int *VInitPreFill, unsigned int *MaxNumSwath) { … } static void CalculateRowBandwidth( bool GPUVMEnable, bool use_one_row_for_frame, enum dml2_source_format_class SourcePixelFormat, double VRatio, double VRatioChroma, bool DCCEnable, double LineTime, unsigned int PixelPTEBytesPerRowLuma, unsigned int PixelPTEBytesPerRowChroma, unsigned int dpte_row_height_luma, unsigned int dpte_row_height_chroma, bool mrq_present, unsigned int meta_row_bytes_per_row_ub_l, unsigned int meta_row_bytes_per_row_ub_c, unsigned int meta_row_height_luma, unsigned int meta_row_height_chroma, // Output double *dpte_row_bw, double *meta_row_bw) { … } static void CalculateMALLUseForStaticScreen( const struct dml2_display_cfg *display_cfg, unsigned int NumberOfActiveSurfaces, unsigned int MALLAllocatedForDCN, unsigned int SurfaceSizeInMALL[], bool one_row_per_frame_fits_in_buffer[], // Output bool is_using_mall_for_ss[]) { … } static void CalculateDCCConfiguration( bool DCCEnabled, bool DCCProgrammingAssumesScanDirectionUnknown, enum dml2_source_format_class SourcePixelFormat, unsigned int SurfaceWidthLuma, unsigned int SurfaceWidthChroma, unsigned int SurfaceHeightLuma, unsigned int SurfaceHeightChroma, unsigned int nomDETInKByte, unsigned int RequestHeight256ByteLuma, unsigned int RequestHeight256ByteChroma, enum dml2_swizzle_mode TilingFormat, unsigned int BytePerPixelY, unsigned int BytePerPixelC, double BytePerPixelDETY, double BytePerPixelDETC, enum dml2_rotation_angle RotationAngle, // Output enum dml2_core_internal_request_type *RequestLuma, enum dml2_core_internal_request_type *RequestChroma, unsigned int *MaxUncompressedBlockLuma, unsigned int *MaxUncompressedBlockChroma, unsigned int *MaxCompressedBlockLuma, unsigned int *MaxCompressedBlockChroma, unsigned int *IndependentBlockLuma, unsigned int *IndependentBlockChroma) { … } static void calculate_mcache_row_bytes( struct dml2_core_internal_scratch *scratch, struct dml2_core_calcs_calculate_mcache_row_bytes_params *p) { … } static void calculate_mcache_setting( struct dml2_core_internal_scratch *scratch, struct dml2_core_calcs_calculate_mcache_setting_params *p) { … } static void calculate_mall_bw_overhead_factor( double mall_prefetch_sdp_overhead_factor[], //mall_sdp_oh_nom/pref double mall_prefetch_dram_overhead_factor[], //mall_dram_oh_nom/pref // input const struct dml2_display_cfg *display_cfg, unsigned int num_active_planes) { … } static double dml_get_return_bandwidth_available( const struct dml2_soc_bb *soc, enum dml2_core_internal_soc_state_type state_type, enum dml2_core_internal_bw_type bw_type, bool is_avg_bw, bool is_hvm_en, bool is_hvm_only, double dcflk_mhz, double fclk_mhz, double dram_bw_mbps) { … } static void calculate_bandwidth_available( double avg_bandwidth_available_min[dml2_core_internal_soc_state_max], double avg_bandwidth_available[dml2_core_internal_soc_state_max][dml2_core_internal_bw_max], double urg_bandwidth_available_min[dml2_core_internal_soc_state_max], // min between SDP and DRAM double urg_bandwidth_available[dml2_core_internal_soc_state_max][dml2_core_internal_bw_max], double urg_bandwidth_available_vm_only[dml2_core_internal_soc_state_max], double urg_bandwidth_available_pixel_and_vm[dml2_core_internal_soc_state_max], const struct dml2_soc_bb *soc, bool HostVMEnable, double dcfclk_mhz, double fclk_mhz, double dram_bw_mbps) { … } static void calculate_avg_bandwidth_required( double avg_bandwidth_required[dml2_core_internal_soc_state_max][dml2_core_internal_bw_max], // input const struct dml2_display_cfg *display_cfg, unsigned int num_active_planes, double ReadBandwidthLuma[], double ReadBandwidthChroma[], double cursor_bw[], double dcc_dram_bw_nom_overhead_factor_p0[], double dcc_dram_bw_nom_overhead_factor_p1[], double mall_prefetch_dram_overhead_factor[], double mall_prefetch_sdp_overhead_factor[]) { … } static void CalculateVMRowAndSwath(struct dml2_core_internal_scratch *scratch, struct dml2_core_calcs_CalculateVMRowAndSwath_params *p) { … } static double CalculateUrgentLatency( double UrgentLatencyPixelDataOnly, double UrgentLatencyPixelMixedWithVMData, double UrgentLatencyVMDataOnly, bool DoUrgentLatencyAdjustment, double UrgentLatencyAdjustmentFabricClockComponent, double UrgentLatencyAdjustmentFabricClockReference, double FabricClock, double uclk_freq_mhz, enum dml2_qos_param_type qos_type, unsigned int urgent_ramp_uclk_cycles, unsigned int df_qos_response_time_fclk_cycles, unsigned int max_round_trip_to_furthest_cs_fclk_cycles, unsigned int mall_overhead_fclk_cycles, double umc_urgent_ramp_latency_margin, double fabric_max_transport_latency_margin) { … } static double CalculateTripToMemory( double UrgLatency, double FabricClock, double uclk_freq_mhz, enum dml2_qos_param_type qos_type, unsigned int trip_to_memory_uclk_cycles, unsigned int max_round_trip_to_furthest_cs_fclk_cycles, unsigned int mall_overhead_fclk_cycles, double umc_max_latency_margin, double fabric_max_transport_latency_margin) { … } static double CalculateMetaTripToMemory( double UrgLatency, double FabricClock, double uclk_freq_mhz, enum dml2_qos_param_type qos_type, unsigned int meta_trip_to_memory_uclk_cycles, unsigned int meta_trip_to_memory_fclk_cycles, double umc_max_latency_margin, double fabric_max_transport_latency_margin) { … } static void calculate_cursor_req_attributes( unsigned int cursor_width, unsigned int cursor_bpp, // output unsigned int *cursor_lines_per_chunk, unsigned int *cursor_bytes_per_line, unsigned int *cursor_bytes_per_chunk, unsigned int *cursor_bytes) { … } static void calculate_cursor_urgent_burst_factor( unsigned int CursorBufferSize, unsigned int CursorWidth, unsigned int cursor_bytes_per_chunk, unsigned int cursor_lines_per_chunk, double LineTime, double UrgentLatency, double *UrgentBurstFactorCursor, bool *NotEnoughUrgentLatencyHiding) { … } static void CalculateUrgentBurstFactor( const struct dml2_plane_parameters *plane_cfg, unsigned int swath_width_luma_ub, unsigned int swath_width_chroma_ub, unsigned int SwathHeightY, unsigned int SwathHeightC, double LineTime, double UrgentLatency, double VRatio, double VRatioC, double BytePerPixelInDETY, double BytePerPixelInDETC, unsigned int DETBufferSizeY, unsigned int DETBufferSizeC, // Output double *UrgentBurstFactorLuma, double *UrgentBurstFactorChroma, bool *NotEnoughUrgentLatencyHiding) { … } static void CalculateDCFCLKDeepSleep( const struct dml2_display_cfg *display_cfg, unsigned int NumberOfActiveSurfaces, unsigned int BytePerPixelY[], unsigned int BytePerPixelC[], unsigned int SwathWidthY[], unsigned int SwathWidthC[], unsigned int DPPPerSurface[], double PSCL_THROUGHPUT[], double PSCL_THROUGHPUT_CHROMA[], double Dppclk[], double ReadBandwidthLuma[], double ReadBandwidthChroma[], unsigned int ReturnBusWidth, // Output double *DCFClkDeepSleep) { … } static double CalculateWriteBackDelay( enum dml2_source_format_class WritebackPixelFormat, double WritebackHRatio, double WritebackVRatio, unsigned int WritebackVTaps, unsigned int WritebackDestinationWidth, unsigned int WritebackDestinationHeight, unsigned int WritebackSourceHeight, unsigned int HTotal) { … } static unsigned int CalculateMaxVStartup( bool ptoi_supported, unsigned int vblank_nom_default_us, const struct dml2_timing_cfg *timing, double write_back_delay_us) { … } static void CalculateSwathAndDETConfiguration(struct dml2_core_internal_scratch *scratch, struct dml2_core_calcs_CalculateSwathAndDETConfiguration_params *p) { … } static enum dml2_odm_mode DecideODMMode(unsigned int HActive, double MaxDispclk, unsigned int MaximumPixelsPerLinePerDSCUnit, enum dml2_output_format_class OutFormat, bool UseDSC, unsigned int NumberOfDSCSlices, double SurfaceRequiredDISPCLKWithoutODMCombine, double SurfaceRequiredDISPCLKWithODMCombineTwoToOne, double SurfaceRequiredDISPCLKWithODMCombineThreeToOne, double SurfaceRequiredDISPCLKWithODMCombineFourToOne) { … } static void CalculateODMConstraints( enum dml2_odm_mode ODMUse, double SurfaceRequiredDISPCLKWithoutODMCombine, double SurfaceRequiredDISPCLKWithODMCombineTwoToOne, double SurfaceRequiredDISPCLKWithODMCombineThreeToOne, double SurfaceRequiredDISPCLKWithODMCombineFourToOne, unsigned int MaximumPixelsPerLinePerDSCUnit, /* Output */ double *DISPCLKRequired, unsigned int *NumberOfDPPRequired, unsigned int *MaxHActiveForDSC, unsigned int *MaxDSCSlices, unsigned int *MaxHActiveFor420) { … } static bool ValidateODMMode(enum dml2_odm_mode ODMMode, double MaxDispclk, unsigned int HActive, enum dml2_output_format_class OutFormat, bool UseDSC, unsigned int NumberOfDSCSlices, unsigned int TotalNumberOfActiveDPP, unsigned int MaxNumDPP, double DISPCLKRequired, unsigned int NumberOfDPPRequired, unsigned int MaxHActiveForDSC, unsigned int MaxDSCSlices, unsigned int MaxHActiveFor420) { … } static void CalculateODMMode( unsigned int MaximumPixelsPerLinePerDSCUnit, unsigned int HActive, enum dml2_output_format_class OutFormat, enum dml2_output_encoder_class Output, enum dml2_odm_mode ODMUse, double MaxDispclk, bool DSCEnable, unsigned int TotalNumberOfActiveDPP, unsigned int MaxNumDPP, double PixelClock, unsigned int NumberOfDSCSlices, // Output bool *TotalAvailablePipesSupport, unsigned int *NumberOfDPP, enum dml2_odm_mode *ODMMode, double *RequiredDISPCLKPerSurface) { … } static void CalculateOutputLink( struct dml2_core_internal_scratch *s, double PHYCLK, double PHYCLKD18, double PHYCLKD32, double Downspreading, enum dml2_output_encoder_class Output, enum dml2_output_format_class OutputFormat, unsigned int HTotal, unsigned int HActive, double PixelClockBackEnd, double ForcedOutputLinkBPP, unsigned int DSCInputBitPerComponent, unsigned int NumberOfDSCSlices, double AudioSampleRate, unsigned int AudioSampleLayout, enum dml2_odm_mode ODMModeNoDSC, enum dml2_odm_mode ODMModeDSC, enum dml2_dsc_enable_option DSCEnable, unsigned int OutputLinkDPLanes, enum dml2_output_link_dp_rate OutputLinkDPRate, // Output bool *RequiresDSC, bool *RequiresFEC, double *OutBpp, enum dml2_core_internal_output_type *OutputType, enum dml2_core_internal_output_type_rate *OutputRate, unsigned int *RequiredSlots) { … } static double CalculateWriteBackDISPCLK( enum dml2_source_format_class WritebackPixelFormat, double PixelClock, double WritebackHRatio, double WritebackVRatio, unsigned int WritebackHTaps, unsigned int WritebackVTaps, unsigned int WritebackSourceWidth, unsigned int WritebackDestinationWidth, unsigned int HTotal, unsigned int WritebackLineBufferSize) { … } static double RequiredDTBCLK( bool DSCEnable, double PixelClock, enum dml2_output_format_class OutputFormat, double OutputBpp, unsigned int DSCSlices, unsigned int HTotal, unsigned int HActive, unsigned int AudioRate, unsigned int AudioLayout) { … } static unsigned int DSCDelayRequirement( bool DSCEnabled, enum dml2_odm_mode ODMMode, unsigned int DSCInputBitPerComponent, double OutputBpp, unsigned int HActive, unsigned int HTotal, unsigned int NumberOfDSCSlices, enum dml2_output_format_class OutputFormat, enum dml2_output_encoder_class Output, double PixelClock, double PixelClockBackEnd) { … } static void CalculateSurfaceSizeInMall( const struct dml2_display_cfg *display_cfg, unsigned int NumberOfActiveSurfaces, unsigned int MALLAllocatedForDCN, unsigned int BytesPerPixelY[], unsigned int BytesPerPixelC[], unsigned int Read256BytesBlockWidthY[], unsigned int Read256BytesBlockWidthC[], unsigned int Read256BytesBlockHeightY[], unsigned int Read256BytesBlockHeightC[], unsigned int ReadBlockWidthY[], unsigned int ReadBlockWidthC[], unsigned int ReadBlockHeightY[], unsigned int ReadBlockHeightC[], // Output unsigned int SurfaceSizeInMALL[], bool *ExceededMALLSize) { … } static void calculate_tdlut_setting( struct dml2_core_internal_scratch *scratch, struct dml2_core_calcs_calculate_tdlut_setting_params *p) { … } static void CalculateTarb( const struct dml2_display_cfg *display_cfg, unsigned int PixelChunkSizeInKByte, unsigned int NumberOfActiveSurfaces, unsigned int NumberOfDPP[], unsigned int dpte_group_bytes[], unsigned int tdlut_bytes_per_group[], double HostVMInefficiencyFactor, double HostVMInefficiencyFactorPrefetch, unsigned int HostVMMinPageSize, double ReturnBW, unsigned int MetaChunkSize, // output double *Tarb, double *Tarb_prefetch) { … } static double CalculateTWait( long reserved_vblank_time_ns, double UrgentLatency, double Ttrip) { … } static void CalculateVUpdateAndDynamicMetadataParameters( unsigned int MaxInterDCNTileRepeaters, double Dppclk, double Dispclk, double DCFClkDeepSleep, double PixelClock, unsigned int HTotal, unsigned int VBlank, unsigned int DynamicMetadataTransmittedBytes, unsigned int DynamicMetadataLinesBeforeActiveRequired, unsigned int InterlaceEnable, bool ProgressiveToInterlaceUnitInOPP, // Output double *TSetup, double *Tdmbf, double *Tdmec, double *Tdmsks, unsigned int *VUpdateOffsetPix, unsigned int *VUpdateWidthPix, unsigned int *VReadyOffsetPix) { … } static double get_urgent_bandwidth_required( struct dml2_core_shared_get_urgent_bandwidth_required_locals *l, const struct dml2_display_cfg *display_cfg, enum dml2_core_internal_soc_state_type state_type, enum dml2_core_internal_bw_type bw_type, bool inc_flip_bw, // including flip bw bool use_qual_row_bw, unsigned int NumberOfActiveSurfaces, unsigned int NumberOfDPP[], double dcc_dram_bw_nom_overhead_factor_p0[], double dcc_dram_bw_nom_overhead_factor_p1[], double dcc_dram_bw_pref_overhead_factor_p0[], double dcc_dram_bw_pref_overhead_factor_p1[], double mall_prefetch_sdp_overhead_factor[], double mall_prefetch_dram_overhead_factor[], double ReadBandwidthLuma[], double ReadBandwidthChroma[], double PrefetchBandwidthLuma[], double PrefetchBandwidthChroma[], double excess_vactive_fill_bw_l[], double excess_vactive_fill_bw_c[], double cursor_bw[], double dpte_row_bw[], double meta_row_bw[], double prefetch_cursor_bw[], double prefetch_vmrow_bw[], double flip_bw[], double UrgentBurstFactorLuma[], double UrgentBurstFactorChroma[], double UrgentBurstFactorCursor[], double UrgentBurstFactorLumaPre[], double UrgentBurstFactorChromaPre[], double UrgentBurstFactorCursorPre[], /* outputs */ double surface_required_bw[], double surface_peak_required_bw[]) { … } static void CalculateExtraLatency( const struct dml2_display_cfg *display_cfg, unsigned int ROBBufferSizeInKByte, unsigned int RoundTripPingLatencyCycles, unsigned int ReorderingBytes, double DCFCLK, double FabricClock, unsigned int PixelChunkSizeInKByte, double ReturnBW, unsigned int NumberOfActiveSurfaces, unsigned int NumberOfDPP[], unsigned int dpte_group_bytes[], unsigned int tdlut_bytes_per_group[], double HostVMInefficiencyFactor, double HostVMInefficiencyFactorPrefetch, unsigned int HostVMMinPageSize, enum dml2_qos_param_type qos_type, bool max_oustanding_when_urgent_expected, unsigned int max_outstanding_requests, unsigned int request_size_bytes_luma[], unsigned int request_size_bytes_chroma[], unsigned int MetaChunkSize, unsigned int dchub_arb_to_ret_delay, double Ttrip, unsigned int hostvm_mode, // output double *ExtraLatency, // Tex double *ExtraLatency_sr, // Tex_sr double *ExtraLatencyPrefetch) { … } static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch, struct dml2_core_calcs_CalculatePrefetchSchedule_params *p) { … } static void calculate_peak_bandwidth_required( struct dml2_core_internal_scratch *s, struct dml2_core_calcs_calculate_peak_bandwidth_required_params *p) { … } static void check_urgent_bandwidth_support( double *frac_urg_bandwidth_nom, double *frac_urg_bandwidth_mall, bool *vactive_bandwidth_support_ok, // vactive ok bool *bandwidth_support_ok, // max of vm, prefetch, vactive all ok unsigned int mall_allocated_for_dcn_mbytes, double non_urg_bandwidth_required[dml2_core_internal_soc_state_max][dml2_core_internal_bw_max], double urg_vactive_bandwidth_required[dml2_core_internal_soc_state_max][dml2_core_internal_bw_max], double urg_bandwidth_required[dml2_core_internal_soc_state_max][dml2_core_internal_bw_max], double urg_bandwidth_available[dml2_core_internal_soc_state_max][dml2_core_internal_bw_max]) { … } static double get_bandwidth_available_for_immediate_flip(enum dml2_core_internal_soc_state_type eval_state, double urg_bandwidth_required[dml2_core_internal_soc_state_max][dml2_core_internal_bw_max], // no flip double urg_bandwidth_available[dml2_core_internal_soc_state_max][dml2_core_internal_bw_max]) { … } static void calculate_immediate_flip_bandwidth_support( // Output double *frac_urg_bandwidth_flip, bool *flip_bandwidth_support_ok, // Input enum dml2_core_internal_soc_state_type eval_state, double urg_bandwidth_required_flip[dml2_core_internal_soc_state_max][dml2_core_internal_bw_max], double non_urg_bandwidth_required_flip[dml2_core_internal_soc_state_max][dml2_core_internal_bw_max], double urg_bandwidth_available[dml2_core_internal_soc_state_max][dml2_core_internal_bw_max]) { … } static void CalculateFlipSchedule( struct dml2_core_internal_scratch *s, bool iflip_enable, bool use_lb_flip_bw, double HostVMInefficiencyFactor, double Tvm_trips_flip, double Tr0_trips_flip, double Tvm_trips_flip_rounded, double Tr0_trips_flip_rounded, bool GPUVMEnable, double vm_bytes, // vm_bytes double DPTEBytesPerRow, // dpte_row_bytes double BandwidthAvailableForImmediateFlip, unsigned int TotImmediateFlipBytes, enum dml2_source_format_class SourcePixelFormat, double LineTime, double VRatio, double VRatioChroma, double Tno_bw_flip, unsigned int dpte_row_height, unsigned int dpte_row_height_chroma, bool use_one_row_for_frame_flip, unsigned int max_flip_time_us, unsigned int per_pipe_flip_bytes, unsigned int meta_row_bytes, unsigned int meta_row_height, unsigned int meta_row_height_chroma, bool dcc_mrq_enable, // Output double *dst_y_per_vm_flip, double *dst_y_per_row_flip, double *final_flip_bw, bool *ImmediateFlipSupportedForPipe) { … } static void CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport( struct dml2_core_internal_scratch *scratch, struct dml2_core_calcs_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport_params *p) { … } static void calculate_bytes_to_fetch_required_to_hide_latency( struct dml2_core_calcs_calculate_bytes_to_fetch_required_to_hide_latency_params *p) { … } static void calculate_vactive_det_fill_latency( const struct dml2_display_cfg *display_cfg, unsigned int num_active_planes, unsigned int bytes_required_l[], unsigned int bytes_required_c[], double dcc_dram_bw_nom_overhead_factor_p0[], double dcc_dram_bw_nom_overhead_factor_p1[], double surface_read_bw_l[], double surface_read_bw_c[], double (*surface_avg_vactive_required_bw)[dml2_core_internal_bw_max][DML2_MAX_PLANES], double (*surface_peak_required_bw)[dml2_core_internal_bw_max][DML2_MAX_PLANES], /* output */ double vactive_det_fill_delay_us[]) { … } static void calculate_excess_vactive_bandwidth_required( const struct dml2_display_cfg *display_cfg, unsigned int num_active_planes, unsigned int bytes_required_l[], unsigned int bytes_required_c[], /* outputs */ double excess_vactive_fill_bw_l[], double excess_vactive_fill_bw_c[]) { … } static double uclk_khz_to_dram_bw_mbps(unsigned long uclk_khz, const struct dml2_dram_params *dram_config) { … } static double dram_bw_kbps_to_uclk_mhz(unsigned long long bw_kbps, const struct dml2_dram_params *dram_config) { … } static unsigned int get_qos_param_index(unsigned long uclk_freq_khz, const struct dml2_dcn4_uclk_dpm_dependent_qos_params *per_uclk_dpm_params) { … } static unsigned int get_active_min_uclk_dpm_index(unsigned long uclk_freq_khz, const struct dml2_soc_state_table *clk_table) { … } static unsigned int get_pipe_flip_bytes( double hostvm_inefficiency_factor, unsigned int vm_bytes, unsigned int dpte_row_bytes, unsigned int meta_row_bytes) { … } static void calculate_hostvm_inefficiency_factor( double *HostVMInefficiencyFactor, double *HostVMInefficiencyFactorPrefetch, bool gpuvm_enable, bool hostvm_enable, unsigned int remote_iommu_outstanding_translations, unsigned int max_outstanding_reqs, double urg_bandwidth_avail_active_pixel_and_vm, double urg_bandwidth_avail_active_vm_only) { … } struct dml2_core_internal_g6_temp_read_blackouts_table { … }; struct dml2_core_internal_g6_temp_read_blackouts_table core_dcn4_g6_temp_read_blackout_table = …; static double get_g6_temp_read_blackout_us( struct dml2_soc_bb *soc, unsigned int uclk_freq_khz, unsigned int min_clk_index) { … } static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out_params) { … } unsigned int dml2_core_calcs_mode_support_ex(struct dml2_core_calcs_mode_support_ex *in_out_params) { … } static void CalculatePixelDeliveryTimes( const struct dml2_display_cfg *display_cfg, const struct core_display_cfg_support_info *cfg_support_info, unsigned int NumberOfActiveSurfaces, double VRatioPrefetchY[], double VRatioPrefetchC[], unsigned int swath_width_luma_ub[], unsigned int swath_width_chroma_ub[], double PSCL_THROUGHPUT[], double PSCL_THROUGHPUT_CHROMA[], double Dppclk[], unsigned int BytePerPixelC[], unsigned int req_per_swath_ub_l[], unsigned int req_per_swath_ub_c[], // Output double DisplayPipeLineDeliveryTimeLuma[], double DisplayPipeLineDeliveryTimeChroma[], double DisplayPipeLineDeliveryTimeLumaPrefetch[], double DisplayPipeLineDeliveryTimeChromaPrefetch[], double DisplayPipeRequestDeliveryTimeLuma[], double DisplayPipeRequestDeliveryTimeChroma[], double DisplayPipeRequestDeliveryTimeLumaPrefetch[], double DisplayPipeRequestDeliveryTimeChromaPrefetch[]) { … } static void CalculateMetaAndPTETimes(struct dml2_core_shared_CalculateMetaAndPTETimes_params *p) { … } // CalculateMetaAndPTETimes static void CalculateVMGroupAndRequestTimes( const struct dml2_display_cfg *display_cfg, unsigned int NumberOfActiveSurfaces, unsigned int BytePerPixelC[], double dst_y_per_vm_vblank[], double dst_y_per_vm_flip[], unsigned int dpte_row_width_luma_ub[], unsigned int dpte_row_width_chroma_ub[], unsigned int vm_group_bytes[], unsigned int dpde0_bytes_per_frame_ub_l[], unsigned int dpde0_bytes_per_frame_ub_c[], unsigned int tdlut_pte_bytes_per_frame[], unsigned int meta_pte_bytes_per_frame_ub_l[], unsigned int meta_pte_bytes_per_frame_ub_c[], bool mrq_present, // Output double TimePerVMGroupVBlank[], double TimePerVMGroupFlip[], double TimePerVMRequestVBlank[], double TimePerVMRequestFlip[]) { … } static void CalculateStutterEfficiency(struct dml2_core_internal_scratch *scratch, struct dml2_core_calcs_CalculateStutterEfficiency_params *p) { … } static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex *in_out_params) { … } bool dml2_core_calcs_mode_programming_ex(struct dml2_core_calcs_mode_programming_ex *in_out_params) { … } void dml2_core_calcs_get_dpte_row_height( unsigned int *dpte_row_height, struct dml2_core_internal_display_mode_lib *mode_lib, bool is_plane1, enum dml2_source_format_class SourcePixelFormat, enum dml2_swizzle_mode SurfaceTiling, enum dml2_rotation_angle ScanDirection, unsigned int pitch, unsigned int GPUVMMinPageSizeKBytes) { … } static bool is_dual_plane(enum dml2_source_format_class source_format) { … } static unsigned int dml_get_plane_idx(const struct dml2_core_internal_display_mode_lib *mode_lib, unsigned int pipe_idx) { … } static void rq_dlg_get_wm_regs(const struct dml2_display_cfg *display_cfg, const struct dml2_core_internal_display_mode_lib *mode_lib, struct dml2_dchub_watermark_regs *wm_regs) { … } static unsigned int log_and_substract_if_non_zero(unsigned int a, unsigned int subtrahend) { … } void dml2_core_calcs_cursor_dlg_reg(struct dml2_cursor_dlg_regs *cursor_dlg_regs, const struct dml2_get_cursor_dlg_reg *p) { … } static void rq_dlg_get_rq_reg(struct dml2_display_rq_regs *rq_regs, const struct dml2_display_cfg *display_cfg, const struct dml2_core_internal_display_mode_lib *mode_lib, unsigned int pipe_idx) { … } static void rq_dlg_get_dlg_reg( struct dml2_core_internal_scratch *s, struct dml2_display_dlg_regs *disp_dlg_regs, struct dml2_display_ttu_regs *disp_ttu_regs, const struct dml2_display_cfg *display_cfg, const struct dml2_core_internal_display_mode_lib *mode_lib, const unsigned int pipe_idx) { … } static void rq_dlg_get_arb_params(const struct dml2_display_cfg *display_cfg, const struct dml2_core_internal_display_mode_lib *mode_lib, struct dml2_display_arb_regs *arb_param) { … } void dml2_core_calcs_get_watermarks(const struct dml2_display_cfg *display_cfg, const struct dml2_core_internal_display_mode_lib *mode_lib, struct dml2_dchub_watermark_regs *out) { … } void dml2_core_calcs_get_arb_params(const struct dml2_display_cfg *display_cfg, const struct dml2_core_internal_display_mode_lib *mode_lib, struct dml2_display_arb_regs *out) { … } void dml2_core_calcs_get_pipe_regs(const struct dml2_display_cfg *display_cfg, struct dml2_core_internal_display_mode_lib *mode_lib, struct dml2_dchub_per_pipe_register_set *out, int pipe_index) { … } void dml2_core_calcs_get_global_sync_programming(const struct dml2_core_internal_display_mode_lib *mode_lib, union dml2_global_sync_programming *out, int pipe_index) { … } void dml2_core_calcs_get_stream_programming(const struct dml2_core_internal_display_mode_lib *mode_lib, struct dml2_per_stream_programming *out, int pipe_index) { … } void dml2_core_calcs_get_stream_fams2_programming(const struct dml2_core_internal_display_mode_lib *mode_lib, const struct display_configuation_with_meta *display_cfg, struct dmub_fams2_stream_static_state *fams2_programming, enum dml2_uclk_pstate_support_method pstate_method, int plane_index) { … } void dml2_core_calcs_get_mcache_allocation(const struct dml2_core_internal_display_mode_lib *mode_lib, struct dml2_mcache_surface_allocation *out, int plane_idx) { … } void dml2_core_calcs_get_mall_allocation(struct dml2_core_internal_display_mode_lib *mode_lib, unsigned int *out, int pipe_index) { … } void dml2_core_calcs_get_plane_support_info(const struct dml2_display_cfg *display_cfg, const struct dml2_core_internal_display_mode_lib *mode_lib, struct core_plane_support_info *out, int plane_idx) { … } void dml2_core_calcs_get_stream_support_info(const struct dml2_display_cfg *display_cfg, const struct dml2_core_internal_display_mode_lib *mode_lib, struct core_stream_support_info *out, int plane_index) { … } void dml2_core_calcs_get_informative(const struct dml2_core_internal_display_mode_lib *mode_lib, struct dml2_display_cfg_programming *out) { … }
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