// SPDX-License-Identifier: GPL-2.0 #include <linux/delay.h> #include <linux/device.h> #include <linux/err.h> #include <linux/errno.h> #include <linux/gpio/consumer.h> #include <linux/kernel.h> #include <linux/mod_devicetable.h> #include <linux/module.h> #include <linux/property.h> #include <linux/regulator/consumer.h> #include <drm/drm_mipi_dsi.h> #include <drm/drm_modes.h> #include <drm/drm_panel.h> #include <drm/drm_probe_helper.h> #include <video/mipi_display.h> struct panel_desc { … }; struct ili9806e_panel { … }; static const char * const regulator_names[] = …; static inline struct ili9806e_panel *to_ili9806e_panel(struct drm_panel *panel) { … } static int ili9806e_power_on(struct ili9806e_panel *ctx) { … } static int ili9806e_power_off(struct ili9806e_panel *ctx) { … } static int ili9806e_on(struct ili9806e_panel *ili9806e) { … } static int ili9806e_off(struct ili9806e_panel *panel) { … } static int ili9806e_prepare(struct drm_panel *panel) { … } static int ili9806e_unprepare(struct drm_panel *panel) { … } static int ili9806e_get_modes(struct drm_panel *panel, struct drm_connector *connector) { … } static enum drm_panel_orientation ili9806e_get_orientation(struct drm_panel *panel) { … } static const struct drm_panel_funcs ili9806e_funcs = …; static int ili9806e_dsi_probe(struct mipi_dsi_device *dsi) { … } static void ili9806e_dsi_remove(struct mipi_dsi_device *dsi) { … } static void com35h3p70ulc_init(struct mipi_dsi_multi_context *ctx) { /* Switch to page 1 */ mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0xff, 0x98, 0x06, 0x04, 0x01); /* Interface Settings */ mipi_dsi_dcs_write_seq_multi(ctx, 0x08, 0x18); mipi_dsi_dcs_write_seq_multi(ctx, 0x21, 0x01); /* Panel Settings */ mipi_dsi_dcs_write_seq_multi(ctx, 0x30, 0x03); mipi_dsi_dcs_write_seq_multi(ctx, 0x31, 0x00); mipi_dsi_dcs_write_seq_multi(ctx, 0x60, 0x0d); mipi_dsi_dcs_write_seq_multi(ctx, 0x61, 0x08); mipi_dsi_dcs_write_seq_multi(ctx, 0x62, 0x08); mipi_dsi_dcs_write_seq_multi(ctx, 0x63, 0x09); /* Power Control */ mipi_dsi_dcs_write_seq_multi(ctx, 0x40, 0x30); mipi_dsi_dcs_write_seq_multi(ctx, 0x41, 0x44); mipi_dsi_dcs_write_seq_multi(ctx, 0x42, 0x00); mipi_dsi_dcs_write_seq_multi(ctx, 0x43, 0x89); mipi_dsi_dcs_write_seq_multi(ctx, 0x44, 0x8e); mipi_dsi_dcs_write_seq_multi(ctx, 0x45, 0xd9); mipi_dsi_dcs_write_seq_multi(ctx, 0x46, 0x33); mipi_dsi_dcs_write_seq_multi(ctx, 0x47, 0x33); mipi_dsi_dcs_write_seq_multi(ctx, 0x50, 0x90); mipi_dsi_dcs_write_seq_multi(ctx, 0x51, 0x90); mipi_dsi_dcs_write_seq_multi(ctx, 0x56, 0x00); /* Gamma Settings */ mipi_dsi_dcs_write_seq_multi(ctx, 0xa0, 0x00); mipi_dsi_dcs_write_seq_multi(ctx, 0xa1, 0x0c); mipi_dsi_dcs_write_seq_multi(ctx, 0xa2, 0x13); mipi_dsi_dcs_write_seq_multi(ctx, 0xa3, 0x0f); mipi_dsi_dcs_write_seq_multi(ctx, 0xa4, 0x0a); mipi_dsi_dcs_write_seq_multi(ctx, 0xa5, 0x0d); mipi_dsi_dcs_write_seq_multi(ctx, 0xa6, 0x0c); mipi_dsi_dcs_write_seq_multi(ctx, 0xa7, 0x0b); mipi_dsi_dcs_write_seq_multi(ctx, 0xa8, 0x01); mipi_dsi_dcs_write_seq_multi(ctx, 0xa9, 0x06); mipi_dsi_dcs_write_seq_multi(ctx, 0xaa, 0x15); mipi_dsi_dcs_write_seq_multi(ctx, 0xab, 0x07); mipi_dsi_dcs_write_seq_multi(ctx, 0xac, 0x12); mipi_dsi_dcs_write_seq_multi(ctx, 0xad, 0x28); mipi_dsi_dcs_write_seq_multi(ctx, 0xae, 0x20); mipi_dsi_dcs_write_seq_multi(ctx, 0xaf, 0x14); mipi_dsi_dcs_write_seq_multi(ctx, 0xc0, 0x00); mipi_dsi_dcs_write_seq_multi(ctx, 0xc1, 0x0c); mipi_dsi_dcs_write_seq_multi(ctx, 0xc2, 0x13); mipi_dsi_dcs_write_seq_multi(ctx, 0xc3, 0x0f); mipi_dsi_dcs_write_seq_multi(ctx, 0xc4, 0x09); mipi_dsi_dcs_write_seq_multi(ctx, 0xc5, 0x0d); mipi_dsi_dcs_write_seq_multi(ctx, 0xc6, 0x0c); mipi_dsi_dcs_write_seq_multi(ctx, 0xc7, 0x0b); mipi_dsi_dcs_write_seq_multi(ctx, 0xc8, 0x01); mipi_dsi_dcs_write_seq_multi(ctx, 0xc9, 0x06); mipi_dsi_dcs_write_seq_multi(ctx, 0xca, 0x14); mipi_dsi_dcs_write_seq_multi(ctx, 0xcb, 0x07); mipi_dsi_dcs_write_seq_multi(ctx, 0xcc, 0x0f); mipi_dsi_dcs_write_seq_multi(ctx, 0xcd, 0x21); mipi_dsi_dcs_write_seq_multi(ctx, 0xce, 0x17); mipi_dsi_dcs_write_seq_multi(ctx, 0xcf, 0x0a); /* Switch to page 7 */ mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0xff, 0x98, 0x06, 0x04, 0x07); /* Power Control */ mipi_dsi_dcs_write_seq_multi(ctx, 0x06, 0x00); mipi_dsi_dcs_write_seq_multi(ctx, 0x18, 0x1d); mipi_dsi_dcs_write_seq_multi(ctx, 0x17, 0x32); /* Switch to page 6 */ mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0xff, 0x98, 0x06, 0x04, 0x06); /* GIP settings */ mipi_dsi_dcs_write_seq_multi(ctx, 0x00, 0x20); mipi_dsi_dcs_write_seq_multi(ctx, 0x01, 0x02); mipi_dsi_dcs_write_seq_multi(ctx, 0x02, 0x00); mipi_dsi_dcs_write_seq_multi(ctx, 0x03, 0x02); mipi_dsi_dcs_write_seq_multi(ctx, 0x04, 0x01); mipi_dsi_dcs_write_seq_multi(ctx, 0x05, 0x01); mipi_dsi_dcs_write_seq_multi(ctx, 0x06, 0x88); mipi_dsi_dcs_write_seq_multi(ctx, 0x07, 0x04); mipi_dsi_dcs_write_seq_multi(ctx, 0x08, 0x03); mipi_dsi_dcs_write_seq_multi(ctx, 0x09, 0x80); mipi_dsi_dcs_write_seq_multi(ctx, 0x0a, 0x00); mipi_dsi_dcs_write_seq_multi(ctx, 0x0b, 0x00); mipi_dsi_dcs_write_seq_multi(ctx, 0x0c, 0x01); mipi_dsi_dcs_write_seq_multi(ctx, 0x0d, 0x01); mipi_dsi_dcs_write_seq_multi(ctx, 0x0e, 0x00); mipi_dsi_dcs_write_seq_multi(ctx, 0x0f, 0x00); mipi_dsi_dcs_write_seq_multi(ctx, 0x10, 0x55); mipi_dsi_dcs_write_seq_multi(ctx, 0x11, 0x50); mipi_dsi_dcs_write_seq_multi(ctx, 0x12, 0x01); mipi_dsi_dcs_write_seq_multi(ctx, 0x13, 0x00); mipi_dsi_dcs_write_seq_multi(ctx, 0x14, 0x00); mipi_dsi_dcs_write_seq_multi(ctx, 0x15, 0x43); mipi_dsi_dcs_write_seq_multi(ctx, 0x16, 0x0b); mipi_dsi_dcs_write_seq_multi(ctx, 0x17, 0x00); mipi_dsi_dcs_write_seq_multi(ctx, 0x18, 0x00); mipi_dsi_dcs_write_seq_multi(ctx, 0x19, 0x10); mipi_dsi_dcs_write_seq_multi(ctx, 0x1a, 0x00); mipi_dsi_dcs_write_seq_multi(ctx, 0x1b, 0x00); mipi_dsi_dcs_write_seq_multi(ctx, 0x1c, 0x00); mipi_dsi_dcs_write_seq_multi(ctx, 0x1d, 0x00); mipi_dsi_dcs_write_seq_multi(ctx, 0x20, 0x01); mipi_dsi_dcs_write_seq_multi(ctx, 0x21, 0x23); mipi_dsi_dcs_write_seq_multi(ctx, 0x22, 0x45); mipi_dsi_dcs_write_seq_multi(ctx, 0x23, 0x67); mipi_dsi_dcs_write_seq_multi(ctx, 0x24, 0x01); mipi_dsi_dcs_write_seq_multi(ctx, 0x25, 0x23); mipi_dsi_dcs_write_seq_multi(ctx, 0x26, 0x45); mipi_dsi_dcs_write_seq_multi(ctx, 0x27, 0x67); mipi_dsi_dcs_write_seq_multi(ctx, 0x30, 0x02); mipi_dsi_dcs_write_seq_multi(ctx, 0x31, 0x22); mipi_dsi_dcs_write_seq_multi(ctx, 0x32, 0x22); mipi_dsi_dcs_write_seq_multi(ctx, 0x33, 0x88); mipi_dsi_dcs_write_seq_multi(ctx, 0x34, 0xaa); mipi_dsi_dcs_write_seq_multi(ctx, 0x35, 0xbb); mipi_dsi_dcs_write_seq_multi(ctx, 0x36, 0x66); mipi_dsi_dcs_write_seq_multi(ctx, 0x37, 0x22); mipi_dsi_dcs_write_seq_multi(ctx, 0x38, 0x22); mipi_dsi_dcs_write_seq_multi(ctx, 0x39, 0x22); mipi_dsi_dcs_write_seq_multi(ctx, 0x3a, 0x22); mipi_dsi_dcs_write_seq_multi(ctx, 0x3b, 0x22); mipi_dsi_dcs_write_seq_multi(ctx, 0x3c, 0x22); mipi_dsi_dcs_write_seq_multi(ctx, 0x3d, 0x22); mipi_dsi_dcs_write_seq_multi(ctx, 0x3e, 0x22); mipi_dsi_dcs_write_seq_multi(ctx, 0x3f, 0x22); mipi_dsi_dcs_write_seq_multi(ctx, 0x40, 0x22); mipi_dsi_dcs_write_seq_multi(ctx, 0x53, 0x12); /* Switch to page 0 */ mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0xff, 0x98, 0x06, 0x04, 0x00); /* Interface Pixel format */ mipi_dsi_dcs_write_seq_multi(ctx, 0x3a, 0x60); }; static const struct drm_display_mode com35h3p70ulc_default_mode = …; static const struct panel_desc com35h3p70ulc_desc = …; static const struct of_device_id ili9806e_of_match[] = …; MODULE_DEVICE_TABLE(of, ili9806e_of_match); static struct mipi_dsi_driver ili9806e_dsi_driver = …; module_mipi_dsi_driver(…) …; MODULE_AUTHOR(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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