dmub_dcn401.h | Explore in Territory

// SPDX-License-Identifier: MIT
//
// Copyright 2024 Advanced Micro Devices, Inc.

#ifndef _DMUB_DCN401_H_
#define _DMUB_DCN401_H_

#include "dmub_dcn31.h"

struct dmub_srv;

/* DCN401 register definitions. */

#define DMUB_DCN401_REGS() …

#define DMUB_DCN401_FIELDS() …

struct dmub_srv_dcn401_reg_offset { … };

struct dmub_srv_dcn401_reg_shift { … };

struct dmub_srv_dcn401_reg_mask { … };

struct dmub_srv_dcn401_regs { … };

extern const struct dmub_srv_dcn401_regs dmub_srv_dcn401_regs;

void dmub_dcn401_reset(struct dmub_srv *dmub);

void dmub_dcn401_reset_release(struct dmub_srv *dmub);

void dmub_dcn401_backdoor_load(struct dmub_srv *dmub,
			      const struct dmub_window *cw0,
			      const struct dmub_window *cw1);

void dmub_dcn401_backdoor_load_zfb_mode(struct dmub_srv *dmub,
		      const struct dmub_window *cw0,
		      const struct dmub_window *cw1);

void dmub_dcn401_setup_windows(struct dmub_srv *dmub,
			      const struct dmub_window *cw2,
			      const struct dmub_window *cw3,
			      const struct dmub_window *cw4,
			      const struct dmub_window *cw5,
			      const struct dmub_window *cw6,
			      const struct dmub_window *region6);

void dmub_dcn401_setup_mailbox(struct dmub_srv *dmub,
			      const struct dmub_region *inbox1);

uint32_t dmub_dcn401_get_inbox1_wptr(struct dmub_srv *dmub);

uint32_t dmub_dcn401_get_inbox1_rptr(struct dmub_srv *dmub);

void dmub_dcn401_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset);

void dmub_dcn401_setup_out_mailbox(struct dmub_srv *dmub,
			      const struct dmub_region *outbox1);

uint32_t dmub_dcn401_get_outbox1_wptr(struct dmub_srv *dmub);

void dmub_dcn401_set_outbox1_rptr(struct dmub_srv *dmub, uint32_t rptr_offset);

bool dmub_dcn401_is_hw_init(struct dmub_srv *dmub);

bool dmub_dcn401_is_supported(struct dmub_srv *dmub);

void dmub_dcn401_set_gpint(struct dmub_srv *dmub,
			  union dmub_gpint_data_register reg);

bool dmub_dcn401_is_gpint_acked(struct dmub_srv *dmub,
			       union dmub_gpint_data_register reg);

uint32_t dmub_dcn401_get_gpint_response(struct dmub_srv *dmub);

uint32_t dmub_dcn401_get_gpint_dataout(struct dmub_srv *dmub);

void dmub_dcn401_enable_dmub_boot_options(struct dmub_srv *dmub, const struct dmub_srv_hw_params *params);

void dmub_dcn401_skip_dmub_panel_power_sequence(struct dmub_srv *dmub, bool skip);

union dmub_fw_boot_status dmub_dcn401_get_fw_boot_status(struct dmub_srv *dmub);

void dmub_dcn401_setup_outbox0(struct dmub_srv *dmub,
			      const struct dmub_region *outbox0);

uint32_t dmub_dcn401_get_outbox0_wptr(struct dmub_srv *dmub);

void dmub_dcn401_set_outbox0_rptr(struct dmub_srv *dmub, uint32_t rptr_offset);

uint32_t dmub_dcn401_get_current_time(struct dmub_srv *dmub);

void dmub_dcn401_get_diagnostic_data(struct dmub_srv *dmub, struct dmub_diagnostic_data *diag_data);

void dmub_dcn401_configure_dmub_in_system_memory(struct dmub_srv *dmub);
void dmub_dcn401_send_inbox0_cmd(struct dmub_srv *dmub, union dmub_inbox0_data_register data);
void dmub_dcn401_clear_inbox0_ack_register(struct dmub_srv *dmub);
uint32_t dmub_dcn401_read_inbox0_ack_register(struct dmub_srv *dmub);

void dmub_dcn401_send_reg_inbox0_cmd_msg(struct dmub_srv *dmub,
		union dmub_rb_cmd *cmd);
uint32_t dmub_dcn401_read_reg_inbox0_rsp_int_status(struct dmub_srv *dmub);
void dmub_dcn401_read_reg_inbox0_cmd_rsp(struct dmub_srv *dmub,
		union dmub_rb_cmd *cmd);
void dmub_dcn401_write_reg_inbox0_rsp_int_ack(struct dmub_srv *dmub);
void dmub_dcn401_write_reg_outbox0_rdy_int_ack(struct dmub_srv *dmub);
void dmub_dcn401_read_reg_outbox0_msg(struct dmub_srv *dmub, uint32_t *msg);
void dmub_dcn401_write_reg_outbox0_rsp(struct dmub_srv *dmub, uint32_t *msg);
uint32_t dmub_dcn401_read_reg_outbox0_rsp_int_status(struct dmub_srv *dmub);
void dmub_dcn401_enable_reg_inbox0_rsp_int(struct dmub_srv *dmub, bool enable);
void dmub_dcn401_enable_reg_outbox0_rdy_int(struct dmub_srv *dmub, bool enable);
uint32_t dmub_dcn401_read_reg_outbox0_rdy_int_status(struct dmub_srv *dmub);

#endif /* _DMUB_DCN401_H_ */
linux/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h
