/* * Copyright 2017 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: AMD * */ #ifndef __IRQSRCS_GFX_9_0_H__ #define __IRQSRCS_GFX_9_0_H__ #define GFX_9_0__SRCID__CP_RB_INTERRUPT_PKT … #define GFX_9_0__SRCID__CP_IB1_INTERRUPT_PKT … #define GFX_9_0__SRCID__CP_IB2_INTERRUPT_PKT … #define GFX_9_0__SRCID__CP_PM4_PKT_RSVD_BIT_ERROR … #define GFX_9_0__SRCID__CP_EOP_INTERRUPT … #define GFX_9_0__SRCID__CP_BAD_OPCODE_ERROR … #define GFX_9_0__SRCID__CP_PRIV_REG_FAULT … #define GFX_9_0__SRCID__CP_PRIV_INSTR_FAULT … #define GFX_9_0__SRCID__CP_WAIT_MEM_SEM_FAULT … #define GFX_9_0__SRCID__CP_CTX_EMPTY_INTERRUPT … #define GFX_9_0__SRCID__CP_CTX_BUSY_INTERRUPT … #define GFX_9_0__SRCID__CP_ME_WAIT_REG_MEM_POLL_TIMEOUT … #define GFX_9_0__SRCID__CP_SIG_INCOMPLETE … #define GFX_9_0__SRCID__CP_PREEMPT_ACK … #define GFX_9_0__SRCID__CP_GPF … #define GFX_9_0__SRCID__CP_GDS_ALLOC_ERROR … #define GFX_9_0__SRCID__CP_ECC_ERROR … #define GFX_9_0__SRCID__CP_COMPUTE_QUERY_STATUS … #define GFX_9_0__SRCID__CP_VM_DOORBELL … #define GFX_9_0__SRCID__CP_FUE_ERROR … #define GFX_9_0__SRCID__RLC_STRM_PERF_MONITOR_INTERRUPT … #define GFX_9_0__SRCID__GRBM_RD_TIMEOUT_ERROR … #define GFX_9_0__SRCID__GRBM_REG_GUI_IDLE … #define GFX_9_0__SRCID__SQ_INTERRUPT_ID … #endif /* __IRQSRCS_GFX_9_0_H__ */
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