#include "amdgpu.h"
#include "gfxhub_v3_0_3.h"
#include "gc/gc_11_0_3_offset.h"
#include "gc/gc_11_0_3_sh_mask.h"
#include "navi10_enum.h"
#include "soc15_common.h"
#define regGCVM_L2_CNTL3_DEFAULT …
#define regGCVM_L2_CNTL4_DEFAULT …
#define regGCVM_L2_CNTL5_DEFAULT …
static const char * const gfxhub_client_ids[] = …;
static uint32_t gfxhub_v3_0_3_get_invalidate_req(unsigned int vmid,
uint32_t flush_type)
{ … }
static void
gfxhub_v3_0_3_print_l2_protection_fault_status(struct amdgpu_device *adev,
uint32_t status)
{ … }
static u64 gfxhub_v3_0_3_get_fb_location(struct amdgpu_device *adev)
{ … }
static u64 gfxhub_v3_0_3_get_mc_fb_offset(struct amdgpu_device *adev)
{ … }
static void gfxhub_v3_0_3_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
uint64_t page_table_base)
{ … }
static void gfxhub_v3_0_3_init_gart_aperture_regs(struct amdgpu_device *adev)
{ … }
static void gfxhub_v3_0_3_init_system_aperture_regs(struct amdgpu_device *adev)
{ … }
static void gfxhub_v3_0_3_init_tlb_regs(struct amdgpu_device *adev)
{ … }
static void gfxhub_v3_0_3_init_cache_regs(struct amdgpu_device *adev)
{ … }
static void gfxhub_v3_0_3_enable_system_domain(struct amdgpu_device *adev)
{ … }
static void gfxhub_v3_0_3_disable_identity_aperture(struct amdgpu_device *adev)
{ … }
static void gfxhub_v3_0_3_setup_vmid_config(struct amdgpu_device *adev)
{ … }
static void gfxhub_v3_0_3_program_invalidation(struct amdgpu_device *adev)
{ … }
static int gfxhub_v3_0_3_gart_enable(struct amdgpu_device *adev)
{ … }
static void gfxhub_v3_0_3_gart_disable(struct amdgpu_device *adev)
{ … }
static void gfxhub_v3_0_3_set_fault_enable_default(struct amdgpu_device *adev,
bool value)
{ … }
static const struct amdgpu_vmhub_funcs gfxhub_v3_0_3_vmhub_funcs = …;
static void gfxhub_v3_0_3_init(struct amdgpu_device *adev)
{ … }
const struct amdgpu_gfxhub_funcs gfxhub_v3_0_3_funcs = …;