linux/drivers/gpu/drm/amd/include/ivsrcid/sdma0/irqsrcs_sdma0_4_0.h

/*
 * Copyright 2017 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#ifndef __IRQSRCS_SDMA0_4_0_H__
#define __IRQSRCS_SDMA0_4_0_H__

#define SDMA0_4_0__SRCID__SDMA_ATOMIC_RTN_DONE
#define SDMA0_4_0__SRCID__SDMA_ATOMIC_TIMEOUT
#define SDMA0_4_0__SRCID__SDMA_IB_PREEMPT
#define SDMA0_4_0__SRCID__SDMA_ECC
#define SDMA0_4_0__SRCID__SDMA_PAGE_FAULT
#define SDMA0_4_0__SRCID__SDMA_PAGE_NULL
#define SDMA0_4_0__SRCID__SDMA_XNACK
#define SDMA0_4_0__SRCID__SDMA_TRAP
#define SDMA0_4_0__SRCID__SDMA_SEM_INCOMPLETE_TIMEOUT
#define SDMA0_4_0__SRCID__SDMA_SEM_WAIT_FAIL_TIMEOUT
#define SDMA0_4_0__SRCID__SDMA_SRAM_ECC
#define SDMA0_4_0__SRCID__SDMA_PREEMPT
#define SDMA0_4_0__SRCID__SDMA_VM_HOLE
#define SDMA0_4_0__SRCID__SDMA_CTXEMPTY
#define SDMA0_4_0__SRCID__SDMA_DOORBELL_INVALID
#define SDMA0_4_0__SRCID__SDMA_FROZEN
#define SDMA0_4_0__SRCID__SDMA_POLL_TIMEOUT
#define SDMA0_4_0__SRCID__SDMA_SRBMWRITE

#endif /* __IRQSRCS_SDMA_4_0_H__ */