/* * Copyright (C) 2017 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included * in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ #ifndef _vce_4_0_DEFAULT_HEADER #define _vce_4_0_DEFAULT_HEADER // addressBlock: vce0_vce_dec #define mmVCE_STATUS_DEFAULT … #define mmVCE_VCPU_CNTL_DEFAULT … #define mmVCE_VCPU_CACHE_OFFSET0_DEFAULT … #define mmVCE_VCPU_CACHE_SIZE0_DEFAULT … #define mmVCE_VCPU_CACHE_OFFSET1_DEFAULT … #define mmVCE_VCPU_CACHE_SIZE1_DEFAULT … #define mmVCE_VCPU_CACHE_OFFSET2_DEFAULT … #define mmVCE_VCPU_CACHE_SIZE2_DEFAULT … #define mmVCE_VCPU_CACHE_OFFSET3_DEFAULT … #define mmVCE_VCPU_CACHE_SIZE3_DEFAULT … #define mmVCE_VCPU_CACHE_OFFSET4_DEFAULT … #define mmVCE_VCPU_CACHE_SIZE4_DEFAULT … #define mmVCE_VCPU_CACHE_OFFSET5_DEFAULT … #define mmVCE_VCPU_CACHE_SIZE5_DEFAULT … #define mmVCE_VCPU_CACHE_OFFSET6_DEFAULT … #define mmVCE_VCPU_CACHE_SIZE6_DEFAULT … #define mmVCE_VCPU_CACHE_OFFSET7_DEFAULT … #define mmVCE_VCPU_CACHE_SIZE7_DEFAULT … #define mmVCE_VCPU_CACHE_OFFSET8_DEFAULT … #define mmVCE_VCPU_CACHE_SIZE8_DEFAULT … #define mmVCE_SOFT_RESET_DEFAULT … #define mmVCE_RB_BASE_LO2_DEFAULT … #define mmVCE_RB_BASE_HI2_DEFAULT … #define mmVCE_RB_SIZE2_DEFAULT … #define mmVCE_RB_RPTR2_DEFAULT … #define mmVCE_RB_WPTR2_DEFAULT … #define mmVCE_RB_BASE_LO_DEFAULT … #define mmVCE_RB_BASE_HI_DEFAULT … #define mmVCE_RB_SIZE_DEFAULT … #define mmVCE_RB_RPTR_DEFAULT … #define mmVCE_RB_WPTR_DEFAULT … #define mmVCE_RB_ARB_CTRL_DEFAULT … #define mmVCE_CLOCK_GATING_A_DEFAULT … #define mmVCE_CLOCK_GATING_B_DEFAULT … #define mmVCE_RB_BASE_LO3_DEFAULT … #define mmVCE_RB_BASE_HI3_DEFAULT … #define mmVCE_RB_SIZE3_DEFAULT … #define mmVCE_RB_RPTR3_DEFAULT … #define mmVCE_RB_WPTR3_DEFAULT … #define mmVCE_SYS_INT_EN_DEFAULT … #define mmVCE_SYS_INT_ACK_DEFAULT … #define mmVCE_SYS_INT_STATUS_DEFAULT … // addressBlock: vce0_ctl_dec #define mmVCE_UENC_CLOCK_GATING_DEFAULT … #define mmVCE_UENC_REG_CLOCK_GATING_DEFAULT … #define mmVCE_UENC_CLOCK_GATING_2_DEFAULT … // addressBlock: vce0_vce_sclk_dec #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR_DEFAULT … #define mmVCE_LMI_CTRL2_DEFAULT … #define mmVCE_LMI_SWAP_CNTL3_DEFAULT … #define mmVCE_LMI_CTRL_DEFAULT … #define mmVCE_LMI_STATUS_DEFAULT … #define mmVCE_LMI_VM_CTRL_DEFAULT … #define mmVCE_LMI_SWAP_CNTL_DEFAULT … #define mmVCE_LMI_SWAP_CNTL1_DEFAULT … #define mmVCE_LMI_SWAP_CNTL2_DEFAULT … #define mmVCE_LMI_CACHE_CTRL_DEFAULT … #define mmVCE_LMI_VCPU_CACHE_64BIT_BAR0_DEFAULT … #define mmVCE_LMI_VCPU_CACHE_64BIT_BAR1_DEFAULT … #define mmVCE_LMI_VCPU_CACHE_64BIT_BAR2_DEFAULT … #define mmVCE_LMI_VCPU_CACHE_64BIT_BAR3_DEFAULT … #define mmVCE_LMI_VCPU_CACHE_64BIT_BAR4_DEFAULT … #define mmVCE_LMI_VCPU_CACHE_64BIT_BAR5_DEFAULT … #define mmVCE_LMI_VCPU_CACHE_64BIT_BAR6_DEFAULT … #define mmVCE_LMI_VCPU_CACHE_64BIT_BAR7_DEFAULT … #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR0_DEFAULT … #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR1_DEFAULT … #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR2_DEFAULT … #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR3_DEFAULT … #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR4_DEFAULT … #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR5_DEFAULT … #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR6_DEFAULT … #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR7_DEFAULT … // addressBlock: vce0_mmsch_dec #define mmVCE_MMSCH_VF_VMID_DEFAULT … #define mmVCE_MMSCH_VF_CTX_ADDR_LO_DEFAULT … #define mmVCE_MMSCH_VF_CTX_ADDR_HI_DEFAULT … #define mmVCE_MMSCH_VF_CTX_SIZE_DEFAULT … #define mmVCE_MMSCH_VF_GPCOM_ADDR_LO_DEFAULT … #define mmVCE_MMSCH_VF_GPCOM_ADDR_HI_DEFAULT … #define mmVCE_MMSCH_VF_GPCOM_SIZE_DEFAULT … #define mmVCE_MMSCH_VF_MAILBOX_HOST_DEFAULT … #define mmVCE_MMSCH_VF_MAILBOX_RESP_DEFAULT … // addressBlock: vce0_vce_rb_pg_dec #define mmVCE_HW_VERSION_DEFAULT … #endif
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