linux/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

/*
 * Copyright 2016 Advanced Micro Devices, Inc.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 * USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 */

#include <linux/firmware.h>
#include <linux/module.h>
#include <linux/dmi.h>
#include <linux/pci.h>
#include <linux/debugfs.h>
#include <drm/drm_drv.h>

#include "amdgpu.h"
#include "amdgpu_pm.h"
#include "amdgpu_vcn.h"
#include "soc15d.h"

/* Firmware Names */
#define FIRMWARE_RAVEN
#define FIRMWARE_PICASSO
#define FIRMWARE_RAVEN2
#define FIRMWARE_ARCTURUS
#define FIRMWARE_RENOIR
#define FIRMWARE_GREEN_SARDINE
#define FIRMWARE_NAVI10
#define FIRMWARE_NAVI14
#define FIRMWARE_NAVI12
#define FIRMWARE_SIENNA_CICHLID
#define FIRMWARE_NAVY_FLOUNDER
#define FIRMWARE_VANGOGH
#define FIRMWARE_DIMGREY_CAVEFISH
#define FIRMWARE_ALDEBARAN
#define FIRMWARE_BEIGE_GOBY
#define FIRMWARE_YELLOW_CARP
#define FIRMWARE_VCN_3_1_2
#define FIRMWARE_VCN4_0_0
#define FIRMWARE_VCN4_0_2
#define FIRMWARE_VCN4_0_3
#define FIRMWARE_VCN4_0_4
#define FIRMWARE_VCN4_0_5
#define FIRMWARE_VCN4_0_6
#define FIRMWARE_VCN4_0_6_1
#define FIRMWARE_VCN5_0_0

MODULE_FIRMWARE();
MODULE_FIRMWARE();
MODULE_FIRMWARE();
MODULE_FIRMWARE();
MODULE_FIRMWARE();
MODULE_FIRMWARE();
MODULE_FIRMWARE();
MODULE_FIRMWARE();
MODULE_FIRMWARE();
MODULE_FIRMWARE();
MODULE_FIRMWARE();
MODULE_FIRMWARE();
MODULE_FIRMWARE();
MODULE_FIRMWARE();
MODULE_FIRMWARE();
MODULE_FIRMWARE();
MODULE_FIRMWARE();
MODULE_FIRMWARE();
MODULE_FIRMWARE();
MODULE_FIRMWARE();
MODULE_FIRMWARE();
MODULE_FIRMWARE();
MODULE_FIRMWARE();
MODULE_FIRMWARE();
MODULE_FIRMWARE();

static void amdgpu_vcn_idle_work_handler(struct work_struct *work);

int amdgpu_vcn_early_init(struct amdgpu_device *adev)
{}

int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
{}

int amdgpu_vcn_sw_fini(struct amdgpu_device *adev)
{}

bool amdgpu_vcn_is_disabled_vcn(struct amdgpu_device *adev, enum vcn_ring_type type, uint32_t vcn_instance)
{}

int amdgpu_vcn_suspend(struct amdgpu_device *adev)
{}

int amdgpu_vcn_resume(struct amdgpu_device *adev)
{}

static void amdgpu_vcn_idle_work_handler(struct work_struct *work)
{}

void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring)
{}

void amdgpu_vcn_ring_end_use(struct amdgpu_ring *ring)
{}

int amdgpu_vcn_dec_ring_test_ring(struct amdgpu_ring *ring)
{}

int amdgpu_vcn_dec_sw_ring_test_ring(struct amdgpu_ring *ring)
{}

static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring,
				   struct amdgpu_ib *ib_msg,
				   struct dma_fence **fence)
{}

static int amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
		struct amdgpu_ib *ib)
{}

static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
					  struct amdgpu_ib *ib)
{}

int amdgpu_vcn_dec_ring_test_ib(struct amdgpu_ring *ring, long timeout)
{}

static uint32_t *amdgpu_vcn_unified_ring_ib_header(struct amdgpu_ib *ib,
						uint32_t ib_pack_in_dw, bool enc)
{}

static void amdgpu_vcn_unified_ring_ib_checksum(uint32_t **ib_checksum,
						uint32_t ib_pack_in_dw)
{}

static int amdgpu_vcn_dec_sw_send_msg(struct amdgpu_ring *ring,
				      struct amdgpu_ib *ib_msg,
				      struct dma_fence **fence)
{}

int amdgpu_vcn_dec_sw_ring_test_ib(struct amdgpu_ring *ring, long timeout)
{}

int amdgpu_vcn_enc_ring_test_ring(struct amdgpu_ring *ring)
{}

static int amdgpu_vcn_enc_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
					 struct amdgpu_ib *ib_msg,
					 struct dma_fence **fence)
{}

static int amdgpu_vcn_enc_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
					  struct amdgpu_ib *ib_msg,
					  struct dma_fence **fence)
{}

int amdgpu_vcn_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout)
{}

int amdgpu_vcn_unified_ring_test_ib(struct amdgpu_ring *ring, long timeout)
{}

enum amdgpu_ring_priority_level amdgpu_vcn_get_enc_ring_prio(int ring)
{}

void amdgpu_vcn_setup_ucode(struct amdgpu_device *adev)
{}

/*
 * debugfs for mapping vcn firmware log buffer.
 */
#if defined(CONFIG_DEBUG_FS)
static ssize_t amdgpu_debugfs_vcn_fwlog_read(struct file *f, char __user *buf,
					     size_t size, loff_t *pos)
{}

static const struct file_operations amdgpu_debugfs_vcnfwlog_fops =;
#endif

void amdgpu_debugfs_vcn_fwlog_init(struct amdgpu_device *adev, uint8_t i,
				   struct amdgpu_vcn_inst *vcn)
{}

void amdgpu_vcn_fwlog_init(struct amdgpu_vcn_inst *vcn)
{}

int amdgpu_vcn_process_poison_irq(struct amdgpu_device *adev,
				struct amdgpu_irq_src *source,
				struct amdgpu_iv_entry *entry)
{}

int amdgpu_vcn_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block)
{}

int amdgpu_vcn_ras_sw_init(struct amdgpu_device *adev)
{}

int amdgpu_vcn_psp_update_sram(struct amdgpu_device *adev, int inst_idx,
			       enum AMDGPU_UCODE_ID ucode_id)
{}