/* * Copyright 2022 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * */ #ifndef __MMSCH_V4_0_H__ #define __MMSCH_V4_0_H__ #include "amdgpu_vcn.h" #define MMSCH_VERSION_MAJOR … #define MMSCH_VERSION_MINOR … #define MMSCH_VERSION … #define RB_ENABLED … #define RB4_ENABLED … #define MMSCH_VF_ENGINE_STATUS__PASS … #define MMSCH_VF_MAILBOX_RESP__OK … #define MMSCH_VF_MAILBOX_RESP__INCOMPLETE … #define MMSCH_VF_MAILBOX_RESP__FAILED … #define MMSCH_VF_MAILBOX_RESP__FAILED_SMALL_CTX_SIZE … #define MMSCH_VF_MAILBOX_RESP__UNKNOWN_CMD … #define MMSCH_V4_0_VCN_INSTANCES … enum mmsch_v4_0_command_type { … }; struct mmsch_v4_0_table_info { … }; struct mmsch_v4_0_init_header { … }; struct mmsch_v4_0_cmd_direct_reg_header { … }; struct mmsch_v4_0_cmd_indirect_reg_header { … }; struct mmsch_v4_0_cmd_direct_write { … }; struct mmsch_v4_0_cmd_direct_read_modify_write { … }; struct mmsch_v4_0_cmd_direct_polling { … }; struct mmsch_v4_0_cmd_end { … }; struct mmsch_v4_0_cmd_indirect_write { … }; #define MMSCH_V4_0_INSERT_DIRECT_RD_MOD_WT(reg, mask, data) … #define MMSCH_V4_0_INSERT_DIRECT_WT(reg, value) … #define MMSCH_V4_0_INSERT_DIRECT_POLL(reg, mask, wait) … #define MMSCH_V4_0_INSERT_END() … #endif
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