#include "amdgpu.h"
#include "amdgpu_jpeg.h"
#include "amdgpu_pm.h"
#include "soc15.h"
#include "soc15d.h"
#include "jpeg_v2_0.h"
#include "jpeg_v4_0.h"
#include "mmsch_v4_0.h"
#include "vcn/vcn_4_0_0_offset.h"
#include "vcn/vcn_4_0_0_sh_mask.h"
#include "ivsrcid/vcn/irqsrcs_vcn_4_0.h"
#define regUVD_JPEG_PITCH_INTERNAL_OFFSET …
static int jpeg_v4_0_start_sriov(struct amdgpu_device *adev);
static void jpeg_v4_0_set_dec_ring_funcs(struct amdgpu_device *adev);
static void jpeg_v4_0_set_irq_funcs(struct amdgpu_device *adev);
static int jpeg_v4_0_set_powergating_state(void *handle,
enum amd_powergating_state state);
static void jpeg_v4_0_set_ras_funcs(struct amdgpu_device *adev);
static void jpeg_v4_0_dec_ring_set_wptr(struct amdgpu_ring *ring);
static int jpeg_v4_0_early_init(void *handle)
{ … }
static int jpeg_v4_0_sw_init(void *handle)
{ … }
static int jpeg_v4_0_sw_fini(void *handle)
{ … }
static int jpeg_v4_0_hw_init(void *handle)
{ … }
static int jpeg_v4_0_hw_fini(void *handle)
{ … }
static int jpeg_v4_0_suspend(void *handle)
{ … }
static int jpeg_v4_0_resume(void *handle)
{ … }
static void jpeg_v4_0_disable_clock_gating(struct amdgpu_device *adev)
{ … }
static void jpeg_v4_0_enable_clock_gating(struct amdgpu_device *adev)
{ … }
static int jpeg_v4_0_disable_static_power_gating(struct amdgpu_device *adev)
{ … }
static int jpeg_v4_0_enable_static_power_gating(struct amdgpu_device *adev)
{ … }
static int jpeg_v4_0_start(struct amdgpu_device *adev)
{ … }
static int jpeg_v4_0_start_sriov(struct amdgpu_device *adev)
{ … }
static int jpeg_v4_0_stop(struct amdgpu_device *adev)
{ … }
static uint64_t jpeg_v4_0_dec_ring_get_rptr(struct amdgpu_ring *ring)
{ … }
static uint64_t jpeg_v4_0_dec_ring_get_wptr(struct amdgpu_ring *ring)
{ … }
static void jpeg_v4_0_dec_ring_set_wptr(struct amdgpu_ring *ring)
{ … }
static bool jpeg_v4_0_is_idle(void *handle)
{ … }
static int jpeg_v4_0_wait_for_idle(void *handle)
{ … }
static int jpeg_v4_0_set_clockgating_state(void *handle,
enum amd_clockgating_state state)
{ … }
static int jpeg_v4_0_set_powergating_state(void *handle,
enum amd_powergating_state state)
{ … }
static int jpeg_v4_0_set_ras_interrupt_state(struct amdgpu_device *adev,
struct amdgpu_irq_src *source,
unsigned int type,
enum amdgpu_interrupt_state state)
{ … }
static int jpeg_v4_0_process_interrupt(struct amdgpu_device *adev,
struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry)
{ … }
static const struct amd_ip_funcs jpeg_v4_0_ip_funcs = …;
static const struct amdgpu_ring_funcs jpeg_v4_0_dec_ring_vm_funcs = …;
static void jpeg_v4_0_set_dec_ring_funcs(struct amdgpu_device *adev)
{ … }
static const struct amdgpu_irq_src_funcs jpeg_v4_0_irq_funcs = …;
static const struct amdgpu_irq_src_funcs jpeg_v4_0_ras_irq_funcs = …;
static void jpeg_v4_0_set_irq_funcs(struct amdgpu_device *adev)
{ … }
const struct amdgpu_ip_block_version jpeg_v4_0_ip_block = …;
static uint32_t jpeg_v4_0_query_poison_by_instance(struct amdgpu_device *adev,
uint32_t instance, uint32_t sub_block)
{ … }
static bool jpeg_v4_0_query_ras_poison_status(struct amdgpu_device *adev)
{ … }
const struct amdgpu_ras_block_hw_ops jpeg_v4_0_ras_hw_ops = …;
static struct amdgpu_jpeg_ras jpeg_v4_0_ras = …;
static void jpeg_v4_0_set_ras_funcs(struct amdgpu_device *adev)
{ … }