linux/drivers/gpu/drm/amd/include/asic_reg/athub/athub_2_1_0_offset.h

/*
 * Copyright (C) 2019  Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included
 * in all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */
#ifndef _athub_2_1_0_OFFSET_HEADER
#define _athub_2_1_0_OFFSET_HEADER



// addressBlock: athub_atsdec
// base address: 0x3000
#define mmATHUB_ATS_MODE_CNTL
#define mmATHUB_ATS_MODE_CNTL_BASE_IDX
#define mmATHUB_SHARED_VIRT_RESET_REQ
#define mmATHUB_SHARED_VIRT_RESET_REQ_BASE_IDX
#define mmATHUB_SHARED_ACTIVE_FCN_ID
#define mmATHUB_SHARED_ACTIVE_FCN_ID_BASE_IDX
#define mmATC_ATS_CNTL
#define mmATC_ATS_CNTL_BASE_IDX
#define mmATC_ATS_FAULT_CNTL
#define mmATC_ATS_FAULT_CNTL_BASE_IDX
#define mmATC_ATS_DEFAULT_PAGE_LOW
#define mmATC_ATS_DEFAULT_PAGE_LOW_BASE_IDX
#define mmATC_TRANS_FAULT_RSPCNTRL
#define mmATC_TRANS_FAULT_RSPCNTRL_BASE_IDX
#define mmATHUB_MISC_CNTL
#define mmATHUB_MISC_CNTL_BASE_IDX
#define mmATHUB_MEM_POWER_LS
#define mmATHUB_MEM_POWER_LS_BASE_IDX
#define mmATC_ATS_SDPPORT_CNTL
#define mmATC_ATS_SDPPORT_CNTL_BASE_IDX
#define mmATC_ATS_CNTL2
#define mmATC_ATS_CNTL2_BASE_IDX
#define mmATC_ATS_TR_QOS_CNTL
#define mmATC_ATS_TR_QOS_CNTL_BASE_IDX
#define mmATC_ATS_MISC_CNTL
#define mmATC_ATS_MISC_CNTL_BASE_IDX
#define mmATC_PERFCOUNTER0_CFG
#define mmATC_PERFCOUNTER0_CFG_BASE_IDX
#define mmATC_PERFCOUNTER1_CFG
#define mmATC_PERFCOUNTER1_CFG_BASE_IDX
#define mmATC_PERFCOUNTER2_CFG
#define mmATC_PERFCOUNTER2_CFG_BASE_IDX
#define mmATC_PERFCOUNTER3_CFG
#define mmATC_PERFCOUNTER3_CFG_BASE_IDX
#define mmATC_PERFCOUNTER_RSLT_CNTL
#define mmATC_PERFCOUNTER_RSLT_CNTL_BASE_IDX
#define mmATC_PERFCOUNTER_LO
#define mmATC_PERFCOUNTER_LO_BASE_IDX
#define mmATC_PERFCOUNTER_HI
#define mmATC_PERFCOUNTER_HI_BASE_IDX
#define mmATS_IH_CREDIT
#define mmATS_IH_CREDIT_BASE_IDX
#define mmATHUB_IH_CREDIT
#define mmATHUB_IH_CREDIT_BASE_IDX
#define mmATC_ATS_GFX_ATCL2_STATUS
#define mmATC_ATS_GFX_ATCL2_STATUS_BASE_IDX
#define mmATC_ATS_MMHUB_ATCL2_STATUS
#define mmATC_ATS_MMHUB_ATCL2_STATUS_BASE_IDX
#define mmATC_ATS_FAULT_STATUS_INFO
#define mmATC_ATS_FAULT_STATUS_INFO_BASE_IDX
#define mmATC_ATS_FAULT_STATUS_ADDR
#define mmATC_ATS_FAULT_STATUS_ADDR_BASE_IDX
#define mmATC_ATS_FAULT_STATUS_INFO2
#define mmATC_ATS_FAULT_STATUS_INFO2_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL
#define mmATHUB_PCIE_ATS_CNTL_BASE_IDX
#define mmATHUB_PCIE_PASID_CNTL
#define mmATHUB_PCIE_PASID_CNTL_BASE_IDX
#define mmATHUB_PCIE_PAGE_REQ_CNTL
#define mmATHUB_PCIE_PAGE_REQ_CNTL_BASE_IDX
#define mmATHUB_PCIE_OUTSTAND_PAGE_REQ_ALLOC
#define mmATHUB_PCIE_OUTSTAND_PAGE_REQ_ALLOC_BASE_IDX
#define mmATHUB_COMMAND
#define mmATHUB_COMMAND_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_0
#define mmATHUB_PCIE_ATS_CNTL_VF_0_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_1
#define mmATHUB_PCIE_ATS_CNTL_VF_1_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_2
#define mmATHUB_PCIE_ATS_CNTL_VF_2_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_3
#define mmATHUB_PCIE_ATS_CNTL_VF_3_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_4
#define mmATHUB_PCIE_ATS_CNTL_VF_4_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_5
#define mmATHUB_PCIE_ATS_CNTL_VF_5_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_6
#define mmATHUB_PCIE_ATS_CNTL_VF_6_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_7
#define mmATHUB_PCIE_ATS_CNTL_VF_7_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_8
#define mmATHUB_PCIE_ATS_CNTL_VF_8_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_9
#define mmATHUB_PCIE_ATS_CNTL_VF_9_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_10
#define mmATHUB_PCIE_ATS_CNTL_VF_10_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_11
#define mmATHUB_PCIE_ATS_CNTL_VF_11_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_12
#define mmATHUB_PCIE_ATS_CNTL_VF_12_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_13
#define mmATHUB_PCIE_ATS_CNTL_VF_13_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_14
#define mmATHUB_PCIE_ATS_CNTL_VF_14_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_15
#define mmATHUB_PCIE_ATS_CNTL_VF_15_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_16
#define mmATHUB_PCIE_ATS_CNTL_VF_16_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_17
#define mmATHUB_PCIE_ATS_CNTL_VF_17_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_18
#define mmATHUB_PCIE_ATS_CNTL_VF_18_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_19
#define mmATHUB_PCIE_ATS_CNTL_VF_19_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_20
#define mmATHUB_PCIE_ATS_CNTL_VF_20_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_21
#define mmATHUB_PCIE_ATS_CNTL_VF_21_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_22
#define mmATHUB_PCIE_ATS_CNTL_VF_22_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_23
#define mmATHUB_PCIE_ATS_CNTL_VF_23_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_24
#define mmATHUB_PCIE_ATS_CNTL_VF_24_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_25
#define mmATHUB_PCIE_ATS_CNTL_VF_25_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_26
#define mmATHUB_PCIE_ATS_CNTL_VF_26_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_27
#define mmATHUB_PCIE_ATS_CNTL_VF_27_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_28
#define mmATHUB_PCIE_ATS_CNTL_VF_28_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_29
#define mmATHUB_PCIE_ATS_CNTL_VF_29_BASE_IDX
#define mmATHUB_PCIE_ATS_CNTL_VF_30
#define mmATHUB_PCIE_ATS_CNTL_VF_30_BASE_IDX
#define mmATC_VMID_PASID_MAPPING_UPDATE_STATUS
#define mmATC_VMID_PASID_MAPPING_UPDATE_STATUS_BASE_IDX
#define mmATC_ATS_VMID_STATUS
#define mmATC_ATS_VMID_STATUS_BASE_IDX
#define mmATC_ATS_STATUS
#define mmATC_ATS_STATUS_BASE_IDX
#define mmATC_ATS_VMID_SNAPSHOT_GFX_STAT
#define mmATC_ATS_VMID_SNAPSHOT_GFX_STAT_BASE_IDX
#define mmATC_ATS_VMID_SNAPSHOT_MMHUB_STAT
#define mmATC_ATS_VMID_SNAPSHOT_MMHUB_STAT_BASE_IDX
#define mmATC_VMID0_PASID_MAPPING
#define mmATC_VMID0_PASID_MAPPING_BASE_IDX
#define mmATC_VMID1_PASID_MAPPING
#define mmATC_VMID1_PASID_MAPPING_BASE_IDX
#define mmATC_VMID2_PASID_MAPPING
#define mmATC_VMID2_PASID_MAPPING_BASE_IDX
#define mmATC_VMID3_PASID_MAPPING
#define mmATC_VMID3_PASID_MAPPING_BASE_IDX
#define mmATC_VMID4_PASID_MAPPING
#define mmATC_VMID4_PASID_MAPPING_BASE_IDX
#define mmATC_VMID5_PASID_MAPPING
#define mmATC_VMID5_PASID_MAPPING_BASE_IDX
#define mmATC_VMID6_PASID_MAPPING
#define mmATC_VMID6_PASID_MAPPING_BASE_IDX
#define mmATC_VMID7_PASID_MAPPING
#define mmATC_VMID7_PASID_MAPPING_BASE_IDX
#define mmATC_VMID8_PASID_MAPPING
#define mmATC_VMID8_PASID_MAPPING_BASE_IDX
#define mmATC_VMID9_PASID_MAPPING
#define mmATC_VMID9_PASID_MAPPING_BASE_IDX
#define mmATC_VMID10_PASID_MAPPING
#define mmATC_VMID10_PASID_MAPPING_BASE_IDX
#define mmATC_VMID11_PASID_MAPPING
#define mmATC_VMID11_PASID_MAPPING_BASE_IDX
#define mmATC_VMID12_PASID_MAPPING
#define mmATC_VMID12_PASID_MAPPING_BASE_IDX
#define mmATC_VMID13_PASID_MAPPING
#define mmATC_VMID13_PASID_MAPPING_BASE_IDX
#define mmATC_VMID14_PASID_MAPPING
#define mmATC_VMID14_PASID_MAPPING_BASE_IDX
#define mmATC_VMID15_PASID_MAPPING
#define mmATC_VMID15_PASID_MAPPING_BASE_IDX
#define mmATC_VMID16_PASID_MAPPING
#define mmATC_VMID16_PASID_MAPPING_BASE_IDX
#define mmATC_VMID17_PASID_MAPPING
#define mmATC_VMID17_PASID_MAPPING_BASE_IDX
#define mmATC_VMID18_PASID_MAPPING
#define mmATC_VMID18_PASID_MAPPING_BASE_IDX
#define mmATC_VMID19_PASID_MAPPING
#define mmATC_VMID19_PASID_MAPPING_BASE_IDX
#define mmATC_VMID20_PASID_MAPPING
#define mmATC_VMID20_PASID_MAPPING_BASE_IDX
#define mmATC_VMID21_PASID_MAPPING
#define mmATC_VMID21_PASID_MAPPING_BASE_IDX
#define mmATC_VMID22_PASID_MAPPING
#define mmATC_VMID22_PASID_MAPPING_BASE_IDX
#define mmATC_VMID23_PASID_MAPPING
#define mmATC_VMID23_PASID_MAPPING_BASE_IDX
#define mmATC_VMID24_PASID_MAPPING
#define mmATC_VMID24_PASID_MAPPING_BASE_IDX
#define mmATC_VMID25_PASID_MAPPING
#define mmATC_VMID25_PASID_MAPPING_BASE_IDX
#define mmATC_VMID26_PASID_MAPPING
#define mmATC_VMID26_PASID_MAPPING_BASE_IDX
#define mmATC_VMID27_PASID_MAPPING
#define mmATC_VMID27_PASID_MAPPING_BASE_IDX
#define mmATC_VMID28_PASID_MAPPING
#define mmATC_VMID28_PASID_MAPPING_BASE_IDX
#define mmATC_VMID29_PASID_MAPPING
#define mmATC_VMID29_PASID_MAPPING_BASE_IDX
#define mmATC_VMID30_PASID_MAPPING
#define mmATC_VMID30_PASID_MAPPING_BASE_IDX
#define mmATC_VMID31_PASID_MAPPING
#define mmATC_VMID31_PASID_MAPPING_BASE_IDX


// addressBlock: athub_xpbdec
// base address: 0x31a0
#define mmXPB_RTR_SRC_APRTR0
#define mmXPB_RTR_SRC_APRTR0_BASE_IDX
#define mmXPB_RTR_SRC_APRTR1
#define mmXPB_RTR_SRC_APRTR1_BASE_IDX
#define mmXPB_RTR_SRC_APRTR2
#define mmXPB_RTR_SRC_APRTR2_BASE_IDX
#define mmXPB_RTR_SRC_APRTR3
#define mmXPB_RTR_SRC_APRTR3_BASE_IDX
#define mmXPB_RTR_SRC_APRTR4
#define mmXPB_RTR_SRC_APRTR4_BASE_IDX
#define mmXPB_RTR_SRC_APRTR5
#define mmXPB_RTR_SRC_APRTR5_BASE_IDX
#define mmXPB_RTR_SRC_APRTR6
#define mmXPB_RTR_SRC_APRTR6_BASE_IDX
#define mmXPB_RTR_SRC_APRTR7
#define mmXPB_RTR_SRC_APRTR7_BASE_IDX
#define mmXPB_RTR_SRC_APRTR8
#define mmXPB_RTR_SRC_APRTR8_BASE_IDX
#define mmXPB_RTR_SRC_APRTR9
#define mmXPB_RTR_SRC_APRTR9_BASE_IDX
#define mmXPB_RTR_SRC_APRTR10
#define mmXPB_RTR_SRC_APRTR10_BASE_IDX
#define mmXPB_RTR_SRC_APRTR11
#define mmXPB_RTR_SRC_APRTR11_BASE_IDX
#define mmXPB_RTR_SRC_APRTR12
#define mmXPB_RTR_SRC_APRTR12_BASE_IDX
#define mmXPB_RTR_SRC_APRTR13
#define mmXPB_RTR_SRC_APRTR13_BASE_IDX
#define mmXPB_RTR_DEST_MAP0
#define mmXPB_RTR_DEST_MAP0_BASE_IDX
#define mmXPB_RTR_DEST_MAP1
#define mmXPB_RTR_DEST_MAP1_BASE_IDX
#define mmXPB_RTR_DEST_MAP2
#define mmXPB_RTR_DEST_MAP2_BASE_IDX
#define mmXPB_RTR_DEST_MAP3
#define mmXPB_RTR_DEST_MAP3_BASE_IDX
#define mmXPB_RTR_DEST_MAP4
#define mmXPB_RTR_DEST_MAP4_BASE_IDX
#define mmXPB_RTR_DEST_MAP5
#define mmXPB_RTR_DEST_MAP5_BASE_IDX
#define mmXPB_RTR_DEST_MAP6
#define mmXPB_RTR_DEST_MAP6_BASE_IDX
#define mmXPB_RTR_DEST_MAP7
#define mmXPB_RTR_DEST_MAP7_BASE_IDX
#define mmXPB_RTR_DEST_MAP8
#define mmXPB_RTR_DEST_MAP8_BASE_IDX
#define mmXPB_RTR_DEST_MAP9
#define mmXPB_RTR_DEST_MAP9_BASE_IDX
#define mmXPB_RTR_DEST_MAP10
#define mmXPB_RTR_DEST_MAP10_BASE_IDX
#define mmXPB_RTR_DEST_MAP11
#define mmXPB_RTR_DEST_MAP11_BASE_IDX
#define mmXPB_RTR_DEST_MAP12
#define mmXPB_RTR_DEST_MAP12_BASE_IDX
#define mmXPB_RTR_DEST_MAP13
#define mmXPB_RTR_DEST_MAP13_BASE_IDX
#define mmXPB_CLG_CFG0
#define mmXPB_CLG_CFG0_BASE_IDX
#define mmXPB_CLG_CFG1
#define mmXPB_CLG_CFG1_BASE_IDX
#define mmXPB_CLG_CFG2
#define mmXPB_CLG_CFG2_BASE_IDX
#define mmXPB_CLG_CFG3
#define mmXPB_CLG_CFG3_BASE_IDX
#define mmXPB_CLG_CFG4
#define mmXPB_CLG_CFG4_BASE_IDX
#define mmXPB_CLG_CFG5
#define mmXPB_CLG_CFG5_BASE_IDX
#define mmXPB_CLG_CFG6
#define mmXPB_CLG_CFG6_BASE_IDX
#define mmXPB_CLG_CFG7
#define mmXPB_CLG_CFG7_BASE_IDX
#define mmXPB_CLG_EXTRA
#define mmXPB_CLG_EXTRA_BASE_IDX
#define mmXPB_CLG_EXTRA_MSK
#define mmXPB_CLG_EXTRA_MSK_BASE_IDX
#define mmXPB_LB_ADDR
#define mmXPB_LB_ADDR_BASE_IDX
#define mmXPB_WCB_STS
#define mmXPB_WCB_STS_BASE_IDX
#define mmXPB_HST_CFG
#define mmXPB_HST_CFG_BASE_IDX
#define mmXPB_P2P_BAR_CFG
#define mmXPB_P2P_BAR_CFG_BASE_IDX
#define mmXPB_P2P_BAR0
#define mmXPB_P2P_BAR0_BASE_IDX
#define mmXPB_P2P_BAR1
#define mmXPB_P2P_BAR1_BASE_IDX
#define mmXPB_P2P_BAR2
#define mmXPB_P2P_BAR2_BASE_IDX
#define mmXPB_P2P_BAR3
#define mmXPB_P2P_BAR3_BASE_IDX
#define mmXPB_P2P_BAR4
#define mmXPB_P2P_BAR4_BASE_IDX
#define mmXPB_P2P_BAR5
#define mmXPB_P2P_BAR5_BASE_IDX
#define mmXPB_P2P_BAR6
#define mmXPB_P2P_BAR6_BASE_IDX
#define mmXPB_P2P_BAR7
#define mmXPB_P2P_BAR7_BASE_IDX
#define mmXPB_P2P_BAR_SETUP
#define mmXPB_P2P_BAR_SETUP_BASE_IDX
#define mmXPB_P2P_BAR_DELTA_ABOVE
#define mmXPB_P2P_BAR_DELTA_ABOVE_BASE_IDX
#define mmXPB_P2P_BAR_DELTA_BELOW
#define mmXPB_P2P_BAR_DELTA_BELOW_BASE_IDX
#define mmXPB_PEER_SYS_BAR0
#define mmXPB_PEER_SYS_BAR0_BASE_IDX
#define mmXPB_PEER_SYS_BAR1
#define mmXPB_PEER_SYS_BAR1_BASE_IDX
#define mmXPB_PEER_SYS_BAR2
#define mmXPB_PEER_SYS_BAR2_BASE_IDX
#define mmXPB_PEER_SYS_BAR3
#define mmXPB_PEER_SYS_BAR3_BASE_IDX
#define mmXPB_PEER_SYS_BAR4
#define mmXPB_PEER_SYS_BAR4_BASE_IDX
#define mmXPB_PEER_SYS_BAR5
#define mmXPB_PEER_SYS_BAR5_BASE_IDX
#define mmXPB_PEER_SYS_BAR6
#define mmXPB_PEER_SYS_BAR6_BASE_IDX
#define mmXPB_PEER_SYS_BAR7
#define mmXPB_PEER_SYS_BAR7_BASE_IDX
#define mmXPB_PEER_SYS_BAR8
#define mmXPB_PEER_SYS_BAR8_BASE_IDX
#define mmXPB_PEER_SYS_BAR9
#define mmXPB_PEER_SYS_BAR9_BASE_IDX
#define mmXPB_PEER_SYS_BAR10
#define mmXPB_PEER_SYS_BAR10_BASE_IDX
#define mmXPB_PEER_SYS_BAR11
#define mmXPB_PEER_SYS_BAR11_BASE_IDX
#define mmXPB_PEER_SYS_BAR12
#define mmXPB_PEER_SYS_BAR12_BASE_IDX
#define mmXPB_PEER_SYS_BAR13
#define mmXPB_PEER_SYS_BAR13_BASE_IDX
#define mmXPB_CLK_GAT
#define mmXPB_CLK_GAT_BASE_IDX
#define mmXPB_INTF_CFG
#define mmXPB_INTF_CFG_BASE_IDX
#define mmXPB_INTF_STS
#define mmXPB_INTF_STS_BASE_IDX
#define mmXPB_PIPE_STS
#define mmXPB_PIPE_STS_BASE_IDX
#define mmXPB_SUB_CTRL
#define mmXPB_SUB_CTRL_BASE_IDX
#define mmXPB_MAP_INVERT_FLUSH_NUM_LSB
#define mmXPB_MAP_INVERT_FLUSH_NUM_LSB_BASE_IDX
#define mmXPB_PERF_KNOBS
#define mmXPB_PERF_KNOBS_BASE_IDX
#define mmXPB_STICKY
#define mmXPB_STICKY_BASE_IDX
#define mmXPB_STICKY_W1C
#define mmXPB_STICKY_W1C_BASE_IDX
#define mmXPB_MISC_CFG
#define mmXPB_MISC_CFG_BASE_IDX
#define mmXPB_INTF_CFG2
#define mmXPB_INTF_CFG2_BASE_IDX
#define mmXPB_CLG_EXTRA_RD
#define mmXPB_CLG_EXTRA_RD_BASE_IDX
#define mmXPB_CLG_EXTRA_MSK_RD
#define mmXPB_CLG_EXTRA_MSK_RD_BASE_IDX
#define mmXPB_CLG_GFX_MATCH
#define mmXPB_CLG_GFX_MATCH_BASE_IDX
#define mmXPB_CLG_GFX_MATCH_MSK
#define mmXPB_CLG_GFX_MATCH_MSK_BASE_IDX
#define mmXPB_CLG_MM_MATCH
#define mmXPB_CLG_MM_MATCH_BASE_IDX
#define mmXPB_CLG_MM_MATCH_MSK
#define mmXPB_CLG_MM_MATCH_MSK_BASE_IDX
#define mmXPB_CLG_GUS_MATCH
#define mmXPB_CLG_GUS_MATCH_BASE_IDX
#define mmXPB_CLG_GUS_MATCH_MSK
#define mmXPB_CLG_GUS_MATCH_MSK_BASE_IDX
#define mmXPB_CLG_GFX_UNITID_MAPPING0
#define mmXPB_CLG_GFX_UNITID_MAPPING0_BASE_IDX
#define mmXPB_CLG_GFX_UNITID_MAPPING1
#define mmXPB_CLG_GFX_UNITID_MAPPING1_BASE_IDX
#define mmXPB_CLG_GFX_UNITID_MAPPING2
#define mmXPB_CLG_GFX_UNITID_MAPPING2_BASE_IDX
#define mmXPB_CLG_GFX_UNITID_MAPPING3
#define mmXPB_CLG_GFX_UNITID_MAPPING3_BASE_IDX
#define mmXPB_CLG_GFX_UNITID_MAPPING4
#define mmXPB_CLG_GFX_UNITID_MAPPING4_BASE_IDX
#define mmXPB_CLG_GFX_UNITID_MAPPING5
#define mmXPB_CLG_GFX_UNITID_MAPPING5_BASE_IDX
#define mmXPB_CLG_GFX_UNITID_MAPPING6
#define mmXPB_CLG_GFX_UNITID_MAPPING6_BASE_IDX
#define mmXPB_CLG_GFX_UNITID_MAPPING7
#define mmXPB_CLG_GFX_UNITID_MAPPING7_BASE_IDX
#define mmXPB_CLG_MM_UNITID_MAPPING0
#define mmXPB_CLG_MM_UNITID_MAPPING0_BASE_IDX
#define mmXPB_CLG_MM_UNITID_MAPPING1
#define mmXPB_CLG_MM_UNITID_MAPPING1_BASE_IDX
#define mmXPB_CLG_MM_UNITID_MAPPING2
#define mmXPB_CLG_MM_UNITID_MAPPING2_BASE_IDX
#define mmXPB_CLG_MM_UNITID_MAPPING3
#define mmXPB_CLG_MM_UNITID_MAPPING3_BASE_IDX
#define mmXPB_CLG_GUS_UNITID_MAPPING0
#define mmXPB_CLG_GUS_UNITID_MAPPING0_BASE_IDX
#define mmXPB_CLG_GUS_UNITID_MAPPING1
#define mmXPB_CLG_GUS_UNITID_MAPPING1_BASE_IDX
#define mmXPB_CLG_GUS_UNITID_MAPPING2
#define mmXPB_CLG_GUS_UNITID_MAPPING2_BASE_IDX
#define mmXPB_CLG_GUS_UNITID_MAPPING3
#define mmXPB_CLG_GUS_UNITID_MAPPING3_BASE_IDX
#define mmXPB_CLG_GUS_UNITID_MAPPING4
#define mmXPB_CLG_GUS_UNITID_MAPPING4_BASE_IDX
#define mmXPB_CLG_GUS_UNITID_MAPPING5
#define mmXPB_CLG_GUS_UNITID_MAPPING5_BASE_IDX
#define mmXPB_CLG_GUS_UNITID_MAPPING6
#define mmXPB_CLG_GUS_UNITID_MAPPING6_BASE_IDX
#define mmXPB_CLG_GUS_UNITID_MAPPING7
#define mmXPB_CLG_GUS_UNITID_MAPPING7_BASE_IDX


// addressBlock: athub_rpbdec
// base address: 0x3350
#define mmRPB_PASSPW_CONF
#define mmRPB_PASSPW_CONF_BASE_IDX
#define mmRPB_BLOCKLEVEL_CONF
#define mmRPB_BLOCKLEVEL_CONF_BASE_IDX
#define mmRPB_TAG_CONF
#define mmRPB_TAG_CONF_BASE_IDX
#define mmRPB_EFF_CNTL
#define mmRPB_EFF_CNTL_BASE_IDX
#define mmRPB_ARB_CNTL
#define mmRPB_ARB_CNTL_BASE_IDX
#define mmRPB_ARB_CNTL2
#define mmRPB_ARB_CNTL2_BASE_IDX
#define mmRPB_BIF_CNTL
#define mmRPB_BIF_CNTL_BASE_IDX
#define mmRPB_BIF_CNTL2
#define mmRPB_BIF_CNTL2_BASE_IDX
#define mmRPB_WR_SWITCH_CNTL
#define mmRPB_WR_SWITCH_CNTL_BASE_IDX
#define mmRPB_RD_SWITCH_CNTL
#define mmRPB_RD_SWITCH_CNTL_BASE_IDX
#define mmRPB_SWITCH_CNTL2
#define mmRPB_SWITCH_CNTL2_BASE_IDX
#define mmRPB_CID_QUEUE_WR
#define mmRPB_CID_QUEUE_WR_BASE_IDX
#define mmRPB_EA_QUEUE_WR
#define mmRPB_EA_QUEUE_WR_BASE_IDX
#define mmRPB_CID_QUEUE_RD
#define mmRPB_CID_QUEUE_RD_BASE_IDX
#define mmRPB_CID_QUEUE_EX
#define mmRPB_CID_QUEUE_EX_BASE_IDX
#define mmRPB_CID_QUEUE_EX_DATA
#define mmRPB_CID_QUEUE_EX_DATA_BASE_IDX
#define mmRPB_DEINTRLV_COMBINE_CNTL
#define mmRPB_DEINTRLV_COMBINE_CNTL_BASE_IDX
#define mmRPB_VC_SWITCH_RDWR
#define mmRPB_VC_SWITCH_RDWR_BASE_IDX
#define mmRPB_PERF_COUNTER_CNTL
#define mmRPB_PERF_COUNTER_CNTL_BASE_IDX
#define mmRPB_PERF_COUNTER_STATUS
#define mmRPB_PERF_COUNTER_STATUS_BASE_IDX
#define mmRPB_PERFCOUNTER_LO
#define mmRPB_PERFCOUNTER_LO_BASE_IDX
#define mmRPB_PERFCOUNTER_HI
#define mmRPB_PERFCOUNTER_HI_BASE_IDX
#define mmRPB_PERFCOUNTER0_CFG
#define mmRPB_PERFCOUNTER0_CFG_BASE_IDX
#define mmRPB_PERFCOUNTER1_CFG
#define mmRPB_PERFCOUNTER1_CFG_BASE_IDX
#define mmRPB_PERFCOUNTER2_CFG
#define mmRPB_PERFCOUNTER2_CFG_BASE_IDX
#define mmRPB_PERFCOUNTER3_CFG
#define mmRPB_PERFCOUNTER3_CFG_BASE_IDX
#define mmRPB_PERFCOUNTER_RSLT_CNTL
#define mmRPB_PERFCOUNTER_RSLT_CNTL_BASE_IDX
#define mmRPB_RD_QUEUE_CNTL
#define mmRPB_RD_QUEUE_CNTL_BASE_IDX
#define mmRPB_RD_QUEUE_CNTL2
#define mmRPB_RD_QUEUE_CNTL2_BASE_IDX
#define mmRPB_WR_QUEUE_CNTL
#define mmRPB_WR_QUEUE_CNTL_BASE_IDX
#define mmRPB_WR_QUEUE_CNTL2
#define mmRPB_WR_QUEUE_CNTL2_BASE_IDX
#define mmRPB_ATS_CNTL
#define mmRPB_ATS_CNTL_BASE_IDX
#define mmRPB_ATS_CNTL2
#define mmRPB_ATS_CNTL2_BASE_IDX
#define mmRPB_ATS_CNTL3
#define mmRPB_ATS_CNTL3_BASE_IDX
#define mmRPB_DF_SDPPORT_CNTL
#define mmRPB_DF_SDPPORT_CNTL_BASE_IDX
#define mmRPB_SDPPORT_CNTL
#define mmRPB_SDPPORT_CNTL_BASE_IDX
#define mmRPB_NBIF_SDPPORT_CNTL
#define mmRPB_NBIF_SDPPORT_CNTL_BASE_IDX

#endif