kfd_pm4_headers_ai.h | Explore in Territory

/* SPDX-License-Identifier: GPL-2.0 OR MIT */
/*
 * Copyright 2016-2022 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */

#ifndef F32_MES_PM4_PACKETS_H
#define F32_MES_PM4_PACKETS_H

#ifndef PM4_MES_HEADER_DEFINED
#define PM4_MES_HEADER_DEFINED
PM4_MES_TYPE_3_HEADER;
#endif /* PM4_MES_HEADER_DEFINED */

/*--------------------MES_SET_RESOURCES--------------------*/

#ifndef PM4_MES_SET_RESOURCES_DEFINED
#define PM4_MES_SET_RESOURCES_DEFINED
enum mes_set_resources_queue_type_enum { … };


struct pm4_mes_set_resources { … };
#endif

/*--------------------MES_RUN_LIST--------------------*/

#ifndef PM4_MES_RUN_LIST_DEFINED
#define PM4_MES_RUN_LIST_DEFINED

struct pm4_mes_runlist { … };
#endif

/*--------------------MES_MAP_PROCESS--------------------*/

#ifndef PM4_MES_MAP_PROCESS_DEFINED
#define PM4_MES_MAP_PROCESS_DEFINED

struct pm4_mes_map_process { … };

#endif

/*--------------------MES_MAP_PROCESS_VM--------------------*/

#ifndef PM4_MES_MAP_PROCESS_VM_DEFINED
#define PM4_MES_MAP_PROCESS_VM_DEFINED

struct PM4_MES_MAP_PROCESS_VM { … };
#endif

/*--------------------MES_MAP_QUEUES--------------------*/

#ifndef PM4_MES_MAP_QUEUES_VI_DEFINED
#define PM4_MES_MAP_QUEUES_VI_DEFINED
enum mes_map_queues_queue_sel_enum { … };

enum mes_map_queues_queue_type_enum { … };

enum mes_map_queues_engine_sel_enum { … };

enum mes_map_queues_extended_engine_sel_enum { … };

struct pm4_mes_map_queues { … };
#endif

/*--------------------MES_QUERY_STATUS--------------------*/

#ifndef PM4_MES_QUERY_STATUS_DEFINED
#define PM4_MES_QUERY_STATUS_DEFINED
enum mes_query_status_interrupt_sel_enum { … };

enum mes_query_status_command_enum { … };

enum mes_query_status_engine_sel_enum { … };

struct pm4_mes_query_status { … };
#endif

/*--------------------MES_UNMAP_QUEUES--------------------*/

#ifndef PM4_MES_UNMAP_QUEUES_DEFINED
#define PM4_MES_UNMAP_QUEUES_DEFINED
enum mes_unmap_queues_action_enum { … };

enum mes_unmap_queues_queue_sel_enum { … };

enum mes_unmap_queues_engine_sel_enum { … };

enum mes_unmap_queues_extended_engine_sel_enum { … };

struct pm4_mes_unmap_queues { … };
#endif

#ifndef PM4_MEC_RELEASE_MEM_DEFINED
#define PM4_MEC_RELEASE_MEM_DEFINED

enum mec_release_mem_event_index_enum { … };

enum mec_release_mem_cache_policy_enum { … };

enum mec_release_mem_pq_exe_status_enum { … };

enum mec_release_mem_dst_sel_enum { … };

enum mec_release_mem_int_sel_enum { … };

enum mec_release_mem_data_sel_enum { … };

struct pm4_mec_release_mem { … };

#endif

#ifndef PM4_MEC_WRITE_DATA_DEFINED
#define PM4_MEC_WRITE_DATA_DEFINED

enum WRITE_DATA_dst_sel_enum { … };

enum WRITE_DATA_addr_incr_enum { … };

enum WRITE_DATA_wr_confirm_enum { … };

enum WRITE_DATA_cache_policy_enum { … };


struct pm4_mec_write_data_mmio { … };

#endif

enum { … };
#endif
linux/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h
