linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_default.h

/*
 * Copyright (C) 2017  Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included
 * in all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */
#ifndef _sdma0_4_1_DEFAULT_HEADER
#define _sdma0_4_1_DEFAULT_HEADER


// addressBlock: sdma0_sdma0dec
#define mmSDMA0_UCODE_ADDR_DEFAULT
#define mmSDMA0_UCODE_DATA_DEFAULT
#define mmSDMA0_VM_CNTL_DEFAULT
#define mmSDMA0_VM_CTX_LO_DEFAULT
#define mmSDMA0_VM_CTX_HI_DEFAULT
#define mmSDMA0_ACTIVE_FCN_ID_DEFAULT
#define mmSDMA0_VM_CTX_CNTL_DEFAULT
#define mmSDMA0_VIRT_RESET_REQ_DEFAULT
#define mmSDMA0_CONTEXT_REG_TYPE0_DEFAULT
#define mmSDMA0_CONTEXT_REG_TYPE1_DEFAULT
#define mmSDMA0_CONTEXT_REG_TYPE2_DEFAULT
#define mmSDMA0_CONTEXT_REG_TYPE3_DEFAULT
#define mmSDMA0_PUB_REG_TYPE0_DEFAULT
#define mmSDMA0_PUB_REG_TYPE1_DEFAULT
#define mmSDMA0_PUB_REG_TYPE2_DEFAULT
#define mmSDMA0_PUB_REG_TYPE3_DEFAULT
#define mmSDMA0_MMHUB_CNTL_DEFAULT
#define mmSDMA0_CONTEXT_GROUP_BOUNDARY_DEFAULT
#define mmSDMA0_POWER_CNTL_DEFAULT
#define mmSDMA0_CLK_CTRL_DEFAULT
#define mmSDMA0_CNTL_DEFAULT
#define mmSDMA0_CHICKEN_BITS_DEFAULT
#define mmSDMA0_GB_ADDR_CONFIG_DEFAULT
#define mmSDMA0_GB_ADDR_CONFIG_READ_DEFAULT
#define mmSDMA0_RB_RPTR_FETCH_HI_DEFAULT
#define mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL_DEFAULT
#define mmSDMA0_RB_RPTR_FETCH_DEFAULT
#define mmSDMA0_IB_OFFSET_FETCH_DEFAULT
#define mmSDMA0_PROGRAM_DEFAULT
#define mmSDMA0_STATUS_REG_DEFAULT
#define mmSDMA0_STATUS1_REG_DEFAULT
#define mmSDMA0_RD_BURST_CNTL_DEFAULT
#define mmSDMA0_HBM_PAGE_CONFIG_DEFAULT
#define mmSDMA0_UCODE_CHECKSUM_DEFAULT
#define mmSDMA0_F32_CNTL_DEFAULT
#define mmSDMA0_FREEZE_DEFAULT
#define mmSDMA0_PHASE0_QUANTUM_DEFAULT
#define mmSDMA0_PHASE1_QUANTUM_DEFAULT
#define mmSDMA_POWER_GATING_DEFAULT
#define mmSDMA_PGFSM_CONFIG_DEFAULT
#define mmSDMA_PGFSM_WRITE_DEFAULT
#define mmSDMA_PGFSM_READ_DEFAULT
#define mmSDMA0_EDC_CONFIG_DEFAULT
#define mmSDMA0_BA_THRESHOLD_DEFAULT
#define mmSDMA0_ID_DEFAULT
#define mmSDMA0_VERSION_DEFAULT
#define mmSDMA0_EDC_COUNTER_DEFAULT
#define mmSDMA0_EDC_COUNTER_CLEAR_DEFAULT
#define mmSDMA0_STATUS2_REG_DEFAULT
#define mmSDMA0_ATOMIC_CNTL_DEFAULT
#define mmSDMA0_ATOMIC_PREOP_LO_DEFAULT
#define mmSDMA0_ATOMIC_PREOP_HI_DEFAULT
#define mmSDMA0_UTCL1_CNTL_DEFAULT
#define mmSDMA0_UTCL1_WATERMK_DEFAULT
#define mmSDMA0_UTCL1_RD_STATUS_DEFAULT
#define mmSDMA0_UTCL1_WR_STATUS_DEFAULT
#define mmSDMA0_UTCL1_INV0_DEFAULT
#define mmSDMA0_UTCL1_INV1_DEFAULT
#define mmSDMA0_UTCL1_INV2_DEFAULT
#define mmSDMA0_UTCL1_RD_XNACK0_DEFAULT
#define mmSDMA0_UTCL1_RD_XNACK1_DEFAULT
#define mmSDMA0_UTCL1_WR_XNACK0_DEFAULT
#define mmSDMA0_UTCL1_WR_XNACK1_DEFAULT
#define mmSDMA0_UTCL1_TIMEOUT_DEFAULT
#define mmSDMA0_UTCL1_PAGE_DEFAULT
#define mmSDMA0_POWER_CNTL_IDLE_DEFAULT
#define mmSDMA0_RELAX_ORDERING_LUT_DEFAULT
#define mmSDMA0_CHICKEN_BITS_2_DEFAULT
#define mmSDMA0_STATUS3_REG_DEFAULT
#define mmSDMA0_PHYSICAL_ADDR_LO_DEFAULT
#define mmSDMA0_PHYSICAL_ADDR_HI_DEFAULT
#define mmSDMA0_ERROR_LOG_DEFAULT
#define mmSDMA0_PUB_DUMMY_REG0_DEFAULT
#define mmSDMA0_PUB_DUMMY_REG1_DEFAULT
#define mmSDMA0_PUB_DUMMY_REG2_DEFAULT
#define mmSDMA0_PUB_DUMMY_REG3_DEFAULT
#define mmSDMA0_F32_COUNTER_DEFAULT
#define mmSDMA0_UNBREAKABLE_DEFAULT
#define mmSDMA0_PERFMON_CNTL_DEFAULT
#define mmSDMA0_PERFCOUNTER0_RESULT_DEFAULT
#define mmSDMA0_PERFCOUNTER1_RESULT_DEFAULT
#define mmSDMA0_PERFCOUNTER_TAG_DELAY_RANGE_DEFAULT
#define mmSDMA0_CRD_CNTL_DEFAULT
#define mmSDMA0_MMHUB_TRUSTLVL_DEFAULT
#define mmSDMA0_GPU_IOV_VIOLATION_LOG_DEFAULT
#define mmSDMA0_ULV_CNTL_DEFAULT
#define mmSDMA0_EA_DBIT_ADDR_DATA_DEFAULT
#define mmSDMA0_EA_DBIT_ADDR_INDEX_DEFAULT
#define mmSDMA0_GFX_RB_CNTL_DEFAULT
#define mmSDMA0_GFX_RB_BASE_DEFAULT
#define mmSDMA0_GFX_RB_BASE_HI_DEFAULT
#define mmSDMA0_GFX_RB_RPTR_DEFAULT
#define mmSDMA0_GFX_RB_RPTR_HI_DEFAULT
#define mmSDMA0_GFX_RB_WPTR_DEFAULT
#define mmSDMA0_GFX_RB_WPTR_HI_DEFAULT
#define mmSDMA0_GFX_RB_WPTR_POLL_CNTL_DEFAULT
#define mmSDMA0_GFX_RB_RPTR_ADDR_HI_DEFAULT
#define mmSDMA0_GFX_RB_RPTR_ADDR_LO_DEFAULT
#define mmSDMA0_GFX_IB_CNTL_DEFAULT
#define mmSDMA0_GFX_IB_RPTR_DEFAULT
#define mmSDMA0_GFX_IB_OFFSET_DEFAULT
#define mmSDMA0_GFX_IB_BASE_LO_DEFAULT
#define mmSDMA0_GFX_IB_BASE_HI_DEFAULT
#define mmSDMA0_GFX_IB_SIZE_DEFAULT
#define mmSDMA0_GFX_SKIP_CNTL_DEFAULT
#define mmSDMA0_GFX_CONTEXT_STATUS_DEFAULT
#define mmSDMA0_GFX_DOORBELL_DEFAULT
#define mmSDMA0_GFX_CONTEXT_CNTL_DEFAULT
#define mmSDMA0_GFX_STATUS_DEFAULT
#define mmSDMA0_GFX_DOORBELL_LOG_DEFAULT
#define mmSDMA0_GFX_WATERMARK_DEFAULT
#define mmSDMA0_GFX_DOORBELL_OFFSET_DEFAULT
#define mmSDMA0_GFX_CSA_ADDR_LO_DEFAULT
#define mmSDMA0_GFX_CSA_ADDR_HI_DEFAULT
#define mmSDMA0_GFX_IB_SUB_REMAIN_DEFAULT
#define mmSDMA0_GFX_PREEMPT_DEFAULT
#define mmSDMA0_GFX_DUMMY_REG_DEFAULT
#define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI_DEFAULT
#define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO_DEFAULT
#define mmSDMA0_GFX_RB_AQL_CNTL_DEFAULT
#define mmSDMA0_GFX_MINOR_PTR_UPDATE_DEFAULT
#define mmSDMA0_GFX_MIDCMD_DATA0_DEFAULT
#define mmSDMA0_GFX_MIDCMD_DATA1_DEFAULT
#define mmSDMA0_GFX_MIDCMD_DATA2_DEFAULT
#define mmSDMA0_GFX_MIDCMD_DATA3_DEFAULT
#define mmSDMA0_GFX_MIDCMD_DATA4_DEFAULT
#define mmSDMA0_GFX_MIDCMD_DATA5_DEFAULT
#define mmSDMA0_GFX_MIDCMD_DATA6_DEFAULT
#define mmSDMA0_GFX_MIDCMD_DATA7_DEFAULT
#define mmSDMA0_GFX_MIDCMD_DATA8_DEFAULT
#define mmSDMA0_GFX_MIDCMD_CNTL_DEFAULT
#define mmSDMA0_RLC0_RB_CNTL_DEFAULT
#define mmSDMA0_RLC0_RB_BASE_DEFAULT
#define mmSDMA0_RLC0_RB_BASE_HI_DEFAULT
#define mmSDMA0_RLC0_RB_RPTR_DEFAULT
#define mmSDMA0_RLC0_RB_RPTR_HI_DEFAULT
#define mmSDMA0_RLC0_RB_WPTR_DEFAULT
#define mmSDMA0_RLC0_RB_WPTR_HI_DEFAULT
#define mmSDMA0_RLC0_RB_WPTR_POLL_CNTL_DEFAULT
#define mmSDMA0_RLC0_RB_RPTR_ADDR_HI_DEFAULT
#define mmSDMA0_RLC0_RB_RPTR_ADDR_LO_DEFAULT
#define mmSDMA0_RLC0_IB_CNTL_DEFAULT
#define mmSDMA0_RLC0_IB_RPTR_DEFAULT
#define mmSDMA0_RLC0_IB_OFFSET_DEFAULT
#define mmSDMA0_RLC0_IB_BASE_LO_DEFAULT
#define mmSDMA0_RLC0_IB_BASE_HI_DEFAULT
#define mmSDMA0_RLC0_IB_SIZE_DEFAULT
#define mmSDMA0_RLC0_SKIP_CNTL_DEFAULT
#define mmSDMA0_RLC0_CONTEXT_STATUS_DEFAULT
#define mmSDMA0_RLC0_DOORBELL_DEFAULT
#define mmSDMA0_RLC0_STATUS_DEFAULT
#define mmSDMA0_RLC0_DOORBELL_LOG_DEFAULT
#define mmSDMA0_RLC0_WATERMARK_DEFAULT
#define mmSDMA0_RLC0_DOORBELL_OFFSET_DEFAULT
#define mmSDMA0_RLC0_CSA_ADDR_LO_DEFAULT
#define mmSDMA0_RLC0_CSA_ADDR_HI_DEFAULT
#define mmSDMA0_RLC0_IB_SUB_REMAIN_DEFAULT
#define mmSDMA0_RLC0_PREEMPT_DEFAULT
#define mmSDMA0_RLC0_DUMMY_REG_DEFAULT
#define mmSDMA0_RLC0_RB_WPTR_POLL_ADDR_HI_DEFAULT
#define mmSDMA0_RLC0_RB_WPTR_POLL_ADDR_LO_DEFAULT
#define mmSDMA0_RLC0_RB_AQL_CNTL_DEFAULT
#define mmSDMA0_RLC0_MINOR_PTR_UPDATE_DEFAULT
#define mmSDMA0_RLC0_MIDCMD_DATA0_DEFAULT
#define mmSDMA0_RLC0_MIDCMD_DATA1_DEFAULT
#define mmSDMA0_RLC0_MIDCMD_DATA2_DEFAULT
#define mmSDMA0_RLC0_MIDCMD_DATA3_DEFAULT
#define mmSDMA0_RLC0_MIDCMD_DATA4_DEFAULT
#define mmSDMA0_RLC0_MIDCMD_DATA5_DEFAULT
#define mmSDMA0_RLC0_MIDCMD_DATA6_DEFAULT
#define mmSDMA0_RLC0_MIDCMD_DATA7_DEFAULT
#define mmSDMA0_RLC0_MIDCMD_DATA8_DEFAULT
#define mmSDMA0_RLC0_MIDCMD_CNTL_DEFAULT
#define mmSDMA0_RLC1_RB_CNTL_DEFAULT
#define mmSDMA0_RLC1_RB_BASE_DEFAULT
#define mmSDMA0_RLC1_RB_BASE_HI_DEFAULT
#define mmSDMA0_RLC1_RB_RPTR_DEFAULT
#define mmSDMA0_RLC1_RB_RPTR_HI_DEFAULT
#define mmSDMA0_RLC1_RB_WPTR_DEFAULT
#define mmSDMA0_RLC1_RB_WPTR_HI_DEFAULT
#define mmSDMA0_RLC1_RB_WPTR_POLL_CNTL_DEFAULT
#define mmSDMA0_RLC1_RB_RPTR_ADDR_HI_DEFAULT
#define mmSDMA0_RLC1_RB_RPTR_ADDR_LO_DEFAULT
#define mmSDMA0_RLC1_IB_CNTL_DEFAULT
#define mmSDMA0_RLC1_IB_RPTR_DEFAULT
#define mmSDMA0_RLC1_IB_OFFSET_DEFAULT
#define mmSDMA0_RLC1_IB_BASE_LO_DEFAULT
#define mmSDMA0_RLC1_IB_BASE_HI_DEFAULT
#define mmSDMA0_RLC1_IB_SIZE_DEFAULT
#define mmSDMA0_RLC1_SKIP_CNTL_DEFAULT
#define mmSDMA0_RLC1_CONTEXT_STATUS_DEFAULT
#define mmSDMA0_RLC1_DOORBELL_DEFAULT
#define mmSDMA0_RLC1_STATUS_DEFAULT
#define mmSDMA0_RLC1_DOORBELL_LOG_DEFAULT
#define mmSDMA0_RLC1_WATERMARK_DEFAULT
#define mmSDMA0_RLC1_DOORBELL_OFFSET_DEFAULT
#define mmSDMA0_RLC1_CSA_ADDR_LO_DEFAULT
#define mmSDMA0_RLC1_CSA_ADDR_HI_DEFAULT
#define mmSDMA0_RLC1_IB_SUB_REMAIN_DEFAULT
#define mmSDMA0_RLC1_PREEMPT_DEFAULT
#define mmSDMA0_RLC1_DUMMY_REG_DEFAULT
#define mmSDMA0_RLC1_RB_WPTR_POLL_ADDR_HI_DEFAULT
#define mmSDMA0_RLC1_RB_WPTR_POLL_ADDR_LO_DEFAULT
#define mmSDMA0_RLC1_RB_AQL_CNTL_DEFAULT
#define mmSDMA0_RLC1_MINOR_PTR_UPDATE_DEFAULT
#define mmSDMA0_RLC1_MIDCMD_DATA0_DEFAULT
#define mmSDMA0_RLC1_MIDCMD_DATA1_DEFAULT
#define mmSDMA0_RLC1_MIDCMD_DATA2_DEFAULT
#define mmSDMA0_RLC1_MIDCMD_DATA3_DEFAULT
#define mmSDMA0_RLC1_MIDCMD_DATA4_DEFAULT
#define mmSDMA0_RLC1_MIDCMD_DATA5_DEFAULT
#define mmSDMA0_RLC1_MIDCMD_DATA6_DEFAULT
#define mmSDMA0_RLC1_MIDCMD_DATA7_DEFAULT
#define mmSDMA0_RLC1_MIDCMD_DATA8_DEFAULT
#define mmSDMA0_RLC1_MIDCMD_CNTL_DEFAULT

#endif