linux/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c

/*
 * Copyright 2023 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */

#include "kfd_events.h"
#include "kfd_debug.h"
#include "soc15_int.h"
#include "kfd_device_queue_manager.h"

/*
 * GFX10 SQ Interrupts
 *
 * There are 3 encoding types of interrupts sourced from SQ sent as a 44-bit
 * packet to the Interrupt Handler:
 * Auto - Generated by the SQG (various cmd overflows, timestamps etc)
 * Wave - Generated by S_SENDMSG through a shader program
 * Error - HW generated errors (Illegal instructions, Memviols, EDC etc)
 *
 * The 44-bit packet is mapped as {context_id1[7:0],context_id0[31:0]} plus
 * 4-bits for VMID (SOC15_VMID_FROM_IH_ENTRY) as such:
 *
 * - context_id1[7:6]
 * Encoding type (0 = Auto, 1 = Wave, 2 = Error)
 *
 * - context_id0[24]
 * PRIV bit indicates that Wave S_SEND or error occurred within trap
 *
 * - context_id0[22:0]
 * 23-bit data with the following layout per encoding type:
 * Auto - only context_id0[8:0] is used, which reports various interrupts
 * generated by SQG.  The rest is 0.
 * Wave - user data sent from m0 via S_SENDMSG
 * Error - Error type (context_id0[22:19]), Error Details (rest of bits)
 *
 * The other context_id bits show coordinates (SE/SH/CU/SIMD/WGP) for wave
 * S_SENDMSG and Errors.  These are 0 for Auto.
 */

enum SQ_INTERRUPT_WORD_ENCODING {};

enum SQ_INTERRUPT_ERROR_TYPE {};

/* SQ_INTERRUPT_WORD_AUTO_CTXID */
#define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE__SHIFT
#define SQ_INTERRUPT_WORD_AUTO_CTXID0__WLT__SHIFT
#define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE_BUF0_FULL__SHIFT
#define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE_BUF1_FULL__SHIFT
#define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE_UTC_ERROR__SHIFT
#define SQ_INTERRUPT_WORD_AUTO_CTXID1__SE_ID__SHIFT
#define SQ_INTERRUPT_WORD_AUTO_CTXID1__ENCODING__SHIFT

#define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE_MASK
#define SQ_INTERRUPT_WORD_AUTO_CTXID0__WLT_MASK
#define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE_BUF0_FULL_MASK
#define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE_BUF1_FULL_MASK
#define SQ_INTERRUPT_WORD_AUTO_CTXID0__THREAD_TRACE_UTC_ERROR_MASK
#define SQ_INTERRUPT_WORD_AUTO_CTXID1__SE_ID_MASK
#define SQ_INTERRUPT_WORD_AUTO_CTXID1__ENCODING_MASK

/* SQ_INTERRUPT_WORD_WAVE_CTXID */
#define SQ_INTERRUPT_WORD_WAVE_CTXID0__DATA__SHIFT
#define SQ_INTERRUPT_WORD_WAVE_CTXID0__SA_ID__SHIFT
#define SQ_INTERRUPT_WORD_WAVE_CTXID0__PRIV__SHIFT
#define SQ_INTERRUPT_WORD_WAVE_CTXID0__WAVE_ID__SHIFT
#define SQ_INTERRUPT_WORD_WAVE_CTXID0__SIMD_ID__SHIFT
#define SQ_INTERRUPT_WORD_WAVE_CTXID1__WGP_ID__SHIFT
#define SQ_INTERRUPT_WORD_WAVE_CTXID1__SE_ID__SHIFT
#define SQ_INTERRUPT_WORD_WAVE_CTXID1__ENCODING__SHIFT

#define SQ_INTERRUPT_WORD_WAVE_CTXID0__DATA_MASK
#define SQ_INTERRUPT_WORD_WAVE_CTXID0__SA_ID_MASK
#define SQ_INTERRUPT_WORD_WAVE_CTXID0__PRIV_MASK
#define SQ_INTERRUPT_WORD_WAVE_CTXID0__WAVE_ID_MASK
#define SQ_INTERRUPT_WORD_WAVE_CTXID0__SIMD_ID_MASK
#define SQ_INTERRUPT_WORD_WAVE_CTXID1__WGP_ID_MASK
#define SQ_INTERRUPT_WORD_WAVE_CTXID1__SE_ID_MASK
#define SQ_INTERRUPT_WORD_WAVE_CTXID1__ENCODING_MASK

#define KFD_CTXID0__ERR_TYPE_MASK
#define KFD_CTXID0__ERR_TYPE__SHIFT

/* GFX10 SQ interrupt ENC type bit (context_id1[7:6]) for wave s_sendmsg */
#define KFD_CONTEXT_ID1_ENC_TYPE_WAVE_MASK
/* GFX10 SQ interrupt PRIV bit (context_id0[24]) for s_sendmsg inside trap */
#define KFD_CONTEXT_ID0_PRIV_MASK
/*
 * The debugger will send user data(m0) with PRIV=1 to indicate it requires
 * notification from the KFD with the following queue id (DOORBELL_ID) and
 * trap code (TRAP_CODE).
 */
#define KFD_CONTEXT_ID0_DEBUG_DOORBELL_MASK
#define KFD_CONTEXT_ID0_DEBUG_TRAP_CODE_SHIFT
#define KFD_CONTEXT_ID0_DEBUG_TRAP_CODE_MASK
#define KFD_DEBUG_DOORBELL_ID(ctxid0)
#define KFD_DEBUG_TRAP_CODE(ctxid0)
#define KFD_DEBUG_CP_BAD_OP_ECODE_MASK
#define KFD_DEBUG_CP_BAD_OP_ECODE_SHIFT
#define KFD_DEBUG_CP_BAD_OP_ECODE(ctxid0)

static void event_interrupt_poison_consumption(struct kfd_node *dev,
				uint16_t pasid, uint16_t client_id)
{}

static bool event_interrupt_isr_v10(struct kfd_node *dev,
					const uint32_t *ih_ring_entry,
					uint32_t *patched_ihre,
					bool *patched_flag)
{}

static void event_interrupt_wq_v10(struct kfd_node *dev,
					const uint32_t *ih_ring_entry)
{}

const struct kfd_event_interrupt_class event_interrupt_class_v10 =;