linux/drivers/gpio/gpio-graniterapids.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Intel Granite Rapids-D vGPIO driver
 *
 * Copyright (c) 2024, Intel Corporation.
 *
 * Author: Aapo Vienamo <[email protected]>
 */

#include <linux/array_size.h>
#include <linux/bitfield.h>
#include <linux/bitmap.h>
#include <linux/cleanup.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/gfp_types.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/math.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/overflow.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/spinlock.h>
#include <linux/types.h>

#include <linux/gpio/driver.h>

#define GNR_NUM_PINS
#define GNR_PINS_PER_REG
#define GNR_NUM_REGS

#define GNR_CFG_BAR
#define GNR_CFG_LOCK_OFFSET
#define GNR_GPI_STATUS_OFFSET
#define GNR_GPI_ENABLE_OFFSET

#define GNR_CFG_DW_RX_MASK
#define GNR_CFG_DW_RX_DISABLE
#define GNR_CFG_DW_RX_EDGE
#define GNR_CFG_DW_RX_LEVEL
#define GNR_CFG_DW_RXDIS
#define GNR_CFG_DW_TXDIS
#define GNR_CFG_DW_RXSTATE
#define GNR_CFG_DW_TXSTATE

/**
 * struct gnr_gpio - Intel Granite Rapids-D vGPIO driver state
 * @gc: GPIO controller interface
 * @reg_base: base address of the GPIO registers
 * @ro_bitmap: bitmap of read-only pins
 * @lock: guard the registers
 * @pad_backup: backup of the register state for suspend
 */
struct gnr_gpio {};

static void __iomem *gnr_gpio_get_padcfg_addr(const struct gnr_gpio *priv,
					      unsigned int gpio)
{}

static int gnr_gpio_configure_line(struct gpio_chip *gc, unsigned int gpio,
				   u32 clear_mask, u32 set_mask)
{}

static int gnr_gpio_get(struct gpio_chip *gc, unsigned int gpio)
{}

static void gnr_gpio_set(struct gpio_chip *gc, unsigned int gpio, int value)
{}

static int gnr_gpio_get_direction(struct gpio_chip *gc, unsigned int gpio)
{}

static int gnr_gpio_direction_input(struct gpio_chip *gc, unsigned int gpio)
{}

static int gnr_gpio_direction_output(struct gpio_chip *gc, unsigned int gpio, int value)
{}

static const struct gpio_chip gnr_gpio_chip =;

static void __iomem *gnr_gpio_get_reg_addr(const struct gnr_gpio *priv,
					   unsigned int base,
					   unsigned int gpio)
{}

static void gnr_gpio_irq_ack(struct irq_data *d)
{}

static void gnr_gpio_irq_mask_unmask(struct gpio_chip *gc, unsigned long gpio, bool mask)
{}

static void gnr_gpio_irq_mask(struct irq_data *d)
{}

static void gnr_gpio_irq_unmask(struct irq_data *d)
{}

static int gnr_gpio_irq_set_type(struct irq_data *d, unsigned int type)
{}

static const struct irq_chip gnr_gpio_irq_chip =;

static void gnr_gpio_init_pin_ro_bits(struct device *dev,
				      const void __iomem *cfg_lock_base,
				      unsigned long *ro_bitmap)
{}

static irqreturn_t gnr_gpio_irq(int irq, void *data)
{}

static int gnr_gpio_probe(struct platform_device *pdev)
{}

static int gnr_gpio_suspend(struct device *dev)
{}

static int gnr_gpio_resume(struct device *dev)
{}

static DEFINE_SIMPLE_DEV_PM_OPS(gnr_gpio_pm_ops, gnr_gpio_suspend, gnr_gpio_resume);

static const struct acpi_device_id gnr_gpio_acpi_match[] =;
MODULE_DEVICE_TABLE(acpi, gnr_gpio_acpi_match);

static struct platform_driver gnr_gpio_driver =;
module_platform_driver();

MODULE_LICENSE();
MODULE_AUTHOR();
MODULE_DESCRIPTION();