linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_arcturus.h

/*
 * Copyright 2019 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */

#ifndef SMU11_DRIVER_IF_ARCTURUS_H
#define SMU11_DRIVER_IF_ARCTURUS_H

// *** IMPORTANT ***
// SMU TEAM: Always increment the interface version if
// any structure is changed in this file
//#define SMU11_DRIVER_IF_VERSION 0x09

#define PPTABLE_ARCTURUS_SMU_VERSION

#define NUM_GFXCLK_DPM_LEVELS
#define NUM_VCLK_DPM_LEVELS
#define NUM_DCLK_DPM_LEVELS
#define NUM_MP0CLK_DPM_LEVELS
#define NUM_SOCCLK_DPM_LEVELS
#define NUM_UCLK_DPM_LEVELS
#define NUM_FCLK_DPM_LEVELS
#define NUM_XGMI_LEVELS
#define NUM_XGMI_PSTATE_LEVELS

#define MAX_GFXCLK_DPM_LEVEL
#define MAX_VCLK_DPM_LEVEL
#define MAX_DCLK_DPM_LEVEL
#define MAX_MP0CLK_DPM_LEVEL
#define MAX_SOCCLK_DPM_LEVEL
#define MAX_UCLK_DPM_LEVEL
#define MAX_FCLK_DPM_LEVEL
#define MAX_XGMI_LEVEL
#define MAX_XGMI_PSTATE_LEVEL

// Feature Control Defines
// DPM
#define FEATURE_DPM_PREFETCHER_BIT
#define FEATURE_DPM_GFXCLK_BIT
#define FEATURE_DPM_UCLK_BIT
#define FEATURE_DPM_SOCCLK_BIT
#define FEATURE_DPM_FCLK_BIT
#define FEATURE_DPM_MP0CLK_BIT
#define FEATURE_DPM_XGMI_BIT
// Idle
#define FEATURE_DS_GFXCLK_BIT
#define FEATURE_DS_SOCCLK_BIT
#define FEATURE_DS_LCLK_BIT
#define FEATURE_DS_FCLK_BIT
#define FEATURE_DS_UCLK_BIT
#define FEATURE_GFX_ULV_BIT
#define FEATURE_DPM_VCN_BIT
#define FEATURE_RSMU_SMN_CG_BIT
#define FEATURE_WAFL_CG_BIT
// Throttler/Response
#define FEATURE_PPT_BIT
#define FEATURE_TDC_BIT
#define FEATURE_APCC_PLUS_BIT
#define FEATURE_VR0HOT_BIT
#define FEATURE_VR1HOT_BIT
#define FEATURE_FW_CTF_BIT
#define FEATURE_FAN_CONTROL_BIT
#define FEATURE_THERMAL_BIT
// Other
#define FEATURE_OUT_OF_BAND_MONITOR_BIT
#define FEATURE_TEMP_DEPENDENT_VMIN_BIT
#define FEATURE_PER_PART_VMIN_BIT

#define FEATURE_SPARE_27_BIT
#define FEATURE_SPARE_28_BIT
#define FEATURE_SPARE_29_BIT
#define FEATURE_SPARE_30_BIT
#define FEATURE_SPARE_31_BIT
#define FEATURE_SPARE_32_BIT
#define FEATURE_SPARE_33_BIT
#define FEATURE_SPARE_34_BIT
#define FEATURE_SPARE_35_BIT
#define FEATURE_SPARE_36_BIT
#define FEATURE_SPARE_37_BIT
#define FEATURE_SPARE_38_BIT
#define FEATURE_SPARE_39_BIT
#define FEATURE_SPARE_40_BIT
#define FEATURE_SPARE_41_BIT
#define FEATURE_SPARE_42_BIT
#define FEATURE_SPARE_43_BIT
#define FEATURE_SPARE_44_BIT
#define FEATURE_SPARE_45_BIT
#define FEATURE_SPARE_46_BIT
#define FEATURE_SPARE_47_BIT
#define FEATURE_SPARE_48_BIT
#define FEATURE_SPARE_49_BIT
#define FEATURE_SPARE_50_BIT
#define FEATURE_SPARE_51_BIT
#define FEATURE_SPARE_52_BIT
#define FEATURE_SPARE_53_BIT
#define FEATURE_SPARE_54_BIT
#define FEATURE_SPARE_55_BIT
#define FEATURE_SPARE_56_BIT
#define FEATURE_SPARE_57_BIT
#define FEATURE_SPARE_58_BIT
#define FEATURE_SPARE_59_BIT
#define FEATURE_SPARE_60_BIT
#define FEATURE_SPARE_61_BIT
#define FEATURE_SPARE_62_BIT
#define FEATURE_SPARE_63_BIT

#define NUM_FEATURES


#define FEATURE_DPM_PREFETCHER_MASK
#define FEATURE_DPM_GFXCLK_MASK
#define FEATURE_DPM_UCLK_MASK
#define FEATURE_DPM_SOCCLK_MASK
#define FEATURE_DPM_FCLK_MASK
#define FEATURE_DPM_MP0CLK_MASK
#define FEATURE_DPM_XGMI_MASK

#define FEATURE_DS_GFXCLK_MASK
#define FEATURE_DS_SOCCLK_MASK
#define FEATURE_DS_LCLK_MASK
#define FEATURE_DS_FCLK_MASK
#define FEATURE_DS_UCLK_MASK
#define FEATURE_GFX_ULV_MASK
#define FEATURE_DPM_VCN_MASK
#define FEATURE_RSMU_SMN_CG_MASK
#define FEATURE_WAFL_CG_MASK

#define FEATURE_PPT_MASK
#define FEATURE_TDC_MASK
#define FEATURE_APCC_PLUS_MASK
#define FEATURE_VR0HOT_MASK
#define FEATURE_VR1HOT_MASK
#define FEATURE_FW_CTF_MASK
#define FEATURE_FAN_CONTROL_MASK
#define FEATURE_THERMAL_MASK

#define FEATURE_OUT_OF_BAND_MONITOR_MASK
#define FEATURE_TEMP_DEPENDENT_VMIN_MASK
#define FEATURE_PER_PART_VMIN_MASK


//FIXME need updating
// Debug Overrides Bitmask
#define DPM_OVERRIDE_DISABLE_UCLK_PID
#define DPM_OVERRIDE_DISABLE_VOLT_LINK_VCN_FCLK

// I2C Config Bit Defines
#define I2C_CONTROLLER_ENABLED
#define I2C_CONTROLLER_DISABLED

// VR Mapping Bit Defines
#define VR_MAPPING_VR_SELECT_MASK
#define VR_MAPPING_VR_SELECT_SHIFT

#define VR_MAPPING_PLANE_SELECT_MASK
#define VR_MAPPING_PLANE_SELECT_SHIFT

// PSI Bit Defines
#define PSI_SEL_VR0_PLANE0_PSI0
#define PSI_SEL_VR0_PLANE0_PSI1
#define PSI_SEL_VR0_PLANE1_PSI0
#define PSI_SEL_VR0_PLANE1_PSI1
#define PSI_SEL_VR1_PLANE0_PSI0
#define PSI_SEL_VR1_PLANE0_PSI1
#define PSI_SEL_VR1_PLANE1_PSI0
#define PSI_SEL_VR1_PLANE1_PSI1

// Throttler Control/Status Bits
#define THROTTLER_PADDING_BIT
#define THROTTLER_TEMP_EDGE_BIT
#define THROTTLER_TEMP_HOTSPOT_BIT
#define THROTTLER_TEMP_MEM_BIT
#define THROTTLER_TEMP_VR_GFX_BIT
#define THROTTLER_TEMP_VR_MEM_BIT
#define THROTTLER_TEMP_VR_SOC_BIT
#define THROTTLER_TDC_GFX_BIT
#define THROTTLER_TDC_SOC_BIT
#define THROTTLER_PPT0_BIT
#define THROTTLER_PPT1_BIT
#define THROTTLER_PPT2_BIT
#define THROTTLER_PPT3_BIT
#define THROTTLER_PPM_BIT
#define THROTTLER_FIT_BIT
#define THROTTLER_APCC_BIT
#define THROTTLER_VRHOT0_BIT
#define THROTTLER_VRHOT1_BIT

// Table transfer status
#define TABLE_TRANSFER_OK
#define TABLE_TRANSFER_FAILED
#define TABLE_TRANSFER_PENDING

// Workload bits
#define WORKLOAD_PPLIB_DEFAULT_BIT
#define WORKLOAD_PPLIB_POWER_SAVING_BIT
#define WORKLOAD_PPLIB_VIDEO_BIT
#define WORKLOAD_PPLIB_COMPUTE_BIT
#define WORKLOAD_PPLIB_CUSTOM_BIT
#define WORKLOAD_PPLIB_COUNT

//XGMI performance states
#define XGMI_STATE_D0
#define XGMI_STATE_D3

#define NUM_I2C_CONTROLLERS

#define I2C_CONTROLLER_ENABLED
#define I2C_CONTROLLER_DISABLED

#define MAX_SW_I2C_COMMANDS

I2cControllerPort_e;

I2cControllerName_e;

I2cControllerThrottler_e;

I2cControllerProtocol_e;

I2cControllerConfig_t;

I2cPort_e;

I2cSpeed_e;

I2cCmdType_e;

#define CMDCONFIG_STOP_BIT
#define CMDCONFIG_RESTART_BIT

#define CMDCONFIG_STOP_MASK
#define CMDCONFIG_RESTART_MASK

SwI2cCmd_t; //SW I2C Command Table

SwI2cRequest_t; // SW I2C Request Table

//D3HOT sequences
D3HOTSequence_e;

//THis is aligned with RSMU PGFSM Register Mapping
PowerGatingMode_e;

//This is aligned with RSMU PGFSM Register Mapping
PowerGatingSettings_e;

QuadraticInt_t;

LinearInt_t;

DroopInt_t;

GfxclkSrc_e;

PPCLK_e;

POWER_SOURCE_e;

TEMP_TYPE_e;

PPT_THROTTLER_e;

VOLTAGE_MODE_e;

AVFS_VOLTAGE_TYPE_e;

GpioIntPolarity_e;

MemoryType_e;

PwrConfig_e;

XGMI_LINK_RATE_e;

XGMI_LINK_WIDTH_e;

DpmDescriptor_t;

#pragma pack(push, 1)
PPTable_t;
#pragma pack(pop)

DriverSmuConfig_t;

SmuMetrics_t;


AvfsDebugTable_t;

AvfsFuseOverride_t;

DpmActivityMonitorCoeffInt_t;

// These defines are used with the following messages:
// SMC_MSG_TransferTableDram2Smu
// SMC_MSG_TransferTableSmu2Dram
#define TABLE_PPTABLE
#define TABLE_AVFS
#define TABLE_AVFS_PSM_DEBUG
#define TABLE_AVFS_FUSE_OVERRIDE
#define TABLE_PMSTATUSLOG
#define TABLE_SMU_METRICS
#define TABLE_DRIVER_SMU_CONFIG
#define TABLE_OVERDRIVE
#define TABLE_WAFL_XGMI_TOPOLOGY
#define TABLE_I2C_COMMANDS
#define TABLE_ACTIVITY_MONITOR_COEFF
#define TABLE_COUNT

// These defines are used with the SMC_MSG_SetUclkFastSwitch message.
DF_SWITCH_TYPE_e;

DRAM_BIT_WIDTH_TYPE_e;

#define REMOVE_FMAX_MARGIN_BIT
#define REMOVE_DCTOL_MARGIN_BIT
#define REMOVE_PLATFORM_MARGIN_BIT

#endif