/* * Copyright 2019 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * */ #define SWSMU_CODE_LAYER_L2 #include "amdgpu.h" #include "amdgpu_smu.h" #include "smu_v12_0_ppsmc.h" #include "smu12_driver_if.h" #include "smu_v12_0.h" #include "renoir_ppt.h" #include "smu_cmn.h" /* * DO NOT use these for err/warn/info/debug messages. * Use dev_err, dev_warn, dev_info and dev_dbg instead. * They are more MGPU friendly. */ #undef pr_err #undef pr_warn #undef pr_info #undef pr_debug #define mmMP1_SMN_C2PMSG_66 … #define mmMP1_SMN_C2PMSG_66_BASE_IDX … #define mmMP1_SMN_C2PMSG_82 … #define mmMP1_SMN_C2PMSG_82_BASE_IDX … #define mmMP1_SMN_C2PMSG_90 … #define mmMP1_SMN_C2PMSG_90_BASE_IDX … static struct cmn2asic_msg_mapping renoir_message_map[SMU_MSG_MAX_COUNT] = …; static struct cmn2asic_mapping renoir_clk_map[SMU_CLK_COUNT] = …; static struct cmn2asic_mapping renoir_table_map[SMU_TABLE_COUNT] = …; static struct cmn2asic_mapping renoir_workload_map[PP_SMC_POWER_PROFILE_COUNT] = …; static const uint8_t renoir_throttler_map[] = …; static int renoir_init_smc_tables(struct smu_context *smu) { … } /* * This interface just for getting uclk ultimate freq and should't introduce * other likewise function result in overmuch callback. */ static int renoir_get_dpm_clk_limited(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t dpm_level, uint32_t *freq) { … } static int renoir_get_profiling_clk_mask(struct smu_context *smu, enum amd_dpm_forced_level level, uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *soc_mask) { … } static int renoir_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *min, uint32_t *max) { … } static int renoir_od_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_TABLE_COMMAND type, long input[], uint32_t size) { … } static int renoir_set_fine_grain_gfx_freq_parameters(struct smu_context *smu) { … } static int renoir_print_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, char *buf) { … } static enum amd_pm_state_type renoir_get_current_power_state(struct smu_context *smu) { … } static int renoir_dpm_set_vcn_enable(struct smu_context *smu, bool enable) { … } static int renoir_dpm_set_jpeg_enable(struct smu_context *smu, bool enable) { … } static int renoir_force_dpm_limit_value(struct smu_context *smu, bool highest) { … } static int renoir_unforce_dpm_levels(struct smu_context *smu) { … } /* * This interface get dpm clock table for dc */ static int renoir_get_dpm_clock_table(struct smu_context *smu, struct dpm_clocks *clock_table) { … } static int renoir_force_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t mask) { … } static int renoir_set_power_profile_mode(struct smu_context *smu, long *input, uint32_t size) { … } static int renoir_set_peak_clock_by_device(struct smu_context *smu) { … } static int renior_set_dpm_profile_freq(struct smu_context *smu, enum amd_dpm_forced_level level, enum smu_clk_type clk_type) { … } static int renoir_set_performance_level(struct smu_context *smu, enum amd_dpm_forced_level level) { … } /* save watermark settings into pplib smu structure, * also pass data to smu controller */ static int renoir_set_watermarks_table( struct smu_context *smu, struct pp_smu_wm_range_sets *clock_ranges) { … } static int renoir_get_power_profile_mode(struct smu_context *smu, char *buf) { … } static void renoir_get_ss_power_percent(SmuMetrics_t *metrics, uint32_t *apu_percent, uint32_t *dgpu_percent) { … } static int renoir_get_smu_metrics_data(struct smu_context *smu, MetricsMember_t member, uint32_t *value) { … } static int renoir_read_sensor(struct smu_context *smu, enum amd_pp_sensors sensor, void *data, uint32_t *size) { … } static bool renoir_is_dpm_running(struct smu_context *smu) { … } static ssize_t renoir_get_gpu_metrics(struct smu_context *smu, void **table) { … } static int renoir_gfx_state_change_set(struct smu_context *smu, uint32_t state) { … } static int renoir_get_enabled_mask(struct smu_context *smu, uint64_t *feature_mask) { … } static const struct pptable_funcs renoir_ppt_funcs = …; void renoir_set_ppt_funcs(struct smu_context *smu) { … }
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