/* * Copyright 2020 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * */ #define SWSMU_CODE_LAYER_L2 #include "amdgpu.h" #include "amdgpu_smu.h" #include "smu_v11_0.h" #include "smu11_driver_if_vangogh.h" #include "vangogh_ppt.h" #include "smu_v11_5_ppsmc.h" #include "smu_v11_5_pmfw.h" #include "smu_cmn.h" #include "soc15_common.h" #include "asic_reg/gc/gc_10_3_0_offset.h" #include "asic_reg/gc/gc_10_3_0_sh_mask.h" #include <asm/processor.h> /* * DO NOT use these for err/warn/info/debug messages. * Use dev_err, dev_warn, dev_info and dev_dbg instead. * They are more MGPU friendly. */ #undef pr_err #undef pr_warn #undef pr_info #undef pr_debug // Registers related to GFXOFF // addressBlock: smuio_smuio_SmuSmuioDec // base address: 0x5a000 #define mmSMUIO_GFX_MISC_CNTL … #define mmSMUIO_GFX_MISC_CNTL_BASE_IDX … //SMUIO_GFX_MISC_CNTL #define SMUIO_GFX_MISC_CNTL__SMU_GFX_cold_vs_gfxoff__SHIFT … #define SMUIO_GFX_MISC_CNTL__PWR_GFXOFF_STATUS__SHIFT … #define SMUIO_GFX_MISC_CNTL__SMU_GFX_cold_vs_gfxoff_MASK … #define SMUIO_GFX_MISC_CNTL__PWR_GFXOFF_STATUS_MASK … #define FEATURE_MASK(feature) … #define SMC_DPM_FEATURE … static struct cmn2asic_msg_mapping vangogh_message_map[SMU_MSG_MAX_COUNT] = …; static struct cmn2asic_mapping vangogh_feature_mask_map[SMU_FEATURE_COUNT] = …; static struct cmn2asic_mapping vangogh_table_map[SMU_TABLE_COUNT] = …; static struct cmn2asic_mapping vangogh_workload_map[PP_SMC_POWER_PROFILE_COUNT] = …; static const uint8_t vangogh_throttler_map[] = …; static int vangogh_tables_init(struct smu_context *smu) { … } static int vangogh_get_legacy_smu_metrics_data(struct smu_context *smu, MetricsMember_t member, uint32_t *value) { … } static int vangogh_get_smu_metrics_data(struct smu_context *smu, MetricsMember_t member, uint32_t *value) { … } static int vangogh_common_get_smu_metrics_data(struct smu_context *smu, MetricsMember_t member, uint32_t *value) { … } static int vangogh_allocate_dpm_context(struct smu_context *smu) { … } static int vangogh_init_smc_tables(struct smu_context *smu) { … } static int vangogh_dpm_set_vcn_enable(struct smu_context *smu, bool enable) { … } static int vangogh_dpm_set_jpeg_enable(struct smu_context *smu, bool enable) { … } static bool vangogh_is_dpm_running(struct smu_context *smu) { … } static int vangogh_get_dpm_clk_limited(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t dpm_level, uint32_t *freq) { … } static int vangogh_print_legacy_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, char *buf) { … } static int vangogh_print_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, char *buf) { … } static int vangogh_common_print_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, char *buf) { … } static int vangogh_get_profiling_clk_mask(struct smu_context *smu, enum amd_dpm_forced_level level, uint32_t *vclk_mask, uint32_t *dclk_mask, uint32_t *mclk_mask, uint32_t *fclk_mask, uint32_t *soc_mask) { … } static bool vangogh_clk_dpm_is_enabled(struct smu_context *smu, enum smu_clk_type clk_type) { … } static int vangogh_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *min, uint32_t *max) { … } static int vangogh_get_power_profile_mode(struct smu_context *smu, char *buf) { … } static int vangogh_set_power_profile_mode(struct smu_context *smu, long *input, uint32_t size) { … } static int vangogh_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t min, uint32_t max) { … } static int vangogh_force_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t mask) { … } static int vangogh_force_dpm_limit_value(struct smu_context *smu, bool highest) { … } static int vangogh_unforce_dpm_levels(struct smu_context *smu) { … } static int vangogh_set_peak_clock_by_device(struct smu_context *smu) { … } static int vangogh_set_performance_level(struct smu_context *smu, enum amd_dpm_forced_level level) { … } static int vangogh_read_sensor(struct smu_context *smu, enum amd_pp_sensors sensor, void *data, uint32_t *size) { … } static int vangogh_get_apu_thermal_limit(struct smu_context *smu, uint32_t *limit) { … } static int vangogh_set_apu_thermal_limit(struct smu_context *smu, uint32_t limit) { … } static int vangogh_set_watermarks_table(struct smu_context *smu, struct pp_smu_wm_range_sets *clock_ranges) { … } static ssize_t vangogh_get_legacy_gpu_metrics_v2_3(struct smu_context *smu, void **table) { … } static ssize_t vangogh_get_legacy_gpu_metrics(struct smu_context *smu, void **table) { … } static ssize_t vangogh_get_gpu_metrics_v2_3(struct smu_context *smu, void **table) { … } static ssize_t vangogh_get_gpu_metrics_v2_4(struct smu_context *smu, void **table) { … } static ssize_t vangogh_get_gpu_metrics(struct smu_context *smu, void **table) { … } static ssize_t vangogh_common_get_gpu_metrics(struct smu_context *smu, void **table) { … } static int vangogh_od_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_TABLE_COMMAND type, long input[], uint32_t size) { … } static int vangogh_set_default_dpm_tables(struct smu_context *smu) { … } static int vangogh_set_fine_grain_gfx_freq_parameters(struct smu_context *smu) { … } static int vangogh_get_dpm_clock_table(struct smu_context *smu, struct dpm_clocks *clock_table) { … } static int vangogh_notify_rlc_state(struct smu_context *smu, bool en) { … } static int vangogh_post_smu_init(struct smu_context *smu) { … } static int vangogh_mode_reset(struct smu_context *smu, int type) { … } static int vangogh_mode2_reset(struct smu_context *smu) { … } /** * vangogh_get_gfxoff_status - Get gfxoff status * * @smu: amdgpu_device pointer * * Get current gfxoff status * * Return: * * 0 - GFXOFF (default if enabled). * * 1 - Transition out of GFX State. * * 2 - Not in GFXOFF. * * 3 - Transition into GFXOFF. */ static u32 vangogh_get_gfxoff_status(struct smu_context *smu) { … } static int vangogh_get_power_limit(struct smu_context *smu, uint32_t *current_power_limit, uint32_t *default_power_limit, uint32_t *max_power_limit, uint32_t *min_power_limit) { … } static int vangogh_get_ppt_limit(struct smu_context *smu, uint32_t *ppt_limit, enum smu_ppt_limit_type type, enum smu_ppt_limit_level level) { … } static int vangogh_set_power_limit(struct smu_context *smu, enum smu_ppt_limit_type limit_type, uint32_t ppt_limit) { … } /** * vangogh_set_gfxoff_residency * * @smu: amdgpu_device pointer * @start: start/stop residency log * * This function will be used to log gfxoff residency * * * Returns standard response codes. */ static u32 vangogh_set_gfxoff_residency(struct smu_context *smu, bool start) { … } /** * vangogh_get_gfxoff_residency * * @smu: amdgpu_device pointer * @residency: placeholder for return value * * This function will be used to get gfxoff residency. * * Returns standard response codes. */ static u32 vangogh_get_gfxoff_residency(struct smu_context *smu, uint32_t *residency) { … } /** * vangogh_get_gfxoff_entrycount - get gfxoff entry count * * @smu: amdgpu_device pointer * @entrycount: placeholder for return value * * This function will be used to get gfxoff entry count * * Returns standard response codes. */ static u32 vangogh_get_gfxoff_entrycount(struct smu_context *smu, uint64_t *entrycount) { … } static const struct pptable_funcs vangogh_ppt_funcs = …; void vangogh_set_ppt_funcs(struct smu_context *smu) { … }
Codebase Browser
linux