/* * Copyright 2020 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * */ #ifndef SMU13_DRIVER_IF_ALDEBARAN_H #define SMU13_DRIVER_IF_ALDEBARAN_H #define SMU13_DRIVER_IF_VERSION_ALDE … #define NUM_VCLK_DPM_LEVELS … #define NUM_DCLK_DPM_LEVELS … #define NUM_SOCCLK_DPM_LEVELS … #define NUM_LCLK_DPM_LEVELS … #define NUM_UCLK_DPM_LEVELS … #define NUM_FCLK_DPM_LEVELS … #define NUM_XGMI_DPM_LEVELS … // Feature Control Defines #define FEATURE_DATA_CALCULATIONS … #define FEATURE_DPM_GFXCLK_BIT … #define FEATURE_DPM_UCLK_BIT … #define FEATURE_DPM_SOCCLK_BIT … #define FEATURE_DPM_FCLK_BIT … #define FEATURE_DPM_LCLK_BIT … #define FEATURE_DPM_XGMI_BIT … #define FEATURE_DS_GFXCLK_BIT … #define FEATURE_DS_SOCCLK_BIT … #define FEATURE_DS_LCLK_BIT … #define FEATURE_DS_FCLK_BIT … #define FEATURE_DS_UCLK_BIT … #define FEATURE_GFX_SS_BIT … #define FEATURE_DPM_VCN_BIT … #define FEATURE_RSMU_SMN_CG_BIT … #define FEATURE_WAFL_CG_BIT … #define FEATURE_PPT_BIT … #define FEATURE_TDC_BIT … #define FEATURE_APCC_PLUS_BIT … #define FEATURE_APCC_DFLL_BIT … #define FEATURE_FW_CTF_BIT … #define FEATURE_THERMAL_BIT … #define FEATURE_OUT_OF_BAND_MONITOR_BIT … #define FEATURE_SPARE_23_BIT … #define FEATURE_XGMI_PER_LINK_PWR_DWN … #define FEATURE_DF_CSTATE … #define FEATURE_FUSE_CG_BIT … #define FEATURE_MP1_CG_BIT … #define FEATURE_SMUIO_CG_BIT … #define FEATURE_THM_CG_BIT … #define FEATURE_CLK_CG_BIT … #define FEATURE_EDC_BIT … #define FEATURE_SPARE_32_BIT … #define FEATURE_SPARE_33_BIT … #define FEATURE_SPARE_34_BIT … #define FEATURE_SPARE_35_BIT … #define FEATURE_SPARE_36_BIT … #define FEATURE_SPARE_37_BIT … #define FEATURE_SPARE_38_BIT … #define FEATURE_SPARE_39_BIT … #define FEATURE_SPARE_40_BIT … #define FEATURE_SPARE_41_BIT … #define FEATURE_SPARE_42_BIT … #define FEATURE_SPARE_43_BIT … #define FEATURE_SPARE_44_BIT … #define FEATURE_SPARE_45_BIT … #define FEATURE_SPARE_46_BIT … #define FEATURE_SPARE_47_BIT … #define FEATURE_SPARE_48_BIT … #define FEATURE_SPARE_49_BIT … #define FEATURE_SPARE_50_BIT … #define FEATURE_SPARE_51_BIT … #define FEATURE_SPARE_52_BIT … #define FEATURE_SPARE_53_BIT … #define FEATURE_SPARE_54_BIT … #define FEATURE_SPARE_55_BIT … #define FEATURE_SPARE_56_BIT … #define FEATURE_SPARE_57_BIT … #define FEATURE_SPARE_58_BIT … #define FEATURE_SPARE_59_BIT … #define FEATURE_SPARE_60_BIT … #define FEATURE_SPARE_61_BIT … #define FEATURE_SPARE_62_BIT … #define FEATURE_SPARE_63_BIT … #define NUM_FEATURES … // I2C Config Bit Defines #define I2C_CONTROLLER_ENABLED … #define I2C_CONTROLLER_DISABLED … // Throttler Status Bits. // These are aligned with the out of band monitor alarm bits for common throttlers #define THROTTLER_PPT0_BIT … #define THROTTLER_PPT1_BIT … #define THROTTLER_TDC_GFX_BIT … #define THROTTLER_TDC_SOC_BIT … #define THROTTLER_TDC_HBM_BIT … #define THROTTLER_SPARE_5 … #define THROTTLER_TEMP_GPU_BIT … #define THROTTLER_TEMP_MEM_BIT … #define THORTTLER_SPARE_8 … #define THORTTLER_SPARE_9 … #define THORTTLER_SPARE_10 … #define THROTTLER_TEMP_VR_GFX_BIT … #define THROTTLER_TEMP_VR_SOC_BIT … #define THROTTLER_TEMP_VR_MEM_BIT … #define THORTTLER_SPARE_14 … #define THORTTLER_SPARE_15 … #define THORTTLER_SPARE_16 … #define THORTTLER_SPARE_17 … #define THORTTLER_SPARE_18 … #define THROTTLER_APCC_BIT … // Table transfer status #define TABLE_TRANSFER_OK … #define TABLE_TRANSFER_FAILED … #define TABLE_TRANSFER_PENDING … //I2C Interface #define NUM_I2C_CONTROLLERS … #define I2C_CONTROLLER_ENABLED … #define I2C_CONTROLLER_DISABLED … #define MAX_SW_I2C_COMMANDS … #define ALDEBARAN_UMC_CHANNEL_NUM … I2cControllerPort_e; I2cControllerThrottler_e; I2cControllerProtocol_e; I2cControllerConfig_t; I2cPort_e; I2cSpeed_e; I2cCmdType_e; #define CMDCONFIG_STOP_BIT … #define CMDCONFIG_RESTART_BIT … #define CMDCONFIG_READWRITE_BIT … #define CMDCONFIG_STOP_MASK … #define CMDCONFIG_RESTART_MASK … #define CMDCONFIG_READWRITE_MASK … SwI2cCmd_t; //SW I2C Command Table SwI2cRequest_t; // SW I2C Request Table SwI2cRequestExternal_t; QuadraticInt_t; LinearInt_t; GfxclkSrc_e; PPCLK_e; GpioIntPolarity_e; //PPSMC_MSG_SetUclkDpmMode UCLK_DPM_MODE_e; DpmDescriptor_t; #pragma pack(push, 1) PPTable_t; #pragma pack(pop) DriverSmuConfig_t; SmuMetrics_t; AvfsDebugTable_t; EccInfo_t; EccInfo_V2_t; EccInfoTable_t; // These defines are used with the following messages: // SMC_MSG_TransferTableDram2Smu // SMC_MSG_TransferTableSmu2Dram #define TABLE_PPTABLE … #define TABLE_AVFS_PSM_DEBUG … #define TABLE_AVFS_FUSE_OVERRIDE … #define TABLE_PMSTATUSLOG … #define TABLE_SMU_METRICS … #define TABLE_DRIVER_SMU_CONFIG … #define TABLE_I2C_COMMANDS … #define TABLE_ECCINFO … #define TABLE_COUNT … #endif
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