// SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2023 Inochi Amaoto <[email protected]> */ #include <linux/clk-provider.h> #include <linux/io.h> #include <linux/gcd.h> #include <linux/spinlock.h> #include "clk-cv18xx-ip.h" /* GATE */ static inline struct cv1800_clk_gate *hw_to_cv1800_clk_gate(struct clk_hw *hw) { … } static int gate_enable(struct clk_hw *hw) { … } static void gate_disable(struct clk_hw *hw) { … } static int gate_is_enabled(struct clk_hw *hw) { … } static unsigned long gate_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { … } static long gate_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) { … } static int gate_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { … } const struct clk_ops cv1800_clk_gate_ops = …; /* DIV */ #define _DIV_EN_CLK_DIV_FACTOR_FIELD … #define DIV_GET_EN_CLK_DIV_FACTOR(_reg) … #define DIV_SET_EN_DIV_FACTOR(_reg) … static inline struct cv1800_clk_div *hw_to_cv1800_clk_div(struct clk_hw *hw) { … } static int div_enable(struct clk_hw *hw) { … } static void div_disable(struct clk_hw *hw) { … } static int div_is_enabled(struct clk_hw *hw) { … } static int div_helper_set_rate(struct cv1800_clk_common *common, struct cv1800_clk_regfield *div, unsigned long val) { … } static u32 div_helper_get_clockdiv(struct cv1800_clk_common *common, struct cv1800_clk_regfield *div) { … } static u32 div_helper_round_rate(struct cv1800_clk_regfield *div, struct clk_hw *hw, struct clk_hw *parent, unsigned long rate, unsigned long *prate) { … } static long div_round_rate(struct clk_hw *parent, unsigned long *parent_rate, unsigned long rate, int id, void *data) { … } static bool div_is_better_rate(struct cv1800_clk_common *common, unsigned long target, unsigned long now, unsigned long best) { … } static int mux_helper_determine_rate(struct cv1800_clk_common *common, struct clk_rate_request *req, long (*round)(struct clk_hw *, unsigned long *, unsigned long, int, void *), void *data) { … } static int div_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) { … } static unsigned long div_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { … } static int div_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { … } const struct clk_ops cv1800_clk_div_ops = …; static inline struct cv1800_clk_bypass_div * hw_to_cv1800_clk_bypass_div(struct clk_hw *hw) { … } static long bypass_div_round_rate(struct clk_hw *parent, unsigned long *parent_rate, unsigned long rate, int id, void *data) { … } static int bypass_div_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) { … } static unsigned long bypass_div_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { … } static int bypass_div_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { … } static u8 bypass_div_get_parent(struct clk_hw *hw) { … } static int bypass_div_set_parent(struct clk_hw *hw, u8 index) { … } const struct clk_ops cv1800_clk_bypass_div_ops = …; /* MUX */ static inline struct cv1800_clk_mux *hw_to_cv1800_clk_mux(struct clk_hw *hw) { … } static int mux_enable(struct clk_hw *hw) { … } static void mux_disable(struct clk_hw *hw) { … } static int mux_is_enabled(struct clk_hw *hw) { … } static long mux_round_rate(struct clk_hw *parent, unsigned long *parent_rate, unsigned long rate, int id, void *data) { … } static int mux_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) { … } static unsigned long mux_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { … } static int mux_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { … } static u8 mux_get_parent(struct clk_hw *hw) { … } static int _mux_set_parent(struct cv1800_clk_mux *mux, u8 index) { … } static int mux_set_parent(struct clk_hw *hw, u8 index) { … } const struct clk_ops cv1800_clk_mux_ops = …; static inline struct cv1800_clk_bypass_mux * hw_to_cv1800_clk_bypass_mux(struct clk_hw *hw) { … } static long bypass_mux_round_rate(struct clk_hw *parent, unsigned long *parent_rate, unsigned long rate, int id, void *data) { … } static int bypass_mux_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) { … } static unsigned long bypass_mux_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { … } static int bypass_mux_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { … } static u8 bypass_mux_get_parent(struct clk_hw *hw) { … } static int bypass_mux_set_parent(struct clk_hw *hw, u8 index) { … } const struct clk_ops cv1800_clk_bypass_mux_ops = …; /* MMUX */ static inline struct cv1800_clk_mmux *hw_to_cv1800_clk_mmux(struct clk_hw *hw) { … } static u8 mmux_get_parent_id(struct cv1800_clk_mmux *mmux) { … } static int mmux_enable(struct clk_hw *hw) { … } static void mmux_disable(struct clk_hw *hw) { … } static int mmux_is_enabled(struct clk_hw *hw) { … } static long mmux_round_rate(struct clk_hw *parent, unsigned long *parent_rate, unsigned long rate, int id, void *data) { … } static int mmux_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) { … } static unsigned long mmux_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { … } static int mmux_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { … } static u8 mmux_get_parent(struct clk_hw *hw) { … } static int mmux_set_parent(struct clk_hw *hw, u8 index) { … } const struct clk_ops cv1800_clk_mmux_ops = …; /* AUDIO CLK */ static inline struct cv1800_clk_audio * hw_to_cv1800_clk_audio(struct clk_hw *hw) { … } static int aclk_enable(struct clk_hw *hw) { … } static void aclk_disable(struct clk_hw *hw) { … } static int aclk_is_enabled(struct clk_hw *hw) { … } static int aclk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) { … } static unsigned long aclk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { … } static void aclk_determine_mn(unsigned long parent_rate, unsigned long rate, u32 *m, u32 *n) { … } static int aclk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { … } const struct clk_ops cv1800_clk_audio_ops = …;
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