linux/drivers/gpu/drm/amd/pm/powerplay/inc/smu_ucode_xfer_vi.h

/*
 * Copyright 2014 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */

#ifndef SMU_UCODE_XFER_VI_H
#define SMU_UCODE_XFER_VI_H

#define SMU_DRAMData_TOC_VERSION
#define MAX_IH_REGISTER_COUNT
#define SMU_DIGEST_SIZE_BYTES
#define SMU_FB_SIZE_BYTES
#define SMU_MAX_ENTRIES

#define UCODE_ID_SMU
#define UCODE_ID_SDMA0
#define UCODE_ID_SDMA1
#define UCODE_ID_CP_CE
#define UCODE_ID_CP_PFP
#define UCODE_ID_CP_ME
#define UCODE_ID_CP_MEC
#define UCODE_ID_CP_MEC_JT1
#define UCODE_ID_CP_MEC_JT2
#define UCODE_ID_GMCON_RENG
#define UCODE_ID_RLC_G
#define UCODE_ID_IH_REG_RESTORE
#define UCODE_ID_VBIOS
#define UCODE_ID_MISC_METADATA
#define UCODE_ID_SMU_SK
#define UCODE_ID_RLC_SCRATCH
#define UCODE_ID_RLC_SRM_ARAM
#define UCODE_ID_RLC_SRM_DRAM
#define UCODE_ID_MEC_STORAGE
#define UCODE_ID_VBIOS_PARAMETERS
#define UCODE_META_DATA

#define UCODE_ID_SMU_MASK
#define UCODE_ID_SDMA0_MASK
#define UCODE_ID_SDMA1_MASK
#define UCODE_ID_CP_CE_MASK
#define UCODE_ID_CP_PFP_MASK
#define UCODE_ID_CP_ME_MASK
#define UCODE_ID_CP_MEC_MASK
#define UCODE_ID_CP_MEC_JT1_MASK
#define UCODE_ID_CP_MEC_JT2_MASK
#define UCODE_ID_GMCON_RENG_MASK
#define UCODE_ID_RLC_G_MASK
#define UCODE_ID_IH_REG_RESTORE_MASK
#define UCODE_ID_VBIOS_MASK

#define UCODE_FLAG_UNHALT_MASK

struct SMU_Entry {};

struct SMU_DRAMData_TOC {};

#endif