linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

/*
 * Copyright 2016 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Author: Huang Rui <[email protected]>
 *
 */
#include "pp_debug.h"
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include <linux/gfp.h>

#include "smumgr.h"
#include "iceland_smumgr.h"

#include "ppsmc.h"

#include "cgs_common.h"

#include "smu7_dyn_defaults.h"
#include "smu7_hwmgr.h"
#include "hardwaremanager.h"
#include "ppatomctrl.h"
#include "atombios.h"
#include "pppcielanes.h"
#include "pp_endian.h"
#include "processpptables.h"


#include "smu/smu_7_1_1_d.h"
#include "smu/smu_7_1_1_sh_mask.h"
#include "smu71_discrete.h"

#include "smu_ucode_xfer_vi.h"
#include "gmc/gmc_8_1_d.h"
#include "gmc/gmc_8_1_sh_mask.h"
#include "bif/bif_5_0_d.h"
#include "bif/bif_5_0_sh_mask.h"
#include "dce/dce_10_0_d.h"
#include "dce/dce_10_0_sh_mask.h"


#define ICELAND_SMC_SIZE

#define POWERTUNE_DEFAULT_SET_MAX
#define MC_CG_ARB_FREQ_F1
#define VDDC_VDDCI_DELTA

#define DEVICE_ID_VI_ICELAND_M_6900
#define DEVICE_ID_VI_ICELAND_M_6901
#define DEVICE_ID_VI_ICELAND_M_6902
#define DEVICE_ID_VI_ICELAND_M_6903

static const struct iceland_pt_defaults defaults_iceland =;

/* 35W - XT, XTL */
static const struct iceland_pt_defaults defaults_icelandxt =;

/* 25W - PRO, LE */
static const struct iceland_pt_defaults defaults_icelandpro =;

static int iceland_start_smc(struct pp_hwmgr *hwmgr)
{}

static void iceland_reset_smc(struct pp_hwmgr *hwmgr)
{}


static void iceland_stop_smc_clock(struct pp_hwmgr *hwmgr)
{}

static void iceland_start_smc_clock(struct pp_hwmgr *hwmgr)
{}

static int iceland_smu_start_smc(struct pp_hwmgr *hwmgr)
{}


static int iceland_upload_smc_firmware_data(struct pp_hwmgr *hwmgr,
					uint32_t length, const uint8_t *src,
					uint32_t limit, uint32_t start_addr)
{}


static int iceland_smu_upload_firmware_image(struct pp_hwmgr *hwmgr)
{}

static int iceland_request_smu_load_specific_fw(struct pp_hwmgr *hwmgr,
						uint32_t firmwareType)
{}

static int iceland_start_smu(struct pp_hwmgr *hwmgr)
{}

static int iceland_smu_init(struct pp_hwmgr *hwmgr)
{}


static void iceland_initialize_power_tune_defaults(struct pp_hwmgr *hwmgr)
{}

static int iceland_populate_svi_load_line(struct pp_hwmgr *hwmgr)
{}

static int iceland_populate_tdc_limit(struct pp_hwmgr *hwmgr)
{}

static int iceland_populate_dw8(struct pp_hwmgr *hwmgr, uint32_t fuse_table_offset)
{}

static int iceland_populate_temperature_scaler(struct pp_hwmgr *hwmgr)
{}

static int iceland_populate_gnb_lpml(struct pp_hwmgr *hwmgr)
{}

static int iceland_populate_bapm_vddc_base_leakage_sidd(struct pp_hwmgr *hwmgr)
{}

static int iceland_populate_bapm_vddc_vid_sidd(struct pp_hwmgr *hwmgr)
{}

static int iceland_populate_vddc_vid(struct pp_hwmgr *hwmgr)
{}



static int iceland_populate_pm_fuses(struct pp_hwmgr *hwmgr)
{}

static int iceland_get_dependency_volt_by_clk(struct pp_hwmgr *hwmgr,
	struct phm_clock_voltage_dependency_table *allowed_clock_voltage_table,
	uint32_t clock, uint32_t *vol)
{}

static int iceland_get_std_voltage_value_sidd(struct pp_hwmgr *hwmgr,
		pp_atomctrl_voltage_table_entry *tab, uint16_t *hi,
		uint16_t *lo)
{}

static int iceland_populate_smc_voltage_table(struct pp_hwmgr *hwmgr,
		pp_atomctrl_voltage_table_entry *tab,
		SMU71_Discrete_VoltageLevel *smc_voltage_tab)
{}

static int iceland_populate_smc_vddc_table(struct pp_hwmgr *hwmgr,
			SMU71_Discrete_DpmTable *table)
{}

static int iceland_populate_smc_vdd_ci_table(struct pp_hwmgr *hwmgr,
			SMU71_Discrete_DpmTable *table)
{}

static int iceland_populate_smc_mvdd_table(struct pp_hwmgr *hwmgr,
			SMU71_Discrete_DpmTable *table)
{}


static int iceland_populate_smc_voltage_tables(struct pp_hwmgr *hwmgr,
	SMU71_Discrete_DpmTable *table)
{}

static int iceland_populate_ulv_level(struct pp_hwmgr *hwmgr,
		struct SMU71_Discrete_Ulv *state)
{}

static int iceland_populate_ulv_state(struct pp_hwmgr *hwmgr,
		 SMU71_Discrete_Ulv *ulv_level)
{}

static int iceland_populate_smc_link_level(struct pp_hwmgr *hwmgr, SMU71_Discrete_DpmTable *table)
{}

static int iceland_calculate_sclk_params(struct pp_hwmgr *hwmgr,
		uint32_t engine_clock, SMU71_Discrete_GraphicsLevel *sclk)
{}

static int iceland_populate_phase_value_based_on_sclk(struct pp_hwmgr *hwmgr,
				const struct phm_phase_shedding_limits_table *pl,
					uint32_t sclk, uint32_t *p_shed)
{}

static int iceland_populate_single_graphic_level(struct pp_hwmgr *hwmgr,
						uint32_t engine_clock,
				SMU71_Discrete_GraphicsLevel *graphic_level)
{}

static int iceland_populate_all_graphic_levels(struct pp_hwmgr *hwmgr)
{}

static int iceland_calculate_mclk_params(
		struct pp_hwmgr *hwmgr,
		uint32_t memory_clock,
		SMU71_Discrete_MemoryLevel *mclk,
		bool strobe_mode,
		bool dllStateOn
		)
{}

static uint8_t iceland_get_mclk_frequency_ratio(uint32_t memory_clock,
		bool strobe_mode)
{}

static uint8_t iceland_get_ddr3_mclk_frequency_ratio(uint32_t memory_clock)
{}

static int iceland_populate_phase_value_based_on_mclk(struct pp_hwmgr *hwmgr, const struct phm_phase_shedding_limits_table *pl,
					uint32_t memory_clock, uint32_t *p_shed)
{}

static int iceland_populate_single_memory_level(
		struct pp_hwmgr *hwmgr,
		uint32_t memory_clock,
		SMU71_Discrete_MemoryLevel *memory_level
		)
{}

static int iceland_populate_all_memory_levels(struct pp_hwmgr *hwmgr)
{}

static int iceland_populate_mvdd_value(struct pp_hwmgr *hwmgr, uint32_t mclk,
					SMU71_Discrete_VoltageLevel *voltage)
{}

static int iceland_populate_smc_acpi_level(struct pp_hwmgr *hwmgr,
	SMU71_Discrete_DpmTable *table)
{}

static int iceland_populate_smc_uvd_level(struct pp_hwmgr *hwmgr,
					SMU71_Discrete_DpmTable *table)
{}

static int iceland_populate_smc_vce_level(struct pp_hwmgr *hwmgr,
		SMU71_Discrete_DpmTable *table)
{}

static int iceland_populate_smc_acp_level(struct pp_hwmgr *hwmgr,
		SMU71_Discrete_DpmTable *table)
{}

static int iceland_populate_memory_timing_parameters(
		struct pp_hwmgr *hwmgr,
		uint32_t engine_clock,
		uint32_t memory_clock,
		struct SMU71_Discrete_MCArbDramTimingTableEntry *arb_regs
		)
{}

static int iceland_program_memory_timing_parameters(struct pp_hwmgr *hwmgr)
{}

static int iceland_populate_smc_boot_level(struct pp_hwmgr *hwmgr,
			SMU71_Discrete_DpmTable *table)
{}

static int iceland_populate_mc_reg_address(struct pp_hwmgr *hwmgr,
				 SMU71_Discrete_MCRegisters *mc_reg_table)
{}

/*convert register values from driver to SMC format */
static void iceland_convert_mc_registers(
	const struct iceland_mc_reg_entry *entry,
	SMU71_Discrete_MCRegisterSet *data,
	uint32_t num_entries, uint32_t valid_flag)
{}

static int iceland_convert_mc_reg_table_entry_to_smc(struct pp_hwmgr *hwmgr,
		const uint32_t memory_clock,
		SMU71_Discrete_MCRegisterSet *mc_reg_table_data
		)
{}

static int iceland_convert_mc_reg_table_to_smc(struct pp_hwmgr *hwmgr,
		SMU71_Discrete_MCRegisters *mc_regs)
{}

static int iceland_update_and_upload_mc_reg_table(struct pp_hwmgr *hwmgr)
{}

static int iceland_populate_initial_mc_reg_table(struct pp_hwmgr *hwmgr)
{}

static int iceland_populate_smc_initial_state(struct pp_hwmgr *hwmgr)
{}

static int iceland_populate_bapm_parameters_in_dpm_table(struct pp_hwmgr *hwmgr)
{}

static int iceland_populate_smc_svi2_config(struct pp_hwmgr *hwmgr,
					    SMU71_Discrete_DpmTable *tab)
{}

static int iceland_init_smc_table(struct pp_hwmgr *hwmgr)
{}

static int iceland_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
{}


static int iceland_program_mem_timing_parameters(struct pp_hwmgr *hwmgr)
{}

static int iceland_update_sclk_threshold(struct pp_hwmgr *hwmgr)
{}

static uint32_t iceland_get_offsetof(uint32_t type, uint32_t member)
{}

static uint32_t iceland_get_mac_definition(uint32_t value)
{}

static int iceland_process_firmware_header(struct pp_hwmgr *hwmgr)
{}

/*---------------------------MC----------------------------*/

static uint8_t iceland_get_memory_modile_index(struct pp_hwmgr *hwmgr)
{}

static bool iceland_check_s0_mc_reg_index(uint16_t in_reg, uint16_t *out_reg)
{}

static int iceland_set_s0_mc_reg_index(struct iceland_mc_reg_table *table)
{}

static int iceland_copy_vbios_smc_reg_table(const pp_atomctrl_mc_reg_table *table,
					struct iceland_mc_reg_table *ni_table)
{}

static int iceland_set_mc_special_registers(struct pp_hwmgr *hwmgr,
					struct iceland_mc_reg_table *table)
{}

static int iceland_set_valid_flag(struct iceland_mc_reg_table *table)
{}

static int iceland_initialize_mc_reg_table(struct pp_hwmgr *hwmgr)
{}

static bool iceland_is_dpm_running(struct pp_hwmgr *hwmgr)
{}

const struct pp_smumgr_func iceland_smu_funcs =;