/* * Copyright 2013 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * */ #ifndef SMU7_H #define SMU7_H #pragma pack(push, 1) #define SMU7_CONTEXT_ID_SMC … #define SMU7_CONTEXT_ID_VBIOS … #define SMU7_CONTEXT_ID_SMC … #define SMU7_CONTEXT_ID_VBIOS … #define SMU7_MAX_LEVELS_VDDC … #define SMU7_MAX_LEVELS_VDDCI … #define SMU7_MAX_LEVELS_MVDD … #define SMU7_MAX_LEVELS_VDDNB … #define SMU7_MAX_LEVELS_GRAPHICS … #define SMU7_MAX_LEVELS_MEMORY … #define SMU7_MAX_LEVELS_GIO … #define SMU7_MAX_LEVELS_LINK … #define SMU7_MAX_LEVELS_UVD … #define SMU7_MAX_LEVELS_VCE … #define SMU7_MAX_LEVELS_ACP … #define SMU7_MAX_LEVELS_SAMU … #define SMU7_MAX_ENTRIES_SMIO … #define DPM_NO_LIMIT … #define DPM_NO_UP … #define DPM_GO_DOWN … #define DPM_GO_UP … #define SMU7_FIRST_DPM_GRAPHICS_LEVEL … #define SMU7_FIRST_DPM_MEMORY_LEVEL … #define GPIO_CLAMP_MODE_VRHOT … #define GPIO_CLAMP_MODE_THERM … #define GPIO_CLAMP_MODE_DC … #define SCRATCH_B_TARG_PCIE_INDEX_SHIFT … #define SCRATCH_B_TARG_PCIE_INDEX_MASK … #define SCRATCH_B_CURR_PCIE_INDEX_SHIFT … #define SCRATCH_B_CURR_PCIE_INDEX_MASK … #define SCRATCH_B_TARG_UVD_INDEX_SHIFT … #define SCRATCH_B_TARG_UVD_INDEX_MASK … #define SCRATCH_B_CURR_UVD_INDEX_SHIFT … #define SCRATCH_B_CURR_UVD_INDEX_MASK … #define SCRATCH_B_TARG_VCE_INDEX_SHIFT … #define SCRATCH_B_TARG_VCE_INDEX_MASK … #define SCRATCH_B_CURR_VCE_INDEX_SHIFT … #define SCRATCH_B_CURR_VCE_INDEX_MASK … #define SCRATCH_B_TARG_ACP_INDEX_SHIFT … #define SCRATCH_B_TARG_ACP_INDEX_MASK … #define SCRATCH_B_CURR_ACP_INDEX_SHIFT … #define SCRATCH_B_CURR_ACP_INDEX_MASK … #define SCRATCH_B_TARG_SAMU_INDEX_SHIFT … #define SCRATCH_B_TARG_SAMU_INDEX_MASK … #define SCRATCH_B_CURR_SAMU_INDEX_SHIFT … #define SCRATCH_B_CURR_SAMU_INDEX_MASK … /* Voltage Regulator Configuration */ /* VR Config info is contained in dpmTable */ #define VRCONF_VDDC_MASK … #define VRCONF_VDDC_SHIFT … #define VRCONF_VDDGFX_MASK … #define VRCONF_VDDGFX_SHIFT … #define VRCONF_VDDCI_MASK … #define VRCONF_VDDCI_SHIFT … #define VRCONF_MVDD_MASK … #define VRCONF_MVDD_SHIFT … #define VR_MERGED_WITH_VDDC … #define VR_SVI2_PLANE_1 … #define VR_SVI2_PLANE_2 … #define VR_SMIO_PATTERN_1 … #define VR_SMIO_PATTERN_2 … #define VR_STATIC_VOLTAGE … struct SMU7_PIDController { … }; SMU7_PIDController; // ------------------------------------------------------------------------------------------------------------------------- #define SMU7_MAX_PCIE_LINK_SPEEDS … #define SMU7_SCLK_DPM_CONFIG_MASK … #define SMU7_VOLTAGE_CONTROLLER_CONFIG_MASK … #define SMU7_THERMAL_CONTROLLER_CONFIG_MASK … #define SMU7_MCLK_DPM_CONFIG_MASK … #define SMU7_UVD_DPM_CONFIG_MASK … #define SMU7_VCE_DPM_CONFIG_MASK … #define SMU7_ACP_DPM_CONFIG_MASK … #define SMU7_SAMU_DPM_CONFIG_MASK … #define SMU7_PCIEGEN_DPM_CONFIG_MASK … #define SMU7_ACP_MCLK_HANDSHAKE_DISABLE … #define SMU7_ACP_SCLK_HANDSHAKE_DISABLE … #define SMU7_UVD_MCLK_HANDSHAKE_DISABLE … #define SMU7_UVD_SCLK_HANDSHAKE_DISABLE … #define SMU7_VCE_MCLK_HANDSHAKE_DISABLE … #define SMU7_VCE_SCLK_HANDSHAKE_DISABLE … struct SMU7_Firmware_Header { … }; SMU7_Firmware_Header; #define SMU7_FIRMWARE_HEADER_LOCATION … enum DisplayConfig { … }; #pragma pack(pop) #endif
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