#ifndef SMU9_H
#define SMU9_H
#pragma pack(push, 1)
#define ENABLE_DEBUG_FEATURES
#define FEATURE_DPM_PREFETCHER_BIT …
#define FEATURE_DPM_GFXCLK_BIT …
#define FEATURE_DPM_UCLK_BIT …
#define FEATURE_DPM_SOCCLK_BIT …
#define FEATURE_DPM_UVD_BIT …
#define FEATURE_DPM_VCE_BIT …
#define FEATURE_ULV_BIT …
#define FEATURE_DPM_MP0CLK_BIT …
#define FEATURE_DPM_LINK_BIT …
#define FEATURE_DPM_DCEFCLK_BIT …
#define FEATURE_AVFS_BIT …
#define FEATURE_DS_GFXCLK_BIT …
#define FEATURE_DS_SOCCLK_BIT …
#define FEATURE_DS_LCLK_BIT …
#define FEATURE_PPT_BIT …
#define FEATURE_TDC_BIT …
#define FEATURE_THERMAL_BIT …
#define FEATURE_GFX_PER_CU_CG_BIT …
#define FEATURE_RM_BIT …
#define FEATURE_DS_DCEFCLK_BIT …
#define FEATURE_ACDC_BIT …
#define FEATURE_VR0HOT_BIT …
#define FEATURE_VR1HOT_BIT …
#define FEATURE_FW_CTF_BIT …
#define FEATURE_LED_DISPLAY_BIT …
#define FEATURE_FAN_CONTROL_BIT …
#define FEATURE_FAST_PPT_BIT …
#define FEATURE_GFX_EDC_BIT …
#define FEATURE_ACG_BIT …
#define FEATURE_PCC_LIMIT_CONTROL_BIT …
#define FEATURE_SPARE_30_BIT …
#define FEATURE_SPARE_31_BIT …
#define NUM_FEATURES …
#define FFEATURE_DPM_PREFETCHER_MASK …
#define FFEATURE_DPM_GFXCLK_MASK …
#define FFEATURE_DPM_UCLK_MASK …
#define FFEATURE_DPM_SOCCLK_MASK …
#define FFEATURE_DPM_UVD_MASK …
#define FFEATURE_DPM_VCE_MASK …
#define FFEATURE_ULV_MASK …
#define FFEATURE_DPM_MP0CLK_MASK …
#define FFEATURE_DPM_LINK_MASK …
#define FFEATURE_DPM_DCEFCLK_MASK …
#define FFEATURE_AVFS_MASK …
#define FFEATURE_DS_GFXCLK_MASK …
#define FFEATURE_DS_SOCCLK_MASK …
#define FFEATURE_DS_LCLK_MASK …
#define FFEATURE_PPT_MASK …
#define FFEATURE_TDC_MASK …
#define FFEATURE_THERMAL_MASK …
#define FFEATURE_GFX_PER_CU_CG_MASK …
#define FFEATURE_RM_MASK …
#define FFEATURE_DS_DCEFCLK_MASK …
#define FFEATURE_ACDC_MASK …
#define FFEATURE_VR0HOT_MASK …
#define FFEATURE_VR1HOT_MASK …
#define FFEATURE_FW_CTF_MASK …
#define FFEATURE_LED_DISPLAY_MASK …
#define FFEATURE_FAN_CONTROL_MASK …
#define FEATURE_FAST_PPT_MASK …
#define FEATURE_GFX_EDC_MASK …
#define FEATURE_ACG_MASK …
#define FEATURE_PCC_LIMIT_CONTROL_MASK …
#define FFEATURE_SPARE_30_MASK …
#define FFEATURE_SPARE_31_MASK …
#define WORKLOAD_VR_BIT …
#define WORKLOAD_FRTC_BIT …
#define WORKLOAD_VIDEO_BIT …
#define WORKLOAD_COMPUTE_BIT …
#define NUM_WORKLOADS …
#define ULV_CLIENT_RLC_MASK …
#define ULV_CLIENT_UVD_MASK …
#define ULV_CLIENT_VCE_MASK …
#define ULV_CLIENT_SDMA0_MASK …
#define ULV_CLIENT_SDMA1_MASK …
#define ULV_CLIENT_JPEG_MASK …
#define ULV_CLIENT_GFXCLK_DPM_MASK …
#define ULV_CLIENT_UVD_DPM_MASK …
#define ULV_CLIENT_VCE_DPM_MASK …
#define ULV_CLIENT_MP0CLK_DPM_MASK …
#define ULV_CLIENT_UCLK_DPM_MASK …
#define ULV_CLIENT_SOCCLK_DPM_MASK …
#define ULV_CLIENT_DCEFCLK_DPM_MASK …
FwStatus_t;
#pragma pack(pop)
#endif