/* * Copyright 2016 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * */ #ifndef SMU9_DRIVER_IF_H #define SMU9_DRIVER_IF_H #include "smu9.h" /**** IMPORTANT *** * SMU TEAM: Always increment the interface version if * any structure is changed in this file */ #define SMU9_DRIVER_IF_VERSION … #define PPTABLE_V10_SMU_VERSION … #define NUM_GFXCLK_DPM_LEVELS … #define NUM_UVD_DPM_LEVELS … #define NUM_VCE_DPM_LEVELS … #define NUM_MP0CLK_DPM_LEVELS … #define NUM_UCLK_DPM_LEVELS … #define NUM_SOCCLK_DPM_LEVELS … #define NUM_DCEFCLK_DPM_LEVELS … #define NUM_LINK_LEVELS … #define MAX_GFXCLK_DPM_LEVEL … #define MAX_UVD_DPM_LEVEL … #define MAX_VCE_DPM_LEVEL … #define MAX_MP0CLK_DPM_LEVEL … #define MAX_UCLK_DPM_LEVEL … #define MAX_SOCCLK_DPM_LEVEL … #define MAX_DCEFCLK_DPM_LEVEL … #define MAX_LINK_DPM_LEVEL … #define MIN_GFXCLK_DPM_LEVEL … #define MIN_UVD_DPM_LEVEL … #define MIN_VCE_DPM_LEVEL … #define MIN_MP0CLK_DPM_LEVEL … #define MIN_UCLK_DPM_LEVEL … #define MIN_SOCCLK_DPM_LEVEL … #define MIN_DCEFCLK_DPM_LEVEL … #define MIN_LINK_DPM_LEVEL … #define NUM_EVV_VOLTAGE_LEVELS … #define MAX_EVV_VOLTAGE_LEVEL … #define MIN_EVV_VOLTAGE_LEVEL … #define NUM_PSP_LEVEL_MAP … /* Gemini Modes */ #define PPSMC_GeminiModeNone … #define PPSMC_GeminiModeMaster … #define PPSMC_GeminiModeSlave … /* Voltage Modes for DPMs */ #define VOLTAGE_MODE_AVFS_INTERPOLATE … #define VOLTAGE_MODE_AVFS_WORST_CASE … #define VOLTAGE_MODE_STATIC … PllSetting_t; GbVdroopTable_t; QuadraticInt_t; #define NUM_DSPCLK_LEVELS … DSPCLK_e; DisplayClockTable_t; #pragma pack(push, 1) PPTable_t; #pragma pack(pop) WatermarkRowGeneric_t; #define NUM_WM_RANGES … WM_CLOCK_e; Watermarks_t; #ifdef PPTABLE_V10_SMU_VERSION AvfsTable_t; #else typedef struct { uint32_t AvfsGbCksOn[NUM_GFXCLK_DPM_LEVELS]; uint32_t AcBtcGbCksOn[NUM_GFXCLK_DPM_LEVELS]; uint32_t AvfsGbCksOff[NUM_GFXCLK_DPM_LEVELS]; uint32_t AcBtcGbCksOff[NUM_GFXCLK_DPM_LEVELS]; uint32_t DcBtcGb; uint32_t MmHubPadding[7]; /* SMU internal use */ } AvfsTable_t; #endif AvfsDebugTable_t; AvfsFuseOverride_t; /* These defines are used with the following messages: * SMC_MSG_TransferTableDram2Smu * SMC_MSG_TransferTableSmu2Dram */ #define TABLE_PPTABLE … #define TABLE_WATERMARKS … #define TABLE_AVFS … #define TABLE_AVFS_PSM_DEBUG … #define TABLE_AVFS_FUSE_OVERRIDE … #define TABLE_PMSTATUSLOG … #define TABLE_COUNT … /* These defines are used with the SMC_MSG_SetUclkFastSwitch message. */ #define UCLK_SWITCH_SLOW … #define UCLK_SWITCH_FAST … /* GFX DIDT Configuration */ #define SQ_Enable_MASK … #define SQ_IR_MASK … #define SQ_PCC_MASK … #define SQ_EDC_MASK … #define TCP_Enable_MASK … #define TCP_IR_MASK … #define TCP_PCC_MASK … #define TCP_EDC_MASK … #define TD_Enable_MASK … #define TD_IR_MASK … #define TD_PCC_MASK … #define TD_EDC_MASK … #define DB_Enable_MASK … #define DB_IR_MASK … #define DB_PCC_MASK … #define DB_EDC_MASK … #define SQ_Enable_SHIFT … #define SQ_IR_SHIFT … #define SQ_PCC_SHIFT … #define SQ_EDC_SHIFT … #define TCP_Enable_SHIFT … #define TCP_IR_SHIFT … #define TCP_PCC_SHIFT … #define TCP_EDC_SHIFT … #define TD_Enable_SHIFT … #define TD_IR_SHIFT … #define TD_PCC_SHIFT … #define TD_EDC_SHIFT … #define DB_Enable_SHIFT … #define DB_IR_SHIFT … #define DB_PCC_SHIFT … #define DB_EDC_SHIFT … #define REMOVE_FMAX_MARGIN_BIT … #define REMOVE_DCTOL_MARGIN_BIT … #define REMOVE_PLATFORM_MARGIN_BIT … #endif
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