processpptables.c | Explore in Territory

/*
 * Copyright 2015 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */
#include "pp_debug.h"
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/pci.h>

#include <drm/amdgpu_drm.h>
#include "processpptables.h"
#include <atom-types.h>
#include <atombios.h>
#include "pptable.h"
#include "power_state.h"
#include "hwmgr.h"
#include "hardwaremanager.h"


#define SIZE_OF_ATOM_PPLIB_EXTENDEDHEADER_V2 …
#define SIZE_OF_ATOM_PPLIB_EXTENDEDHEADER_V3 …
#define SIZE_OF_ATOM_PPLIB_EXTENDEDHEADER_V4 …
#define SIZE_OF_ATOM_PPLIB_EXTENDEDHEADER_V5 …
#define SIZE_OF_ATOM_PPLIB_EXTENDEDHEADER_V6 …
#define SIZE_OF_ATOM_PPLIB_EXTENDEDHEADER_V7 …
#define SIZE_OF_ATOM_PPLIB_EXTENDEDHEADER_V8 …
#define SIZE_OF_ATOM_PPLIB_EXTENDEDHEADER_V9 …

#define NUM_BITS_CLOCK_INFO_ARRAY_INDEX …

static uint16_t get_vce_table_offset(struct pp_hwmgr *hwmgr,
			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
{ … }

static uint16_t get_vce_clock_info_array_offset(struct pp_hwmgr *hwmgr,
			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
{ … }

static uint16_t get_vce_clock_info_array_size(struct pp_hwmgr *hwmgr,
			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
{ … }

static uint16_t get_vce_clock_voltage_limit_table_offset(struct pp_hwmgr *hwmgr,
				const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
{ … }

static uint16_t get_vce_clock_voltage_limit_table_size(struct pp_hwmgr *hwmgr,
							const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
{ … }

static uint16_t get_vce_state_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
{ … }

static const ATOM_PPLIB_VCE_State_Table *get_vce_state_table(
						struct pp_hwmgr *hwmgr,
						const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
{ … }

static uint16_t get_uvd_table_offset(struct pp_hwmgr *hwmgr,
			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
{ … }

static uint16_t get_uvd_clock_info_array_offset(struct pp_hwmgr *hwmgr,
			 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
{ … }

static uint16_t get_uvd_clock_info_array_size(struct pp_hwmgr *hwmgr,
			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
{ … }

static uint16_t get_uvd_clock_voltage_limit_table_offset(
			struct pp_hwmgr *hwmgr,
			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
{ … }

static uint16_t get_samu_table_offset(struct pp_hwmgr *hwmgr,
			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
{ … }

static uint16_t get_samu_clock_voltage_limit_table_offset(
			struct pp_hwmgr *hwmgr,
			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
{ … }

static uint16_t get_acp_table_offset(struct pp_hwmgr *hwmgr,
				const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
{ … }

static uint16_t get_acp_clock_voltage_limit_table_offset(
				struct pp_hwmgr *hwmgr,
				const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
{ … }

static uint16_t get_cacp_tdp_table_offset(
				struct pp_hwmgr *hwmgr,
				const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
{ … }

static int get_cac_tdp_table(struct pp_hwmgr *hwmgr,
				struct phm_cac_tdp_table **ptable,
				const ATOM_PowerTune_Table *table,
				uint16_t us_maximum_power_delivery_limit)
{ … }

static uint16_t get_sclk_vdd_gfx_table_offset(struct pp_hwmgr *hwmgr,
			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
{ … }

static uint16_t get_sclk_vdd_gfx_clock_voltage_dependency_table_offset(
			struct pp_hwmgr *hwmgr,
			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
{ … }


static int get_clock_voltage_dependency_table(struct pp_hwmgr *hwmgr,
		struct phm_clock_voltage_dependency_table **ptable,
		const ATOM_PPLIB_Clock_Voltage_Dependency_Table *table)
{ … }

static int get_valid_clk(struct pp_hwmgr *hwmgr,
			struct phm_clock_array **ptable,
			const struct phm_clock_voltage_dependency_table *table)
{ … }

static int get_clock_voltage_limit(struct pp_hwmgr *hwmgr,
			struct phm_clock_and_voltage_limits *limits,
			const ATOM_PPLIB_Clock_Voltage_Limit_Table *table)
{ … }


static void set_hw_cap(struct pp_hwmgr *hwmgr, bool enable,
		       enum phm_platform_caps cap)
{ … }

static int set_platform_caps(struct pp_hwmgr *hwmgr,
			unsigned long powerplay_caps)
{ … }

static PP_StateClassificationFlags make_classification_flags(
						   struct pp_hwmgr *hwmgr,
						    USHORT classification,
						   USHORT classification2)
{ … }

static int init_non_clock_fields(struct pp_hwmgr *hwmgr,
						struct pp_power_state *ps,
							    uint8_t version,
			 const ATOM_PPLIB_NONCLOCK_INFO *pnon_clock_info) { … }

static ULONG size_of_entry_v2(ULONG num_dpm_levels)
{ … }

static const ATOM_PPLIB_STATE_V2 *get_state_entry_v2(
					const StateArray * pstate_arrays,
							 ULONG entry_index)
{ … }

static const unsigned char soft_dummy_pp_table[] = …;

static const ATOM_PPLIB_POWERPLAYTABLE *get_powerplay_table(
				     struct pp_hwmgr *hwmgr)
{ … }

int pp_tables_get_response_times(struct pp_hwmgr *hwmgr,
				uint32_t *vol_rep_time, uint32_t *bb_rep_time)
{ … }

int pp_tables_get_num_of_entries(struct pp_hwmgr *hwmgr,
				     unsigned long *num_of_entries)
{ … }

int pp_tables_get_entry(struct pp_hwmgr *hwmgr,
				unsigned long entry_index,
				struct pp_power_state *ps,
			 pp_tables_hw_clock_info_callback func)
{ … }

static int init_powerplay_tables(
			struct pp_hwmgr *hwmgr,
			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table
)
{ … }


static int init_thermal_controller(
			struct pp_hwmgr *hwmgr,
			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
{ … }

static int init_overdrive_limits_V1_4(struct pp_hwmgr *hwmgr,
			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table,
			const ATOM_FIRMWARE_INFO_V1_4 *fw_info)
{ … }

static int init_overdrive_limits_V2_1(struct pp_hwmgr *hwmgr,
			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table,
			const ATOM_FIRMWARE_INFO_V2_1 *fw_info)
{ … }

static int init_overdrive_limits(struct pp_hwmgr *hwmgr,
			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
{ … }

static int get_uvd_clock_voltage_limit_table(struct pp_hwmgr *hwmgr,
		struct phm_uvd_clock_voltage_dependency_table **ptable,
		const ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table *table,
		const UVDClockInfoArray *array)
{ … }

static int get_vce_clock_voltage_limit_table(struct pp_hwmgr *hwmgr,
		struct phm_vce_clock_voltage_dependency_table **ptable,
		const ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table *table,
		const VCEClockInfoArray    *array)
{ … }

static int get_samu_clock_voltage_limit_table(struct pp_hwmgr *hwmgr,
		 struct phm_samu_clock_voltage_dependency_table **ptable,
		 const ATOM_PPLIB_SAMClk_Voltage_Limit_Table *table)
{ … }

static int get_acp_clock_voltage_limit_table(struct pp_hwmgr *hwmgr,
		struct phm_acp_clock_voltage_dependency_table **ptable,
		const ATOM_PPLIB_ACPClk_Voltage_Limit_Table *table)
{ … }

static int init_clock_voltage_dependency(struct pp_hwmgr *hwmgr,
			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
{ … }

static int get_cac_leakage_table(struct pp_hwmgr *hwmgr,
				 struct phm_cac_leakage_table **ptable,
				const ATOM_PPLIB_CAC_Leakage_Table *table)
{ … }

static int get_platform_power_management_table(struct pp_hwmgr *hwmgr,
			ATOM_PPLIB_PPM_Table *atom_ppm_table)
{ … }

static int init_dpm2_parameters(struct pp_hwmgr *hwmgr,
			const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
{ … }

static int init_phase_shedding_table(struct pp_hwmgr *hwmgr,
		const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
{ … }

static int get_number_of_vce_state_table_entries(
						  struct pp_hwmgr *hwmgr)
{ … }

static int get_vce_state_table_entry(struct pp_hwmgr *hwmgr,
							unsigned long i,
							struct amd_vce_state *vce_state,
							void **clock_info,
							unsigned long *flag)
{ … }


static int pp_tables_initialize(struct pp_hwmgr *hwmgr)
{ … }

static int pp_tables_uninitialize(struct pp_hwmgr *hwmgr)
{ … }

const struct pp_table_func pptable_funcs = …;
linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/processpptables.c
