/* * Copyright 2015 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * */ #ifndef _SMU8_HWMGR_H_ #define _SMU8_HWMGR_H_ #include "cgs_common.h" #include "ppatomctrl.h" #define SMU8_NUM_NBPSTATES … #define SMU8_NUM_NBPMEMORYCLOCK … #define MAX_DISPLAY_CLOCK_LEVEL … #define SMU8_MAX_HARDWARE_POWERLEVELS … #define SMU8_VOTINGRIGHTSCLIENTS_DFLT0 … #define SMU8_MIN_DEEP_SLEEP_SCLK … /* Carrizo device IDs */ #define DEVICE_ID_CZ_9870 … #define DEVICE_ID_CZ_9874 … #define DEVICE_ID_CZ_9875 … #define DEVICE_ID_CZ_9876 … #define DEVICE_ID_CZ_9877 … struct smu8_dpm_entry { … }; struct smu8_sys_info { … }; #define MAX_DISPLAYPHY_IDS … #define DISPLAYPHY_LANEMASK … #define UNKNOWN_TRANSMITTER_PHY_ID … #define DISPLAYPHY_PHYID_SHIFT … #define DISPLAYPHY_LANESELECT_SHIFT … #define DISPLAYPHY_RX_SELECT … #define DISPLAYPHY_TX_SELECT … #define DISPLAYPHY_CORE_SELECT … #define DDI_POWERGATING_ARG(phyID, lanemask, rx, tx, core) … struct smu8_display_phy_info_entry { … }; #define SMU8_MAX_DISPLAYPHY_IDS … struct smu8_display_phy_info { … }; struct smu8_power_level { … }; struct smu8_uvd_clocks { … }; enum smu8_pstate_previous_action { … }; struct pp_disable_nb_ps_flags { … }; struct smu8_power_state { … }; #define DPMFlags_SCLK_Enabled … #define DPMFlags_UVD_Enabled … #define DPMFlags_VCE_Enabled … #define DPMFlags_ACP_Enabled … #define DPMFlags_ForceHighestValid … #define DPMFlags_Debug … #define SMU_EnabledFeatureScoreboard_AcpDpmOn … #define SMU_EnabledFeatureScoreboard_UvdDpmOn … #define SMU_EnabledFeatureScoreboard_VceDpmOn … struct cc6_settings { … }; struct smu8_hwmgr { … }; #endif /* _SMU8_HWMGR_H_ */
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