#include "pp_debug.h"
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include "atom-types.h"
#include "atombios.h"
#include "processpptables.h"
#include "cgs_common.h"
#include "smu/smu_8_0_d.h"
#include "smu8_fusion.h"
#include "smu/smu_8_0_sh_mask.h"
#include "smumgr.h"
#include "hwmgr.h"
#include "hardwaremanager.h"
#include "cz_ppsmc.h"
#include "smu8_hwmgr.h"
#include "power_state.h"
#include "pp_thermal.h"
#define ixSMUSVI_NB_CURRENTVID …
#define CURRENT_NB_VID_MASK …
#define CURRENT_NB_VID__SHIFT …
#define ixSMUSVI_GFX_CURRENTVID …
#define CURRENT_GFX_VID_MASK …
#define CURRENT_GFX_VID__SHIFT …
static const unsigned long smu8_magic = …;
static struct smu8_power_state *cast_smu8_power_state(struct pp_hw_power_state *hw_ps)
{ … }
static const struct smu8_power_state *cast_const_smu8_power_state(
const struct pp_hw_power_state *hw_ps)
{ … }
static uint32_t smu8_get_eclk_level(struct pp_hwmgr *hwmgr,
uint32_t clock, uint32_t msg)
{ … }
static uint32_t smu8_get_sclk_level(struct pp_hwmgr *hwmgr,
uint32_t clock, uint32_t msg)
{ … }
static uint32_t smu8_get_uvd_level(struct pp_hwmgr *hwmgr,
uint32_t clock, uint32_t msg)
{ … }
static uint32_t smu8_get_max_sclk_level(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_initialize_dpm_defaults(struct pp_hwmgr *hwmgr)
{ … }
static uint32_t smu8_convert_8Bit_index_to_voltage(
struct pp_hwmgr *hwmgr, uint16_t voltage)
{ … }
static int smu8_construct_max_power_limits_table(struct pp_hwmgr *hwmgr,
struct phm_clock_and_voltage_limits *table)
{ … }
static int smu8_init_dynamic_state_adjustment_rule_settings(
struct pp_hwmgr *hwmgr,
ATOM_CLK_VOLT_CAPABILITY *disp_voltage_table)
{ … }
static int smu8_get_system_info_data(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_construct_boot_state(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_upload_pptable_to_smu(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_init_sclk_limit(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_init_uvd_limit(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_init_vce_limit(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_init_acp_limit(struct pp_hwmgr *hwmgr)
{ … }
static void smu8_init_power_gate_state(struct pp_hwmgr *hwmgr)
{ … }
static void smu8_init_sclk_threshold(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_update_sclk_limit(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_set_deep_sleep_sclk_threshold(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_set_watermark_threshold(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_nbdpm_pstate_enable_disable(struct pp_hwmgr *hwmgr, bool enable, bool lock)
{ … }
static int smu8_disable_nb_dpm(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_enable_nb_dpm(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_update_low_mem_pstate(struct pp_hwmgr *hwmgr, const void *input)
{ … }
static int smu8_set_power_state_tasks(struct pp_hwmgr *hwmgr, const void *input)
{ … }
static int smu8_setup_asic_task(struct pp_hwmgr *hwmgr)
{ … }
static void smu8_power_up_display_clock_sys_pll(struct pp_hwmgr *hwmgr)
{ … }
static void smu8_clear_nb_dpm_flag(struct pp_hwmgr *hwmgr)
{ … }
static void smu8_reset_cc6_data(struct pp_hwmgr *hwmgr)
{ … }
static void smu8_program_voting_clients(struct pp_hwmgr *hwmgr)
{ … }
static void smu8_clear_voting_clients(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_start_dpm(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_stop_dpm(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_program_bootup_state(struct pp_hwmgr *hwmgr)
{ … }
static void smu8_reset_acp_boot_level(struct pp_hwmgr *hwmgr)
{ … }
static void smu8_populate_umdpstate_clocks(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_power_off_asic(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
struct pp_power_state *prequest_ps,
const struct pp_power_state *pcurrent_ps)
{ … }
static int smu8_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_hwmgr_backend_fini(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_phm_force_dpm_highest(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_phm_unforce_dpm_levels(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_phm_force_dpm_lowest(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_dpm_force_dpm_level(struct pp_hwmgr *hwmgr,
enum amd_dpm_forced_level level)
{ … }
static int smu8_dpm_powerdown_uvd(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_dpm_powerup_uvd(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_dpm_update_vce_dpm(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_dpm_powerdown_vce(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_dpm_powerup_vce(struct pp_hwmgr *hwmgr)
{ … }
static uint32_t smu8_dpm_get_mclk(struct pp_hwmgr *hwmgr, bool low)
{ … }
static uint32_t smu8_dpm_get_sclk(struct pp_hwmgr *hwmgr, bool low)
{ … }
static int smu8_dpm_patch_boot_state(struct pp_hwmgr *hwmgr,
struct pp_hw_power_state *hw_ps)
{ … }
static int smu8_dpm_get_pp_table_entry_callback(
struct pp_hwmgr *hwmgr,
struct pp_hw_power_state *hw_ps,
unsigned int index,
const void *clock_info)
{ … }
static int smu8_dpm_get_num_of_pp_table_entries(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_dpm_get_pp_table_entry(struct pp_hwmgr *hwmgr,
unsigned long entry, struct pp_power_state *ps)
{ … }
static int smu8_get_power_state_size(struct pp_hwmgr *hwmgr)
{ … }
static void smu8_hw_print_display_cfg(
const struct cc6_settings *cc6_settings)
{ … }
static int smu8_set_cpu_power_state(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_store_cc6_data(struct pp_hwmgr *hwmgr, uint32_t separation_time,
bool cc6_disable, bool pstate_disable, bool pstate_switch_disable)
{ … }
static int smu8_get_dal_power_level(struct pp_hwmgr *hwmgr,
struct amd_pp_simple_clock_info *info)
{ … }
static int smu8_force_clock_level(struct pp_hwmgr *hwmgr,
enum pp_clock_type type, uint32_t mask)
{ … }
static int smu8_print_clock_levels(struct pp_hwmgr *hwmgr,
enum pp_clock_type type, char *buf)
{ … }
static int smu8_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state,
PHM_PerformanceLevelDesignation designation, uint32_t index,
PHM_PerformanceLevel *level)
{ … }
static int smu8_get_current_shallow_sleep_clocks(struct pp_hwmgr *hwmgr,
const struct pp_hw_power_state *state, struct pp_clock_info *clock_info)
{ … }
static int smu8_get_clock_by_type(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type,
struct amd_pp_clocks *clocks)
{ … }
static int smu8_get_max_high_clocks(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks)
{ … }
static int smu8_thermal_get_temperature(struct pp_hwmgr *hwmgr)
{ … }
static int smu8_read_sensor(struct pp_hwmgr *hwmgr, int idx,
void *value, int *size)
{ … }
static int smu8_notify_cac_buffer_info(struct pp_hwmgr *hwmgr,
uint32_t virtual_addr_low,
uint32_t virtual_addr_hi,
uint32_t mc_addr_low,
uint32_t mc_addr_hi,
uint32_t size)
{ … }
static int smu8_get_thermal_temperature_range(struct pp_hwmgr *hwmgr,
struct PP_TemperatureRange *thermal_data)
{ … }
static int smu8_enable_disable_uvd_dpm(struct pp_hwmgr *hwmgr, bool enable)
{ … }
static int smu8_dpm_update_uvd_dpm(struct pp_hwmgr *hwmgr, bool bgate)
{ … }
static int smu8_enable_disable_vce_dpm(struct pp_hwmgr *hwmgr, bool enable)
{ … }
static void smu8_dpm_powergate_acp(struct pp_hwmgr *hwmgr, bool bgate)
{ … }
#define WIDTH_4K …
static void smu8_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
{ … }
static void smu8_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate)
{ … }
static const struct pp_hwmgr_func smu8_hwmgr_funcs = …;
int smu8_init_function_pointers(struct pp_hwmgr *hwmgr)
{ … }